brcm63xx: switch to 3.14

Now that BB is branched off, we can now switch to 3.14 and start
breaking stuff again.

Signed-off-by: Jonas Gorski <[email protected]>

SVN-Revision: 41941

target/linux/brcm63xx/Makefile

@@ -11,7 +11,7 @@ BOARD:=brcm63xx
 BOARDNAME:=Broadcom BCM63xx
 SUBTARGETS:=generic smp
 FEATURES:=squashfs usb atm pci pcmcia usbgadget
-LINUX_VERSION:=3.10.49
+LINUX_VERSION:=3.14.14
 MAINTAINER:=Florian Fainelli <[email protected]>
 
 include $(INCLUDE_DIR)/target.mk

target/linux/brcm63xx/config-3.10

@@ -1,190 +0,0 @@
-CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
-CONFIG_ARCH_DISCARD_MEMBLOCK=y
-CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
-CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_REQUIRE_GPIOLIB=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
-CONFIG_B53=y
-CONFIG_B53_MMAP_DRIVER=y
-CONFIG_B53_PHY_DRIVER=y
-CONFIG_B53_PHY_FIXUP=y
-CONFIG_B53_SPI_DRIVER=y
-# CONFIG_B53_SRAB_DRIVER is not set
-CONFIG_BCM63XX=y
-CONFIG_BCM63XX_CPU_3368=y
-CONFIG_BCM63XX_CPU_6318=y
-CONFIG_BCM63XX_CPU_63268=y
-CONFIG_BCM63XX_CPU_6328=y
-CONFIG_BCM63XX_CPU_6338=y
-CONFIG_BCM63XX_CPU_6345=y
-CONFIG_BCM63XX_CPU_6348=y
-CONFIG_BCM63XX_CPU_6358=y
-CONFIG_BCM63XX_CPU_6362=y
-CONFIG_BCM63XX_CPU_6368=y
-CONFIG_BCM63XX_EHCI=y
-CONFIG_BCM63XX_ENET=y
-CONFIG_BCM63XX_OHCI=y
-CONFIG_BCM63XX_PHY=y
-CONFIG_BCM63XX_WDT=y
-CONFIG_BOARD_BCM963XX=y
-CONFIG_BOARD_LIVEBOX=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_CEVT_R4K=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
-CONFIG_CMDLINE_BOOL=y
-# CONFIG_CMDLINE_OVERRIDE is not set
-CONFIG_CPU_BIG_ENDIAN=y
-CONFIG_CPU_BMIPS=y
-CONFIG_CPU_BMIPS32_3300=y
-CONFIG_CPU_BMIPS4350=y
-CONFIG_CPU_GENERIC_DUMP_TLB=y
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_R4K_CACHE_TLB=y
-CONFIG_CPU_R4K_FPU=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_CSRC_R4K=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_FIRMWARE_IN_KERNEL=y
-CONFIG_GENERIC_ATOMIC64=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-CONFIG_GENERIC_CMOS_UPDATE=y
-CONFIG_GENERIC_IO=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_74X164=y
-CONFIG_GPIO_DEVRES=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_HAMRADIO is not set
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_ARCH_KGDB=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_CLK=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_HAVE_DEBUG_KMEMLEAK=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_DMA_ATTRS=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_HAVE_GENERIC_HARDIRQS=y
-CONFIG_HAVE_IDE=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
-CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
-CONFIG_HAVE_NET_DSA=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_HW_HAS_PCI=y
-CONFIG_HW_RANDOM=y
-CONFIG_HW_RANDOM_BCM63XX=y
-CONFIG_HZ=250
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-CONFIG_HZ_PERIODIC=y
-CONFIG_IMAGE_CMDLINE_HACK=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-CONFIG_IRQ_CPU=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_WORK=y
-CONFIG_KEXEC=y
-CONFIG_LEDS_GPIO=y
-CONFIG_M25PXX_USE_FAST_READ=y
-CONFIG_MDIO_BOARDINFO=y
-CONFIG_MIPS=y
-# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_MIPS_MACHINE is not set
-CONFIG_MIPS_MT_DISABLED=y
-CONFIG_MODULES_USE_ELF_REL=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MTD_BCM63XX_PARTS=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_BE_BYTE_SWAP=y
-# CONFIG_MTD_CFI_GEOMETRY is not set
-# CONFIG_MTD_CFI_NOSWAP is not set
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_CMDLINE_PARTS=y
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NEED_PER_CPU_KM=y
-CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
-CONFIG_NR_CPUS_DEFAULT_2=y
-CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_PCI=y
-# CONFIG_PCIEAER is not set
-CONFIG_PCIEPORTBUS=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PHYLIB=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_POSIX_MQUEUE_SYSCTL=y
-# CONFIG_PREEMPT_RCU is not set
-# CONFIG_RCU_STALL_COMMON is not set
-CONFIG_RELAY=y
-CONFIG_RTL8366_SMI=y
-CONFIG_RTL8367_PHY=y
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SERIAL_8250 is not set
-CONFIG_SERIAL_BCM63XX=y
-CONFIG_SERIAL_BCM63XX_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_SPI_BCM63XX=y
-CONFIG_SPI_BCM63XX_HSSPI=y
-CONFIG_SPI_BITBANG=y
-CONFIG_SPI_GPIO=y
-CONFIG_SPI_MASTER=y
-CONFIG_SQUASHFS_EMBEDDED=y
-CONFIG_SSB=y
-CONFIG_SSB_B43_PCI_BRIDGE=y
-CONFIG_SSB_BLOCKIO=y
-# CONFIG_SSB_DRIVER_MIPS is not set
-CONFIG_SSB_DRIVER_PCICORE=y
-CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
-CONFIG_SSB_PCIHOST=y
-CONFIG_SSB_PCIHOST_POSSIBLE=y
-CONFIG_SSB_SPROM=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_SWCONFIG=y
-CONFIG_SYNC_R4K=y
-CONFIG_SYS_HAS_CPU_BMIPS=y
-CONFIG_SYS_HAS_CPU_BMIPS32_3300=y
-CONFIG_SYS_HAS_CPU_BMIPS4350=y
-CONFIG_SYS_HAS_EARLY_PRINTK=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
-CONFIG_SYS_SUPPORTS_SMP=y
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_UIDGID_CONVERTED=y
-CONFIG_USB_ARCH_HAS_XHCI=y
-CONFIG_USB_SUPPORT=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_WEAK_ORDERING=y
-CONFIG_ZONE_DMA_FLAG=0

target/linux/brcm63xx/patches-3.10/030-MTD-bcm63xxpart-use-size-macro-for-CFE-block-size.patch

@@ -1,29 +0,0 @@
-From e2092cf1b164ede62b740c7c95905171fb6232ff Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 23 Mar 2013 12:32:56 +0100
-Subject: [PATCH v2 1/3] MTD: bcm63xxpart: use size macro for CFE block size
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- drivers/mtd/bcm63xxpart.c |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/mtd/bcm63xxpart.c
-+++ b/drivers/mtd/bcm63xxpart.c
-@@ -27,6 +27,7 @@
- #include <linux/crc32.h>
- #include <linux/module.h>
- #include <linux/kernel.h>
-+#include <linux/sizes.h>
- #include <linux/slab.h>
- #include <linux/vmalloc.h>
- #include <linux/mtd/mtd.h>
-@@ -37,7 +38,7 @@
- 
- #define BCM63XX_EXTENDED_SIZE	0xBFC00000	/* Extended flash address */
- 
--#define BCM63XX_CFE_BLOCK_SIZE	0x10000		/* always at least 64KiB */
-+#define BCM63XX_CFE_BLOCK_SIZE	SZ_64K		/* always at least 64KiB */
- 
- #define BCM63XX_CFE_MAGIC_OFFSET 0x4e0
- 

target/linux/brcm63xx/patches-3.10/031-MIPS-BCM63XX-export-PSI-size-from-nvram.patch

@@ -1,58 +0,0 @@
-From bda508f975d1372568a4fc9862be501a6176fd46 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 12 May 2012 23:04:17 +0200
-Subject: [PATCH v2 2/3] MIPS: BCM63XX: export PSI size from nvram
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/nvram.c                          |   13 +++++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h |    7 +++++++
- 2 files changed, 20 insertions(+)
-
---- a/arch/mips/bcm63xx/nvram.c
-+++ b/arch/mips/bcm63xx/nvram.c
-@@ -15,6 +15,7 @@
- #include <linux/export.h>
- #include <linux/kernel.h>
- #include <linux/if_ether.h>
-+#include <linux/sizes.h>
- 
- #include <bcm63xx_nvram.h>
- 
-@@ -35,6 +36,8 @@ struct bcm963xx_nvram {
- 	u32	checksum_high;
- };
- 
-+#define BCM63XX_DEFAULT_PSI_SIZE	SZ_64K
-+
- static struct bcm963xx_nvram nvram;
- static int mac_addr_used;
- 
-@@ -104,3 +107,13 @@ int bcm63xx_nvram_get_mac_address(u8 *ma
- 	return 0;
- }
- EXPORT_SYMBOL(bcm63xx_nvram_get_mac_address);
-+
-+unsigned int bcm63xx_nvram_get_psi_size(void)
-+{
-+	/* max is 64k, but some vendors use higher values */
-+	if (nvram.psi_size > 0 && nvram.psi_size <= 512)
-+		return nvram.psi_size * SZ_1K;
-+
-+	return BCM63XX_DEFAULT_PSI_SIZE;
-+}
-+EXPORT_SYMBOL(bcm63xx_nvram_get_psi_size);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h
-@@ -30,4 +30,11 @@ u8 *bcm63xx_nvram_get_name(void);
-  */
- int bcm63xx_nvram_get_mac_address(u8 *mac);
- 
-+/**
-+ * bcm63xx_nvram_get_psi_size() - returns the size of the PSI area
-+ *
-+ * Returns the size of the Persitent Storage Information area in bytes.
-+ */
-+unsigned int bcm63xx_nvram_get_psi_size(void);
-+
- #endif /* BCM63XX_NVRAM_H */

target/linux/brcm63xx/patches-3.10/032-MTD-bcm63xxpart-use-nvram-for-PSI-size.patch

@@ -1,42 +0,0 @@
-From f6eefaa4a08ec27c69485c2fc4db23247b84f8c9 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Tue, 1 May 2012 14:10:39 +0200
-Subject: [PATCH v2 3/3] MTD: bcm63xxpart: use nvram for PSI size
-
-Read out the SPI size from nvram instead of defaulting to 64K - some
-vendors actually use values larger than the "max" value of 64.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- drivers/mtd/bcm63xxpart.c |    6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
---- a/drivers/mtd/bcm63xxpart.c
-+++ b/drivers/mtd/bcm63xxpart.c
-@@ -4,7 +4,7 @@
-  * Copyright © 2006-2008  Florian Fainelli <[email protected]>
-  *			  Mike Albon <[email protected]>
-  * Copyright © 2009-2010  Daniel Dickinson <[email protected]>
-- * Copyright © 2011-2012  Jonas Gorski <[email protected]>
-+ * Copyright © 2011-2013  Jonas Gorski <[email protected]>
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License as published by
-@@ -34,6 +34,7 @@
- #include <linux/mtd/partitions.h>
- 
- #include <linux/bcm963xx_tag.h>
-+#include <asm/mach-bcm63xx/bcm63xx_nvram.h>
- #include <asm/mach-bcm63xx/board_bcm963xx.h>
- 
- #define BCM63XX_EXTENDED_SIZE	0xBFC00000	/* Extended flash address */
-@@ -91,7 +92,8 @@ static int bcm63xx_parse_cfe_partitions(
- 			      BCM63XX_CFE_BLOCK_SIZE);
- 
- 	cfelen = cfe_erasesize;
--	nvramlen = cfe_erasesize;
-+	nvramlen = bcm63xx_nvram_get_psi_size();
-+	nvramlen = roundup(nvramlen, cfe_erasesize);
- 
- 	/* Allocate memory for buffer */
- 	buf = vmalloc(sizeof(struct bcm_tag));

target/linux/brcm63xx/patches-3.10/033-MIPS-BCM63XX-Handle-SW-IRQs-0-1.patch

@@ -1,28 +0,0 @@
-From 1a66581c94ad3966a823f2efaf8a5cc514895318 Mon Sep 17 00:00:00 2001
-From: Kevin Cernekee <[email protected]>
-Date: Mon, 31 Oct 2011 11:52:10 -0700
-Subject: [PATCH 2/3] MIPS: BCM63XX: Handle SW IRQs 0-1
-
-MIPS software IRQs 0 and 1 are used for interprocessor signaling (IPI)
-on BMIPS SMP.  Make the board support code aware of them.
-
-Signed-off-by: Kevin Cernekee <[email protected]>
-[[email protected]: move sw irqs behind timer irq]
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/irq.c |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -294,6 +294,10 @@ asmlinkage void plat_irq_dispatch(void)
- 
- 		if (cause & CAUSEF_IP7)
- 			do_IRQ(7);
-+		if (cause & CAUSEF_IP0)
-+			do_IRQ(0);
-+		if (cause & CAUSEF_IP1)
-+			do_IRQ(1);
- 		if (cause & CAUSEF_IP2)
- 			dispatch_internal();
- 		if (!is_ext_irq_cascaded) {

target/linux/brcm63xx/patches-3.10/034-MIPS-BCM63XX-select-BMIPS4350-and-default-to-2-CPUs-.patch

@@ -1,27 +0,0 @@
-From 158a11f25e070a6ed99cf8faa985da1f2669230f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 21 Apr 2013 14:44:00 +0200
-Subject: [PATCH 3/3] MIPS: BCM63XX: select BMIPS4350 and default to 2 CPUs
- for supported SoCs
-
-All BCM63XX SoCs starting with BCM6358 have a BMIPS4350 instead of a
-BMIPS3300, so select it unless support for any of the older SoCs is
-selected.
-All BMIPS4350 have only two CPUs, so select the appropriate default.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/Kconfig |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -129,6 +129,8 @@ config BCM63XX
- 	select DMA_NONCOHERENT
- 	select IRQ_CPU
- 	select SYS_HAS_CPU_MIPS32_R1
-+	select SYS_HAS_CPU_BMIPS4350 if !BCM63XX_CPU_6338 && !BCM63XX_CPU_6345 && !BCM63XX_CPU_6348
-+	select NR_CPUS_DEFAULT_2
- 	select SYS_SUPPORTS_32BIT_KERNEL
- 	select SYS_SUPPORTS_BIG_ENDIAN
- 	select SYS_HAS_EARLY_PRINTK

target/linux/brcm63xx/patches-3.10/035-MIPS-BCM63XX-select-BOOT_RAW.patch

@@ -1,30 +0,0 @@
-From 373eb1a286bf31b41f966d5d3826cfe63e826c92 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Tue, 18 Jun 2013 16:55:39 +0000
-Subject: [PATCH 1/6] MIPS: BCM63XX: select BOOT_RAW
-
-Enabling BOOT_RAW is mandatory to get a binary image (objcopy from ELF
-to binary) to work. This does not affect the ELF kernels which are used
-by CFE on BCM63XX DSL platforms, but is going to be necessary to support
-BCM63XX on Cable Modem chips such as BCM3368.
-
-Signed-off-by: Florian Fainelli <[email protected]>
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Patchwork: https://patchwork.linux-mips.org/patch/5500/
-Signed-off-by: Ralf Baechle <[email protected]>
----
- arch/mips/Kconfig |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -124,6 +124,7 @@ config BCM47XX
- 
- config BCM63XX
- 	bool "Broadcom BCM63XX based boards"
-+	select BOOT_RAW
- 	select CEVT_R4K
- 	select CSRC_R4K
- 	select DMA_NONCOHERENT

target/linux/brcm63xx/patches-3.10/036-MIPS-BCM63XX-add-support-for-BCM3368-Cable-Modem.patch

@@ -1,629 +0,0 @@
-From 31c761c9c1fa91bf4ed83d75dcbc4e426ea2b670 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Tue, 18 Jun 2013 16:55:40 +0000
-Subject: [PATCH 2/6] MIPS: BCM63XX: add support for BCM3368 Cable Modem
-
-The Broadcom BCM3368 Cable Modem SoC is extremely similar to the
-existing BCM63xx DSL SoCs, in particular BCM6358, therefore little effort
-in the existing code base is required to get it supported. This patch adds
-support for the following on-chip peripherals:
-
-- two UARTS
-- GPIO
-- Ethernet
-- SPI
-- PCI
-- NOR Flash
-
-The most noticeable difference with 3368 is that it has its peripheral
-register at 0xfff8_0000 we check that separately in ioremap.h. Since
-3368 is identical to 6358 for its clock and reset bits, we use them
-verbatim.
-
-Signed-off-by: Florian Fainelli <[email protected]>
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Patchwork: https://patchwork.linux-mips.org/patch/5499/
-Signed-off-by: Ralf Baechle <[email protected]>
----
- arch/mips/bcm63xx/Kconfig                         |    4 +
- arch/mips/bcm63xx/clk.c                           |   18 ++--
- arch/mips/bcm63xx/cpu.c                           |   28 +++++-
- arch/mips/bcm63xx/dev-flash.c                     |    1 +
- arch/mips/bcm63xx/dev-spi.c                       |    6 +-
- arch/mips/bcm63xx/dev-uart.c                      |    3 +-
- arch/mips/bcm63xx/irq.c                           |   19 ++++
- arch/mips/bcm63xx/prom.c                          |    4 +-
- arch/mips/bcm63xx/reset.c                         |   29 +++++-
- arch/mips/bcm63xx/setup.c                         |    3 +
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h  |  110 +++++++++++++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h |    1 +
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |   45 ++++++++-
- arch/mips/include/asm/mach-bcm63xx/ioremap.h      |    4 +
- arch/mips/pci/pci-bcm63xx.c                       |    3 +-
- 15 files changed, 259 insertions(+), 19 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -1,6 +1,10 @@
- menu "CPU support"
- 	depends on BCM63XX
- 
-+config BCM63XX_CPU_3368
-+	bool "support 3368 CPU"
-+	select HW_HAS_PCI
-+
- config BCM63XX_CPU_6328
- 	bool "support 6328 CPU"
- 	select HW_HAS_PCI
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -84,7 +84,7 @@ static void enetx_set(struct clk *clk, i
- 	else
- 		clk_disable_unlocked(&clk_enet_misc);
- 
--	if (BCMCPU_IS_6358()) {
-+	if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
- 		u32 mask;
- 
- 		if (clk->id == 0)
-@@ -110,9 +110,8 @@ static struct clk clk_enet1 = {
-  */
- static void ephy_set(struct clk *clk, int enable)
- {
--	if (!BCMCPU_IS_6358())
--		return;
--	bcm_hwclock_set(CKCTL_6358_EPHY_EN, enable);
-+	if (BCMCPU_IS_3368() || BCMCPU_IS_6358())
-+		bcm_hwclock_set(CKCTL_6358_EPHY_EN, enable);
- }
- 
- 
-@@ -155,9 +154,10 @@ static struct clk clk_enetsw = {
-  */
- static void pcm_set(struct clk *clk, int enable)
- {
--	if (!BCMCPU_IS_6358())
--		return;
--	bcm_hwclock_set(CKCTL_6358_PCM_EN, enable);
-+	if (BCMCPU_IS_3368())
-+		bcm_hwclock_set(CKCTL_3368_PCM_EN, enable);
-+	if (BCMCPU_IS_6358())
-+		bcm_hwclock_set(CKCTL_6358_PCM_EN, enable);
- }
- 
- static struct clk clk_pcm = {
-@@ -211,7 +211,7 @@ static void spi_set(struct clk *clk, int
- 		mask = CKCTL_6338_SPI_EN;
- 	else if (BCMCPU_IS_6348())
- 		mask = CKCTL_6348_SPI_EN;
--	else if (BCMCPU_IS_6358())
-+	else if (BCMCPU_IS_3368() || BCMCPU_IS_6358())
- 		mask = CKCTL_6358_SPI_EN;
- 	else if (BCMCPU_IS_6362())
- 		mask = CKCTL_6362_SPI_EN;
-@@ -338,7 +338,7 @@ struct clk *clk_get(struct device *dev,
- 		return &clk_xtm;
- 	if (!strcmp(id, "periph"))
- 		return &clk_periph;
--	if (BCMCPU_IS_6358() && !strcmp(id, "pcm"))
-+	if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm"))
- 		return &clk_pcm;
- 	if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec"))
- 		return &clk_ipsec;
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -29,6 +29,14 @@ static u8 bcm63xx_cpu_rev;
- static unsigned int bcm63xx_cpu_freq;
- static unsigned int bcm63xx_memory_size;
- 
-+static const unsigned long bcm3368_regs_base[] = {
-+	__GEN_CPU_REGS_TABLE(3368)
-+};
-+
-+static const int bcm3368_irqs[] = {
-+	__GEN_CPU_IRQ_TABLE(3368)
-+};
-+
- static const unsigned long bcm6328_regs_base[] = {
- 	__GEN_CPU_REGS_TABLE(6328)
- };
-@@ -116,6 +124,9 @@ unsigned int bcm63xx_get_memory_size(voi
- static unsigned int detect_cpu_clock(void)
- {
- 	switch (bcm63xx_get_cpu_id()) {
-+	case BCM3368_CPU_ID:
-+		return 300000000;
-+
- 	case BCM6328_CPU_ID:
- 	{
- 		unsigned int tmp, mips_pll_fcvo;
-@@ -266,7 +277,7 @@ static unsigned int detect_memory_size(v
- 		banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1;
- 	}
- 
--	if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
-+	if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
- 		val = bcm_memc_readl(MEMC_CFG_REG);
- 		rows = (val & MEMC_CFG_ROW_MASK) >> MEMC_CFG_ROW_SHIFT;
- 		cols = (val & MEMC_CFG_COL_MASK) >> MEMC_CFG_COL_SHIFT;
-@@ -302,10 +313,17 @@ void __init bcm63xx_cpu_init(void)
- 		chipid_reg = BCM_6345_PERF_BASE;
- 		break;
- 	case CPU_BMIPS4350:
--		if ((read_c0_prid() & 0xf0) == 0x10)
-+		switch ((read_c0_prid() & 0xff)) {
-+		case 0x04:
-+			chipid_reg = BCM_3368_PERF_BASE;
-+			break;
-+		case 0x10:
- 			chipid_reg = BCM_6345_PERF_BASE;
--		else
-+			break;
-+		default:
- 			chipid_reg = BCM_6368_PERF_BASE;
-+			break;
-+		}
- 		break;
- 	}
- 
-@@ -322,6 +340,10 @@ void __init bcm63xx_cpu_init(void)
- 	bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
- 
- 	switch (bcm63xx_cpu_id) {
-+	case BCM3368_CPU_ID:
-+		bcm63xx_regs_base = bcm3368_regs_base;
-+		bcm63xx_irqs = bcm3368_irqs;
-+		break;
- 	case BCM6328_CPU_ID:
- 		bcm63xx_regs_base = bcm6328_regs_base;
- 		bcm63xx_irqs = bcm6328_irqs;
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -71,6 +71,7 @@ static int __init bcm63xx_detect_flash_t
- 	case BCM6348_CPU_ID:
- 		/* no way to auto detect so assume parallel */
- 		return BCM63XX_FLASH_TYPE_PARALLEL;
-+	case BCM3368_CPU_ID:
- 	case BCM6358_CPU_ID:
- 		val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
- 		if (val & STRAPBUS_6358_BOOT_SEL_PARALLEL)
---- a/arch/mips/bcm63xx/dev-spi.c
-+++ b/arch/mips/bcm63xx/dev-spi.c
-@@ -37,7 +37,8 @@ static __init void bcm63xx_spi_regs_init
- {
- 	if (BCMCPU_IS_6338() || BCMCPU_IS_6348())
- 		bcm63xx_regs_spi = bcm6348_regs_spi;
--	if (BCMCPU_IS_6358() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
-+	if (BCMCPU_IS_3368() || BCMCPU_IS_6358() ||
-+		BCMCPU_IS_6362() || BCMCPU_IS_6368())
- 		bcm63xx_regs_spi = bcm6358_regs_spi;
- }
- #else
-@@ -87,7 +88,8 @@ int __init bcm63xx_spi_register(void)
- 		spi_pdata.msg_ctl_width = SPI_6348_MSG_CTL_WIDTH;
- 	}
- 
--	if (BCMCPU_IS_6358() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
-+	if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
-+		BCMCPU_IS_6368()) {
- 		spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
- 		spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
- 		spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT;
---- a/arch/mips/bcm63xx/dev-uart.c
-+++ b/arch/mips/bcm63xx/dev-uart.c
-@@ -54,7 +54,8 @@ int __init bcm63xx_uart_register(unsigne
- 	if (id >= ARRAY_SIZE(bcm63xx_uart_devices))
- 		return -ENODEV;
- 
--	if (id == 1 && (!BCMCPU_IS_6358() && !BCMCPU_IS_6368()))
-+	if (id == 1 && (!BCMCPU_IS_3368() && !BCMCPU_IS_6358() &&
-+		!BCMCPU_IS_6368()))
- 		return -ENODEV;
- 
- 	if (id == 0) {
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -27,6 +27,17 @@ static void __internal_irq_unmask_32(uns
- static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
- 
- #ifndef BCMCPU_RUNTIME_DETECT
-+#ifdef CONFIG_BCM63XX_CPU_3368
-+#define irq_stat_reg		PERF_IRQSTAT_3368_REG
-+#define irq_mask_reg		PERF_IRQMASK_3368_REG
-+#define irq_bits		32
-+#define is_ext_irq_cascaded	0
-+#define ext_irq_start		0
-+#define ext_irq_end		0
-+#define ext_irq_count		4
-+#define ext_irq_cfg_reg1	PERF_EXTIRQ_CFG_REG_3368
-+#define ext_irq_cfg_reg2	0
-+#endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- #define irq_stat_reg		PERF_IRQSTAT_6328_REG
- #define irq_mask_reg		PERF_IRQMASK_6328_REG
-@@ -140,6 +151,13 @@ static void bcm63xx_init_irq(void)
- 	irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
- 
- 	switch (bcm63xx_get_cpu_id()) {
-+	case BCM3368_CPU_ID:
-+		irq_stat_addr += PERF_IRQSTAT_3368_REG;
-+		irq_mask_addr += PERF_IRQMASK_3368_REG;
-+		irq_bits = 32;
-+		ext_irq_count = 4;
-+		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
-+		break;
- 	case BCM6328_CPU_ID:
- 		irq_stat_addr += PERF_IRQSTAT_6328_REG;
- 		irq_mask_addr += PERF_IRQMASK_6328_REG;
-@@ -479,6 +497,7 @@ static int bcm63xx_external_irq_set_type
- 			reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
- 		break;
- 
-+	case BCM3368_CPU_ID:
- 	case BCM6328_CPU_ID:
- 	case BCM6338_CPU_ID:
- 	case BCM6345_CPU_ID:
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -26,7 +26,9 @@ void __init prom_init(void)
- 	bcm_wdt_writel(WDT_STOP_2, WDT_CTL_REG);
- 
- 	/* disable all hardware blocks clock for now */
--	if (BCMCPU_IS_6328())
-+	if (BCMCPU_IS_3368())
-+		mask = CKCTL_3368_ALL_SAFE_EN;
-+	else if (BCMCPU_IS_6328())
- 		mask = CKCTL_6328_ALL_SAFE_EN;
- 	else if (BCMCPU_IS_6338())
- 		mask = CKCTL_6338_ALL_SAFE_EN;
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -30,6 +30,19 @@
- 	[BCM63XX_RESET_PCIE]		= BCM## __cpu ##_RESET_PCIE,	\
- 	[BCM63XX_RESET_PCIE_EXT]	= BCM## __cpu ##_RESET_PCIE_EXT,
- 
-+#define BCM3368_RESET_SPI	SOFTRESET_3368_SPI_MASK
-+#define BCM3368_RESET_ENET	SOFTRESET_3368_ENET_MASK
-+#define BCM3368_RESET_USBH	0
-+#define BCM3368_RESET_USBD	SOFTRESET_3368_USBS_MASK
-+#define BCM3368_RESET_DSL	0
-+#define BCM3368_RESET_SAR	0
-+#define BCM3368_RESET_EPHY	SOFTRESET_3368_EPHY_MASK
-+#define BCM3368_RESET_ENETSW	0
-+#define BCM3368_RESET_PCM	SOFTRESET_3368_PCM_MASK
-+#define BCM3368_RESET_MPI	SOFTRESET_3368_MPI_MASK
-+#define BCM3368_RESET_PCIE	0
-+#define BCM3368_RESET_PCIE_EXT	0
-+
- #define BCM6328_RESET_SPI	SOFTRESET_6328_SPI_MASK
- #define BCM6328_RESET_ENET	0
- #define BCM6328_RESET_USBH	SOFTRESET_6328_USBH_MASK
-@@ -117,6 +130,10 @@
- /*
-  * core reset bits
-  */
-+static const u32 bcm3368_reset_bits[] = {
-+	__GEN_RESET_BITS_TABLE(3368)
-+};
-+
- static const u32 bcm6328_reset_bits[] = {
- 	__GEN_RESET_BITS_TABLE(6328)
- };
-@@ -146,7 +163,10 @@ static int reset_reg;
- 
- static int __init bcm63xx_reset_bits_init(void)
- {
--	if (BCMCPU_IS_6328()) {
-+	if (BCMCPU_IS_3368()) {
-+		reset_reg = PERF_SOFTRESET_6358_REG;
-+		bcm63xx_reset_bits = bcm3368_reset_bits;
-+	} else if (BCMCPU_IS_6328()) {
- 		reset_reg = PERF_SOFTRESET_6328_REG;
- 		bcm63xx_reset_bits = bcm6328_reset_bits;
- 	} else if (BCMCPU_IS_6338()) {
-@@ -170,6 +190,13 @@ static int __init bcm63xx_reset_bits_ini
- }
- #else
- 
-+#ifdef CONFIG_BCM63XX_CPU_3368
-+static const u32 bcm63xx_reset_bits[] = {
-+	__GEN_RESET_BITS_TABLE(3368)
-+};
-+#define reset_reg PERF_SOFTRESET_6358_REG
-+#endif
-+
- #ifdef CONFIG_BCM63XX_CPU_6328
- static const u32 bcm63xx_reset_bits[] = {
- 	__GEN_RESET_BITS_TABLE(6328)
---- a/arch/mips/bcm63xx/setup.c
-+++ b/arch/mips/bcm63xx/setup.c
-@@ -68,6 +68,9 @@ void bcm63xx_machine_reboot(void)
- 
- 	/* mask and clear all external irq */
- 	switch (bcm63xx_get_cpu_id()) {
-+	case BCM3368_CPU_ID:
-+		perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368;
-+		break;
- 	case BCM6328_CPU_ID:
- 		perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328;
- 		break;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -9,6 +9,7 @@
-  * compile time if only one CPU support is enabled (idea stolen from
-  * arm mach-types)
-  */
-+#define BCM3368_CPU_ID		0x3368
- #define BCM6328_CPU_ID		0x6328
- #define BCM6338_CPU_ID		0x6338
- #define BCM6345_CPU_ID		0x6345
-@@ -22,6 +23,19 @@ u16 __bcm63xx_get_cpu_id(void);
- u8 bcm63xx_get_cpu_rev(void);
- unsigned int bcm63xx_get_cpu_freq(void);
- 
-+#ifdef CONFIG_BCM63XX_CPU_3368
-+# ifdef bcm63xx_get_cpu_id
-+#  undef bcm63xx_get_cpu_id
-+#  define bcm63xx_get_cpu_id()	__bcm63xx_get_cpu_id()
-+#  define BCMCPU_RUNTIME_DETECT
-+# else
-+#  define bcm63xx_get_cpu_id()	BCM3368_CPU_ID
-+# endif
-+# define BCMCPU_IS_3368()	(bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
-+#else
-+# define BCMCPU_IS_3368()	(0)
-+#endif
-+
- #ifdef CONFIG_BCM63XX_CPU_6328
- # ifdef bcm63xx_get_cpu_id
- #  undef bcm63xx_get_cpu_id
-@@ -191,6 +205,53 @@ enum bcm63xx_regs_set {
- #define RSET_RNG_SIZE			20
- 
- /*
-+ * 3368 register sets base address
-+ */
-+#define BCM_3368_DSL_LMEM_BASE		(0xdeadbeef)
-+#define BCM_3368_PERF_BASE		(0xfff8c000)
-+#define BCM_3368_TIMER_BASE		(0xfff8c040)
-+#define BCM_3368_WDT_BASE		(0xfff8c080)
-+#define BCM_3368_UART0_BASE		(0xfff8c100)
-+#define BCM_3368_UART1_BASE		(0xfff8c120)
-+#define BCM_3368_GPIO_BASE		(0xfff8c080)
-+#define BCM_3368_SPI_BASE		(0xfff8c800)
-+#define BCM_3368_HSSPI_BASE		(0xdeadbeef)
-+#define BCM_3368_UDC0_BASE		(0xdeadbeef)
-+#define BCM_3368_USBDMA_BASE		(0xdeadbeef)
-+#define BCM_3368_OHCI0_BASE		(0xdeadbeef)
-+#define BCM_3368_OHCI_PRIV_BASE		(0xdeadbeef)
-+#define BCM_3368_USBH_PRIV_BASE		(0xdeadbeef)
-+#define BCM_3368_USBD_BASE		(0xdeadbeef)
-+#define BCM_3368_MPI_BASE		(0xfff80000)
-+#define BCM_3368_PCMCIA_BASE		(0xfff80054)
-+#define BCM_3368_PCIE_BASE		(0xdeadbeef)
-+#define BCM_3368_SDRAM_REGS_BASE	(0xdeadbeef)
-+#define BCM_3368_DSL_BASE		(0xdeadbeef)
-+#define BCM_3368_UBUS_BASE		(0xdeadbeef)
-+#define BCM_3368_ENET0_BASE		(0xfff98000)
-+#define BCM_3368_ENET1_BASE		(0xfff98800)
-+#define BCM_3368_ENETDMA_BASE		(0xfff99800)
-+#define BCM_3368_ENETDMAC_BASE		(0xfff99900)
-+#define BCM_3368_ENETDMAS_BASE		(0xfff99a00)
-+#define BCM_3368_ENETSW_BASE		(0xdeadbeef)
-+#define BCM_3368_EHCI0_BASE		(0xdeadbeef)
-+#define BCM_3368_SDRAM_BASE		(0xdeadbeef)
-+#define BCM_3368_MEMC_BASE		(0xfff84000)
-+#define BCM_3368_DDR_BASE		(0xdeadbeef)
-+#define BCM_3368_M2M_BASE		(0xdeadbeef)
-+#define BCM_3368_ATM_BASE		(0xdeadbeef)
-+#define BCM_3368_XTM_BASE		(0xdeadbeef)
-+#define BCM_3368_XTMDMA_BASE		(0xdeadbeef)
-+#define BCM_3368_XTMDMAC_BASE		(0xdeadbeef)
-+#define BCM_3368_XTMDMAS_BASE		(0xdeadbeef)
-+#define BCM_3368_PCM_BASE		(0xfff9c200)
-+#define BCM_3368_PCMDMA_BASE		(0xdeadbeef)
-+#define BCM_3368_PCMDMAC_BASE		(0xdeadbeef)
-+#define BCM_3368_PCMDMAS_BASE		(0xdeadbeef)
-+#define BCM_3368_RNG_BASE		(0xdeadbeef)
-+#define BCM_3368_MISC_BASE		(0xdeadbeef)
-+
-+/*
-  * 6328 register sets base address
-  */
- #define BCM_6328_DSL_LMEM_BASE		(0xdeadbeef)
-@@ -620,6 +681,9 @@ static inline unsigned long bcm63xx_regs
- #ifdef BCMCPU_RUNTIME_DETECT
- 	return bcm63xx_regs_base[set];
- #else
-+#ifdef CONFIG_BCM63XX_CPU_3368
-+	__GEN_RSET(3368)
-+#endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- 	__GEN_RSET(6328)
- #endif
-@@ -687,6 +751,52 @@ enum bcm63xx_irq {
- };
- 
- /*
-+ * 3368 irqs
-+ */
-+#define BCM_3368_TIMER_IRQ		(IRQ_INTERNAL_BASE + 0)
-+#define BCM_3368_SPI_IRQ		(IRQ_INTERNAL_BASE + 1)
-+#define BCM_3368_UART0_IRQ		(IRQ_INTERNAL_BASE + 2)
-+#define BCM_3368_UART1_IRQ		(IRQ_INTERNAL_BASE + 3)
-+#define BCM_3368_DSL_IRQ		0
-+#define BCM_3368_UDC0_IRQ		0
-+#define BCM_3368_OHCI0_IRQ		0
-+#define BCM_3368_ENET0_IRQ		(IRQ_INTERNAL_BASE + 8)
-+#define BCM_3368_ENET1_IRQ		(IRQ_INTERNAL_BASE + 6)
-+#define BCM_3368_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 9)
-+#define BCM_3368_ENET0_RXDMA_IRQ	(IRQ_INTERNAL_BASE + 15)
-+#define BCM_3368_ENET0_TXDMA_IRQ	(IRQ_INTERNAL_BASE + 16)
-+#define BCM_3368_HSSPI_IRQ		0
-+#define BCM_3368_EHCI0_IRQ		0
-+#define BCM_3368_USBD_IRQ		0
-+#define BCM_3368_USBD_RXDMA0_IRQ	0
-+#define BCM_3368_USBD_TXDMA0_IRQ	0
-+#define BCM_3368_USBD_RXDMA1_IRQ	0
-+#define BCM_3368_USBD_TXDMA1_IRQ	0
-+#define BCM_3368_USBD_RXDMA2_IRQ	0
-+#define BCM_3368_USBD_TXDMA2_IRQ	0
-+#define BCM_3368_ENET1_RXDMA_IRQ        (IRQ_INTERNAL_BASE + 17)
-+#define BCM_3368_ENET1_TXDMA_IRQ        (IRQ_INTERNAL_BASE + 18)
-+#define BCM_3368_PCI_IRQ		(IRQ_INTERNAL_BASE + 31)
-+#define BCM_3368_PCMCIA_IRQ		0
-+#define BCM_3368_ATM_IRQ		0
-+#define BCM_3368_ENETSW_RXDMA0_IRQ	0
-+#define BCM_3368_ENETSW_RXDMA1_IRQ	0
-+#define BCM_3368_ENETSW_RXDMA2_IRQ	0
-+#define BCM_3368_ENETSW_RXDMA3_IRQ	0
-+#define BCM_3368_ENETSW_TXDMA0_IRQ	0
-+#define BCM_3368_ENETSW_TXDMA1_IRQ	0
-+#define BCM_3368_ENETSW_TXDMA2_IRQ	0
-+#define BCM_3368_ENETSW_TXDMA3_IRQ	0
-+#define BCM_3368_XTM_IRQ		0
-+#define BCM_3368_XTM_DMA0_IRQ		0
-+
-+#define BCM_3368_EXT_IRQ0		(IRQ_INTERNAL_BASE + 25)
-+#define BCM_3368_EXT_IRQ1		(IRQ_INTERNAL_BASE + 26)
-+#define BCM_3368_EXT_IRQ2		(IRQ_INTERNAL_BASE + 27)
-+#define BCM_3368_EXT_IRQ3		(IRQ_INTERNAL_BASE + 28)
-+
-+
-+/*
-  * 6328 irqs
-  */
- #define BCM_6328_HIGH_IRQ_BASE		(IRQ_INTERNAL_BASE + 32)
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-@@ -11,6 +11,7 @@ static inline unsigned long bcm63xx_gpio
- 	switch (bcm63xx_get_cpu_id()) {
- 	case BCM6328_CPU_ID:
- 		return 32;
-+	case BCM3368_CPU_ID:
- 	case BCM6358_CPU_ID:
- 		return 40;
- 	case BCM6338_CPU_ID:
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -15,6 +15,39 @@
- /* Clock Control register */
- #define PERF_CKCTL_REG			0x4
- 
-+#define CKCTL_3368_MAC_EN		(1 << 3)
-+#define CKCTL_3368_TC_EN		(1 << 5)
-+#define CKCTL_3368_US_TOP_EN		(1 << 6)
-+#define CKCTL_3368_DS_TOP_EN		(1 << 7)
-+#define CKCTL_3368_APM_EN		(1 << 8)
-+#define CKCTL_3368_SPI_EN		(1 << 9)
-+#define CKCTL_3368_USBS_EN		(1 << 10)
-+#define CKCTL_3368_BMU_EN		(1 << 11)
-+#define CKCTL_3368_PCM_EN		(1 << 12)
-+#define CKCTL_3368_NTP_EN		(1 << 13)
-+#define CKCTL_3368_ACP_B_EN		(1 << 14)
-+#define CKCTL_3368_ACP_A_EN		(1 << 15)
-+#define CKCTL_3368_EMUSB_EN		(1 << 17)
-+#define CKCTL_3368_ENET0_EN		(1 << 18)
-+#define CKCTL_3368_ENET1_EN		(1 << 19)
-+#define CKCTL_3368_USBU_EN		(1 << 20)
-+#define CKCTL_3368_EPHY_EN		(1 << 21)
-+
-+#define CKCTL_3368_ALL_SAFE_EN		(CKCTL_3368_MAC_EN | \
-+					 CKCTL_3368_TC_EN | \
-+					 CKCTL_3368_US_TOP_EN | \
-+					 CKCTL_3368_DS_TOP_EN | \
-+					 CKCTL_3368_APM_EN | \
-+					 CKCTL_3368_SPI_EN | \
-+					 CKCTL_3368_USBS_EN | \
-+					 CKCTL_3368_BMU_EN | \
-+					 CKCTL_3368_PCM_EN | \
-+					 CKCTL_3368_NTP_EN | \
-+					 CKCTL_3368_ACP_B_EN | \
-+					 CKCTL_3368_ACP_A_EN | \
-+					 CKCTL_3368_EMUSB_EN | \
-+					 CKCTL_3368_USBU_EN)
-+
- #define CKCTL_6328_PHYMIPS_EN		(1 << 0)
- #define CKCTL_6328_ADSL_QPROC_EN	(1 << 1)
- #define CKCTL_6328_ADSL_AFE_EN		(1 << 2)
-@@ -181,6 +214,7 @@
- #define SYS_PLL_SOFT_RESET		0x1
- 
- /* Interrupt Mask register */
-+#define PERF_IRQMASK_3368_REG		0xc
- #define PERF_IRQMASK_6328_REG		0x20
- #define PERF_IRQMASK_6338_REG		0xc
- #define PERF_IRQMASK_6345_REG		0xc
-@@ -190,6 +224,7 @@
- #define PERF_IRQMASK_6368_REG		0x20
- 
- /* Interrupt Status register */
-+#define PERF_IRQSTAT_3368_REG		0x10
- #define PERF_IRQSTAT_6328_REG		0x28
- #define PERF_IRQSTAT_6338_REG		0x10
- #define PERF_IRQSTAT_6345_REG		0x10
-@@ -199,6 +234,7 @@
- #define PERF_IRQSTAT_6368_REG		0x28
- 
- /* External Interrupt Configuration register */
-+#define PERF_EXTIRQ_CFG_REG_3368	0x14
- #define PERF_EXTIRQ_CFG_REG_6328	0x18
- #define PERF_EXTIRQ_CFG_REG_6338	0x14
- #define PERF_EXTIRQ_CFG_REG_6345	0x14
-@@ -236,6 +272,13 @@
- #define PERF_SOFTRESET_6362_REG		0x10
- #define PERF_SOFTRESET_6368_REG		0x10
- 
-+#define SOFTRESET_3368_SPI_MASK		(1 << 0)
-+#define SOFTRESET_3368_ENET_MASK	(1 << 2)
-+#define SOFTRESET_3368_MPI_MASK		(1 << 3)
-+#define SOFTRESET_3368_EPHY_MASK	(1 << 6)
-+#define SOFTRESET_3368_USBS_MASK	(1 << 11)
-+#define SOFTRESET_3368_PCM_MASK		(1 << 13)
-+
- #define SOFTRESET_6328_SPI_MASK		(1 << 0)
- #define SOFTRESET_6328_EPHY_MASK	(1 << 1)
- #define SOFTRESET_6328_SAR_MASK		(1 << 2)
-@@ -1293,7 +1336,7 @@
- #define SPI_6348_RX_DATA		0x80
- #define SPI_6348_RX_DATA_SIZE		0x3f
- 
--/* BCM 6358/6262/6368 SPI core */
-+/* BCM 3368/6358/6262/6368 SPI core */
- #define SPI_6358_MSG_CTL		0x00	/* 16-bits register */
- #define SPI_6358_MSG_CTL_WIDTH		16
- #define SPI_6358_MSG_DATA		0x02
---- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-@@ -11,6 +11,10 @@ static inline phys_t fixup_bigphys_addr(
- static inline int is_bcm63xx_internal_registers(phys_t offset)
- {
- 	switch (bcm63xx_get_cpu_id()) {
-+	case BCM3368_CPU_ID:
-+		if (offset >= 0xfff80000)
-+			return 1;
-+		break;
- 	case BCM6338_CPU_ID:
- 	case BCM6345_CPU_ID:
- 	case BCM6348_CPU_ID:
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -266,7 +266,7 @@ static int __init bcm63xx_register_pci(v
- 	/* setup PCI to local bus access, used by PCI device to target
- 	 * local RAM while bus mastering */
- 	bcm63xx_int_cfg_writel(0, PCI_BASE_ADDRESS_3);
--	if (BCMCPU_IS_6358() || BCMCPU_IS_6368())
-+	if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6368())
- 		val = MPI_SP0_REMAP_ENABLE_MASK;
- 	else
- 		val = 0;
-@@ -338,6 +338,7 @@ static int __init bcm63xx_pci_init(void)
- 	case BCM6328_CPU_ID:
- 	case BCM6362_CPU_ID:
- 		return bcm63xx_register_pcie();
-+	case BCM3368_CPU_ID:
- 	case BCM6348_CPU_ID:
- 	case BCM6358_CPU_ID:
- 	case BCM6368_CPU_ID:

target/linux/brcm63xx/patches-3.10/037-MIPS-BCM63XX-recognize-Cable-Modem-firmware-format.patch

@@ -1,101 +0,0 @@
-From f3b3faafe7b5a1c07b12d18e96c36bc8a0eecaed Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Tue, 18 Jun 2013 16:55:41 +0000
-Subject: [PATCH 3/6] MIPS: BCM63XX: recognize Cable Modem firmware format
-
-Add the firmware header format which is used by Broadcom Cable Modem
-SoCs such as the BCM3368 SoC. We export the bcm_hcs firmware format
-structure because it is used by user-land tools to create firmware
-images for these SoCs and will later be used by a corresponding MTD
-parser.
-
-Signed-off-by: Florian Fainelli <[email protected]>
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Patchwork: https://patchwork.linux-mips.org/patch/5496/
-Signed-off-by: Ralf Baechle <[email protected]>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c |   14 ++++++++++++--
- include/uapi/linux/Kbuild                 |    1 +
- include/uapi/linux/bcm933xx_hcs.h         |   24 ++++++++++++++++++++++++
- 3 files changed, 37 insertions(+), 2 deletions(-)
- create mode 100644 include/uapi/linux/bcm933xx_hcs.h
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -28,8 +28,12 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
- 
-+#include <uapi/linux/bcm933xx_hcs.h>
-+
- #define PFX	"board_bcm963xx: "
- 
-+#define HCS_OFFSET_128K			0x20000
-+
- static struct board_info board;
- 
- /*
-@@ -722,8 +726,9 @@ void __init board_prom_init(void)
- 	unsigned int i;
- 	u8 *boot_addr, *cfe;
- 	char cfe_version[32];
--	char *board_name;
-+	char *board_name = NULL;
- 	u32 val;
-+	struct bcm_hcs *hcs;
- 
- 	/* read base address of boot chip select (0)
- 	 * 6328/6362 do not have MPI but boot from a fixed address
-@@ -747,7 +752,12 @@ void __init board_prom_init(void)
- 
- 	bcm63xx_nvram_init(boot_addr + BCM963XX_NVRAM_OFFSET);
- 
--	board_name = bcm63xx_nvram_get_name();
-+	if (BCMCPU_IS_3368()) {
-+		hcs = (struct bcm_hcs *)boot_addr;
-+		board_name = hcs->filename;
-+	} else {
-+		board_name = bcm63xx_nvram_get_name();
-+	}
- 	/* find board by name */
- 	for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
- 		if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
---- a/include/uapi/linux/Kbuild
-+++ b/include/uapi/linux/Kbuild
-@@ -62,6 +62,7 @@ header-y += auxvec.h
- header-y += ax25.h
- header-y += b1lli.h
- header-y += baycom.h
-+header-y += bcm933xx_hcs.h
- header-y += bfs_fs.h
- header-y += binfmts.h
- header-y += blkpg.h
---- /dev/null
-+++ b/include/uapi/linux/bcm933xx_hcs.h
-@@ -0,0 +1,24 @@
-+/*
-+ * Broadcom Cable Modem firmware format
-+ */
-+
-+#ifndef __BCM933XX_HCS_H
-+#define __BCM933XX_HCS_H
-+
-+#include <linux/types.h>
-+
-+struct bcm_hcs {
-+	__u16 magic;
-+	__u16 control;
-+	__u16 rev_maj;
-+	__u16 rev_min;
-+	__u32 build_date;
-+	__u32 filelen;
-+	__u32 ldaddress;
-+	char filename[64];
-+	__u16 hcs;
-+	__u16 her_znaet_chto;
-+	__u32 crc;
-+};
-+
-+#endif /* __BCM933XX_HCS */

target/linux/brcm63xx/patches-3.10/038-MIPS-BCM63XX-provide-a-MAC-address-for-BCM3368-chips.patch

@@ -1,46 +0,0 @@
-From 404fdc457082772ff52e22988e09e82c0d6e8780 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Tue, 18 Jun 2013 16:55:42 +0000
-Subject: [PATCH 4/6] MIPS: BCM63XX: provide a MAC address for BCM3368 chips
-
-The BCM3368 SoC uses a NVRAM format which is not compatible with the one
-used by CFE, provide a default MAC address which is suitable for use and
-which is the default one also being used by the bootloader on these
-chips.
-
-Signed-off-by: Florian Fainelli <[email protected]>
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Patchwork: https://patchwork.linux-mips.org/patch/5498/
-Signed-off-by: Ralf Baechle <[email protected]>
----
- arch/mips/bcm63xx/nvram.c |   10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/arch/mips/bcm63xx/nvram.c
-+++ b/arch/mips/bcm63xx/nvram.c
-@@ -45,6 +45,7 @@ void __init bcm63xx_nvram_init(void *add
- {
- 	unsigned int check_len;
- 	u32 crc, expected_crc;
-+	u8 hcs_mac_addr[ETH_ALEN] = { 0x00, 0x10, 0x18, 0xff, 0xff, 0xff };
- 
- 	/* extract nvram data */
- 	memcpy(&nvram, addr, sizeof(nvram));
-@@ -65,6 +66,15 @@ void __init bcm63xx_nvram_init(void *add
- 	if (crc != expected_crc)
- 		pr_warn("nvram checksum failed, contents may be invalid (expected %08x, got %08x)\n",
- 			expected_crc, crc);
-+
-+	/* Cable modems have a different NVRAM which is embedded in the eCos
-+	 * firmware and not easily extractible, give at least a MAC address
-+	 * pool.
-+	 */
-+	if (BCMCPU_IS_3368()) {
-+		memcpy(nvram.mac_addr_base, hcs_mac_addr, ETH_ALEN);
-+		nvram.mac_addr_count = 2;
-+	}
- }
- 
- u8 *bcm63xx_nvram_get_name(void)

target/linux/brcm63xx/patches-3.10/039-MIPS-BCM63XX-let-board-specify-an-external-GPIO-to-r.patch

@@ -1,49 +0,0 @@
-From 0a97aafe7fe50ed183e7fa0121fa7838e2e20306 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Tue, 18 Jun 2013 16:55:43 +0000
-Subject: [PATCH 5/6] MIPS: BCM63XX: let board specify an external GPIO to
- reset PHY
-
-Some boards may need to reset their external PHY or switch they are
-attached to, add a hook for doing this along with providing custom
-linux/gpio.h flags for doing this.
-
-Signed-off-by: Florian Fainelli <[email protected]>
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Cc: Florian Fainelli <[email protected]>
-Patchwork: https://patchwork.linux-mips.org/patch/5501/
-Signed-off-by: Ralf Baechle <[email protected]>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c           |    4 ++++
- arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h |    6 ++++++
- 2 files changed, 10 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -883,5 +883,9 @@ int __init board_register_devices(void)
- 
- 	platform_device_register(&bcm63xx_gpio_leds);
- 
-+	if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
-+		gpio_request_one(board.ephy_reset_gpio,
-+				board.ephy_reset_gpio_flags, "ephy-reset");
-+
- 	return 0;
- }
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -45,6 +45,12 @@ struct board_info {
- 
- 	/* GPIO LEDs */
- 	struct gpio_led leds[5];
-+
-+	/* External PHY reset GPIO */
-+	unsigned int ephy_reset_gpio;
-+
-+	/* External PHY reset GPIO flags from gpio.h */
-+	unsigned long ephy_reset_gpio_flags;
- };
- 
- #endif /* ! BOARD_BCM963XX_H_ */

target/linux/brcm63xx/patches-3.10/040-MIPS-BCM63XX-add-support-for-the-Netgear-CVG834G.patch

@@ -1,70 +0,0 @@
-From 04760855f0d99a1cdc67ae0152d95bcc4525cff5 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Tue, 18 Jun 2013 16:55:44 +0000
-Subject: [PATCH 6/6] MIPS: BCM63XX: add support for the Netgear CVG834G
-
-Add support for the Netgear CVG834G and enable the two UARTs, Ethernet
-on the first MAC, PCI and the two leds.
-
-Signed-off-by: Florian Fainelli <[email protected]>
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Cc: Florian Fainelli <[email protected]>
-Patchwork: https://patchwork.linux-mips.org/patch/5502/
-Signed-off-by: Ralf Baechle <[email protected]>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c |   35 +++++++++++++++++++++++++++++
- 1 file changed, 35 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -37,6 +37,38 @@
- static struct board_info board;
- 
- /*
-+ * known 3368 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_3368
-+static struct board_info __initdata board_cvg834g = {
-+	.name				= "CVG834G_E15R3921",
-+	.expected_cpu_id		= 0x3368,
-+
-+	.has_uart0			= 1,
-+	.has_uart1			= 1,
-+
-+	.has_enet0			= 1,
-+	.has_pci			= 1,
-+
-+	.enet0 = {
-+		.has_phy		= 1,
-+		.use_internal_phy	= 1,
-+	},
-+
-+	.leds = {
-+		{
-+			.name		= "CVG834G:green:power",
-+			.gpio		= 37,
-+			.default_trigger= "default-on",
-+		},
-+	},
-+
-+	.ephy_reset_gpio		= 36,
-+	.ephy_reset_gpio_flags		= GPIOF_INIT_HIGH,
-+};
-+#endif
-+
-+/*
-  * known 6328 boards
-  */
- #ifdef CONFIG_BCM63XX_CPU_6328
-@@ -643,6 +675,9 @@ static struct board_info __initdata boar
-  * all boards
-  */
- static const struct board_info __initconst *bcm963xx_boards[] = {
-+#ifdef CONFIG_BCM63XX_CPU_3368
-+	&board_cvg834g,
-+#endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- 	&board_96328avng,
- #endif

target/linux/brcm63xx/patches-3.10/041-MIPS-BCM63XX-remove-bogus-Kconfig-selects.patch

@@ -1,47 +0,0 @@
-From 318883517ebc56e1f9068597e9875f578016e225 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Tue, 18 Jun 2013 16:55:38 +0000
-Subject: [PATCH] MIPS: BCM63XX: remove bogus Kconfig selects
-
-Remove the bogus selects on USB-related symbols for 6345 and 6338, not
-only we do not yet support USB on BCM63XX, but they also cause the
-following warnings:
-
-warning: (BCM63XX_CPU_6338 && BCM63XX_CPU_6345) selects
-USB_OHCI_BIG_ENDIAN_MMIO which has unmet direct dependencies
-(USB_SUPPORT && USB && USB_OHCI_HCD)
-warning: (BCM63XX_CPU_6338 && BCM63XX_CPU_6345) selects
-USB_OHCI_BIG_ENDIAN_DESC which has unmet direct dependencies
-(USB_SUPPORT && USB && USB_OHCI_HCD)
-make[4]: Leaving directory `/home/florian/dev/linux'
-
-Just get rid of these bogus Kconfig selects because neither 6345 nor
-6338 actually have built-in USB host controllers.
-
-Signed-off-by: Florian Fainelli <[email protected]>
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Patchwork: http://patchwork.linux-mips.org/patch/5497/
-Signed-off-by: Ralf Baechle <[email protected]>
----
- arch/mips/bcm63xx/Kconfig |    5 -----
- 1 file changed, 5 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -12,14 +12,9 @@ config BCM63XX_CPU_6328
- config BCM63XX_CPU_6338
- 	bool "support 6338 CPU"
- 	select HW_HAS_PCI
--	select USB_ARCH_HAS_OHCI
--	select USB_OHCI_BIG_ENDIAN_DESC
--	select USB_OHCI_BIG_ENDIAN_MMIO
- 
- config BCM63XX_CPU_6345
- 	bool "support 6345 CPU"
--	select USB_OHCI_BIG_ENDIAN_DESC
--	select USB_OHCI_BIG_ENDIAN_MMIO
- 
- config BCM63XX_CPU_6348
- 	bool "support 6348 CPU"

target/linux/brcm63xx/patches-3.10/042-MIPS-BMIPS-support-booting-from-physical-CPU-other-t.patch

@@ -1,89 +0,0 @@
-From 672d6bea85c7c9c63c086a9423e6d4e5fc286152 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Wed, 26 Jun 2013 18:11:56 +0000
-Subject: [PATCH] MIPS: BMIPS: support booting from physical CPU other than 0
-
-BMIPS43xx CPUs have two hardware threads, and on some SoCs such as 3368,
-the bootloader has configured the system to boot from TP1 instead of the
-more usual TP0. Create the physical to logical CPU mapping to cope with
-that, do not remap the software interrupts to be cross CPUs such that we
-do not have to do use the logical CPU mapping further down the code, and
-finally, reset the slave TP1 only if booted from TP0.
-
-Signed-off-by: Jonas Gorski <[email protected]>
-Signed-off-by: Florian Fainelli <[email protected]>
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Patchwork: https://patchwork.linux-mips.org/patch/5553/
-Patchwork: https://patchwork.linux-mips.org/patch/5556/
-Signed-off-by: Ralf Baechle <[email protected]>
----
- arch/mips/kernel/smp-bmips.c |   29 +++++++++++++++++++++++------
- 1 file changed, 23 insertions(+), 6 deletions(-)
-
---- a/arch/mips/kernel/smp-bmips.c
-+++ b/arch/mips/kernel/smp-bmips.c
-@@ -63,7 +63,7 @@ static irqreturn_t bmips_ipi_interrupt(i
- 
- static void __init bmips_smp_setup(void)
- {
--	int i;
-+	int i, cpu = 1, boot_cpu = 0;
- 
- #if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
- 	/* arbitration priority */
-@@ -72,13 +72,22 @@ static void __init bmips_smp_setup(void)
- 	/* NBK and weak order flags */
- 	set_c0_brcm_config_0(0x30000);
- 
-+	/* Find out if we are running on TP0 or TP1 */
-+	boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
-+
- 	/*
- 	 * MIPS interrupts 0,1 (SW INT 0,1) cross over to the other thread
- 	 * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output
- 	 * MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output
-+	 *
-+	 * If booting from TP1, leave the existing CMT interrupt routing
-+	 * such that TP0 responds to SW1 and TP1 responds to SW0.
- 	 */
--	change_c0_brcm_cmt_intr(0xf8018000,
--		(0x02 << 27) | (0x03 << 15));
-+	if (boot_cpu == 0)
-+		change_c0_brcm_cmt_intr(0xf8018000,
-+					(0x02 << 27) | (0x03 << 15));
-+	else
-+		change_c0_brcm_cmt_intr(0xf8018000, (0x1d << 27));
- 
- 	/* single core, 2 threads (2 pipelines) */
- 	max_cpus = 2;
-@@ -106,9 +115,15 @@ static void __init bmips_smp_setup(void)
- 	if (!board_ebase_setup)
- 		board_ebase_setup = &bmips_ebase_setup;
- 
-+	__cpu_number_map[boot_cpu] = 0;
-+	__cpu_logical_map[0] = boot_cpu;
-+
- 	for (i = 0; i < max_cpus; i++) {
--		__cpu_number_map[i] = 1;
--		__cpu_logical_map[i] = 1;
-+		if (i != boot_cpu) {
-+			__cpu_number_map[i] = cpu;
-+			__cpu_logical_map[cpu] = i;
-+			cpu++;
-+		}
- 		set_cpu_possible(i, 1);
- 		set_cpu_present(i, 1);
- 	}
-@@ -157,7 +172,9 @@ static void bmips_boot_secondary(int cpu
- 		bmips_send_ipi_single(cpu, 0);
- 	else {
- #if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
--		set_c0_brcm_cmt_ctrl(0x01);
-+		/* Reset slave TP1 if booting from TP0 */
-+		if (cpu_logical_map(cpu) == 0)
-+			set_c0_brcm_cmt_ctrl(0x01);
- #elif defined(CONFIG_CPU_BMIPS5000)
- 		if (cpu & 0x01)
- 			write_c0_brcm_action(ACTION_BOOT_THREAD(cpu));

target/linux/brcm63xx/patches-3.10/043-MIPS-BCM63XX-Add-SMP-support-to-prom.c.patch

@@ -1,82 +0,0 @@
-From 7c44eabf20cba12049bf9eebfa192afcc2053b2d Mon Sep 17 00:00:00 2001
-From: Kevin Cernekee <[email protected]>
-Date: Sat, 9 Jul 2011 12:15:06 -0700
-Subject: [PATCH V2 1/2] MIPS: BCM63XX: Add SMP support to prom.c
-
-This involves two changes to the BSP code:
-
-1) register_smp_ops() for BMIPS SMP
-
-2) The CPU1 boot vector on some of the BCM63xx platforms conflicts with
-the special interrupt vector (IV).  Move it to 0x8000_0380 at boot time,
-to resolve the conflict.
-
-Signed-off-by: Kevin Cernekee <[email protected]>
-[[email protected]: moved SMP ops registration into ifdef guard,
- changed ifdef guards to if (IS_ENABLED())]
-Signed-off-by: Jonas Gorski <[email protected]>
----
-V1 -> V2:
- * changed ifdef guards to if (IS_ENABLED())
-
- arch/mips/bcm63xx/prom.c |   41 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 41 insertions(+)
-
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -8,7 +8,11 @@
- 
- #include <linux/init.h>
- #include <linux/bootmem.h>
-+#include <linux/smp.h>
- #include <asm/bootinfo.h>
-+#include <asm/bmips.h>
-+#include <asm/smp-ops.h>
-+#include <asm/mipsregs.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_io.h>
-@@ -54,6 +58,43 @@ void __init prom_init(void)
- 
- 	/* do low level board init */
- 	board_prom_init();
-+
-+	if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) {
-+		/* set up SMP */
-+		register_smp_ops(&bmips_smp_ops);
-+
-+		/*
-+		 * BCM6328 might not have its second CPU enabled, while BCM6358
-+		 * needs special handling for its shared TLB, so disable SMP
-+		 * for now.
-+		 */
-+		if (BCMCPU_IS_6328()) {
-+			bmips_smp_enabled = 0;
-+		} else if (BCMCPU_IS_6358()) {
-+			bmips_smp_enabled = 0;
-+		}
-+
-+		if (!bmips_smp_enabled)
-+			return;
-+
-+		/*
-+		 * The bootloader has set up the CPU1 reset vector at
-+		 * 0xa000_0200.
-+		 * This conflicts with the special interrupt vector (IV).
-+		 * The bootloader has also set up CPU1 to respond to the wrong
-+		 * IPI interrupt.
-+		 * Here we will start up CPU1 in the background and ask it to
-+		 * reconfigure itself then go back to sleep.
-+		 */
-+		memcpy((void *)0xa0000200, &bmips_smp_movevec, 0x20);
-+		__sync();
-+		set_c0_cause(C_SW0);
-+		cpumask_set_cpu(1, &bmips_booted_mask);
-+
-+		/*
-+		 * FIXME: we really should have some sort of hazard barrier here
-+		 */
-+	}
- }
- 
- void __init prom_free_prom_memory(void)

target/linux/brcm63xx/patches-3.10/044-MIPS-BCM63XX-Enable-second-core-SMP-on-BCM6328-if-av.patch

@@ -1,55 +0,0 @@
-From 41fa6dec9df9b4e55ac522c899270a72e51a9b4b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 9 Jul 2011 12:15:06 -0700
-Subject: [PATCH V2 2/2] MIPS: BCM63XX: Enable second core SMP on BCM6328 if
- available
-
-BCM6328 has a OTP which tells us if the second core is available.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/prom.c                          |    6 +++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h  |    2 ++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |    7 +++++++
- 3 files changed, 14 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -69,7 +69,11 @@ void __init prom_init(void)
- 		 * for now.
- 		 */
- 		if (BCMCPU_IS_6328()) {
--			bmips_smp_enabled = 0;
-+			reg = bcm_readl(BCM_6328_OTP_BASE +
-+					OTP_USER_BITS_6328_REG(3));
-+
-+			if (reg & OTP_6328_REG3_TP1_DISABLED)
-+				bmips_smp_enabled = 0;
- 		} else if (BCMCPU_IS_6358()) {
- 			bmips_smp_enabled = 0;
- 		}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -296,6 +296,8 @@ enum bcm63xx_regs_set {
- #define BCM_6328_PCMDMAS_BASE		(0xdeadbeef)
- #define BCM_6328_RNG_BASE		(0xdeadbeef)
- #define BCM_6328_MISC_BASE		(0xb0001800)
-+#define BCM_6328_OTP_BASE		(0xb0000600)
-+
- /*
-  * 6338 register sets base address
-  */
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1477,4 +1477,11 @@
- 
- #define PCIE_DEVICE_OFFSET		0x8000
- 
-+/*************************************************************************
-+ * _REG relative to RSET_OTP
-+ *************************************************************************/
-+
-+#define OTP_USER_BITS_6328_REG(i)	(0x20 + (i) * 4)
-+#define   OTP_6328_REG3_TP1_DISABLED	BIT(9)
-+
- #endif /* BCM63XX_REGS_H_ */

target/linux/brcm63xx/patches-3.10/045-bcm63xx_enet-implement-reset-autoneg-ethtool-callbac.patch

@@ -1,44 +0,0 @@
-From a15c33450df64f183c8ab5de8ef113091081679d Mon Sep 17 00:00:00 2001
-From: Maxime Bizon <[email protected]>
-Date: Tue, 4 Jun 2013 20:53:33 +0000
-Subject: [PATCH 1/3] bcm63xx_enet: implement reset autoneg ethtool callback
-
-Implement the rset_nway ethtool callback which uses libphy generic
-autonegotiation restart function.
-
-Signed-off-by: Maxime Bizon <[email protected]>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c |   15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1328,6 +1328,20 @@ static void bcm_enet_get_ethtool_stats(s
- 	mutex_unlock(&priv->mib_update_lock);
- }
- 
-+static int bcm_enet_nway_reset(struct net_device *dev)
-+{
-+	struct bcm_enet_priv *priv;
-+
-+	priv = netdev_priv(dev);
-+	if (priv->has_phy) {
-+		if (!priv->phydev)
-+			return -ENODEV;
-+		return genphy_restart_aneg(priv->phydev);
-+	}
-+
-+	return -EOPNOTSUPP;
-+}
-+
- static int bcm_enet_get_settings(struct net_device *dev,
- 				 struct ethtool_cmd *cmd)
- {
-@@ -1470,6 +1484,7 @@ static const struct ethtool_ops bcm_enet
- 	.get_strings		= bcm_enet_get_strings,
- 	.get_sset_count		= bcm_enet_get_sset_count,
- 	.get_ethtool_stats      = bcm_enet_get_ethtool_stats,
-+	.nway_reset		= bcm_enet_nway_reset,
- 	.get_settings		= bcm_enet_get_settings,
- 	.set_settings		= bcm_enet_set_settings,
- 	.get_drvinfo		= bcm_enet_get_drvinfo,

target/linux/brcm63xx/patches-3.10/046-bcm63xx_enet-split-DMA-channel-register-accesses.patch

@@ -1,346 +0,0 @@
-From 33cab1696444a8e333cf0490bfe04c32d583fd51 Mon Sep 17 00:00:00 2001
-From: Maxime Bizon <[email protected]>
-Date: Tue, 4 Jun 2013 20:53:34 +0000
-Subject: [PATCH 2/3] bcm63xx_enet: split DMA channel register accesses
-
-The current bcm63xx_enet driver always uses bcmenet_shared_base whenever
-it needs to access DMA channel configuration space or access the DMA
-channel state RAM. Split these register in 3 parts to be more accurate:
-
-- global DMA configuration
-- per DMA channel configuration space
-- per DMA channel state RAM space
-
-This is preliminary to support new chips where the global DMA
-configuration remains the same, but there is a varying number of DMA
-channels located at a different memory offset.
-
-Signed-off-by: Maxime Bizon <[email protected]>
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/dev-enet.c                     |   23 +++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h |    4 +-
- drivers/net/ethernet/broadcom/bcm63xx_enet.c     |  139 +++++++++++++---------
- 3 files changed, 105 insertions(+), 61 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-enet.c
-+++ b/arch/mips/bcm63xx/dev-enet.c
-@@ -19,6 +19,16 @@ static struct resource shared_res[] = {
- 		.end		= -1, /* filled at runtime */
- 		.flags		= IORESOURCE_MEM,
- 	},
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.end		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_MEM,
-+	},
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.end		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_MEM,
-+	},
- };
- 
- static struct platform_device bcm63xx_enet_shared_device = {
-@@ -110,10 +120,15 @@ int __init bcm63xx_enet_register(int uni
- 	if (!shared_device_registered) {
- 		shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
- 		shared_res[0].end = shared_res[0].start;
--		if (BCMCPU_IS_6338())
--			shared_res[0].end += (RSET_ENETDMA_SIZE / 2)  - 1;
--		else
--			shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
-+		shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
-+
-+		shared_res[1].start = bcm63xx_regset_address(RSET_ENETDMAC);
-+		shared_res[1].end = shared_res[1].start;
-+		shared_res[1].end += RSET_ENETDMAC_SIZE(16)  - 1;
-+
-+		shared_res[2].start = bcm63xx_regset_address(RSET_ENETDMAS);
-+		shared_res[2].end = shared_res[2].start;
-+		shared_res[2].end += RSET_ENETDMAS_SIZE(16)  - 1;
- 
- 		ret = platform_device_register(&bcm63xx_enet_shared_device);
- 		if (ret)
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -187,7 +187,9 @@ enum bcm63xx_regs_set {
- #define BCM_6358_RSET_SPI_SIZE		1804
- #define BCM_6368_RSET_SPI_SIZE		1804
- #define RSET_ENET_SIZE			2048
--#define RSET_ENETDMA_SIZE		2048
-+#define RSET_ENETDMA_SIZE		256
-+#define RSET_ENETDMAC_SIZE(chans)	(16 * (chans))
-+#define RSET_ENETDMAS_SIZE(chans)	(16 * (chans))
- #define RSET_ENETSW_SIZE		65536
- #define RSET_UART_SIZE			24
- #define RSET_UDC_SIZE			256
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -41,8 +41,8 @@ static int copybreak __read_mostly = 128
- module_param(copybreak, int, 0);
- MODULE_PARM_DESC(copybreak, "Receive copy threshold");
- 
--/* io memory shared between all devices */
--static void __iomem *bcm_enet_shared_base;
-+/* io registers memory shared between all devices */
-+static void __iomem *bcm_enet_shared_base[3];
- 
- /*
-  * io helpers to access mac registers
-@@ -63,13 +63,35 @@ static inline void enet_writel(struct bc
-  */
- static inline u32 enet_dma_readl(struct bcm_enet_priv *priv, u32 off)
- {
--	return bcm_readl(bcm_enet_shared_base + off);
-+	return bcm_readl(bcm_enet_shared_base[0] + off);
- }
- 
- static inline void enet_dma_writel(struct bcm_enet_priv *priv,
- 				       u32 val, u32 off)
- {
--	bcm_writel(val, bcm_enet_shared_base + off);
-+	bcm_writel(val, bcm_enet_shared_base[0] + off);
-+}
-+
-+static inline u32 enet_dmac_readl(struct bcm_enet_priv *priv, u32 off)
-+{
-+	return bcm_readl(bcm_enet_shared_base[1] + off);
-+}
-+
-+static inline void enet_dmac_writel(struct bcm_enet_priv *priv,
-+				       u32 val, u32 off)
-+{
-+	bcm_writel(val, bcm_enet_shared_base[1] + off);
-+}
-+
-+static inline u32 enet_dmas_readl(struct bcm_enet_priv *priv, u32 off)
-+{
-+	return bcm_readl(bcm_enet_shared_base[2] + off);
-+}
-+
-+static inline void enet_dmas_writel(struct bcm_enet_priv *priv,
-+				       u32 val, u32 off)
-+{
-+	bcm_writel(val, bcm_enet_shared_base[2] + off);
- }
- 
- /*
-@@ -353,8 +375,8 @@ static int bcm_enet_receive_queue(struct
- 		bcm_enet_refill_rx(dev);
- 
- 		/* kick rx dma */
--		enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
--				ENETDMA_CHANCFG_REG(priv->rx_chan));
-+		enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
-+				 ENETDMAC_CHANCFG_REG(priv->rx_chan));
- 	}
- 
- 	return processed;
-@@ -429,10 +451,10 @@ static int bcm_enet_poll(struct napi_str
- 	dev = priv->net_dev;
- 
- 	/* ack interrupts */
--	enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
--			ENETDMA_IR_REG(priv->rx_chan));
--	enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
--			ENETDMA_IR_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
-+			 ENETDMAC_IR_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
-+			 ENETDMAC_IR_REG(priv->tx_chan));
- 
- 	/* reclaim sent skb */
- 	tx_work_done = bcm_enet_tx_reclaim(dev, 0);
-@@ -451,10 +473,10 @@ static int bcm_enet_poll(struct napi_str
- 	napi_complete(napi);
- 
- 	/* restore rx/tx interrupt */
--	enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
--			ENETDMA_IRMASK_REG(priv->rx_chan));
--	enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
--			ENETDMA_IRMASK_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
-+			 ENETDMAC_IRMASK_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
-+			 ENETDMAC_IRMASK_REG(priv->tx_chan));
- 
- 	return rx_work_done;
- }
-@@ -497,8 +519,8 @@ static irqreturn_t bcm_enet_isr_dma(int
- 	priv = netdev_priv(dev);
- 
- 	/* mask rx/tx interrupts */
--	enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
--	enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
- 
- 	napi_schedule(&priv->napi);
- 
-@@ -557,8 +579,8 @@ static int bcm_enet_start_xmit(struct sk
- 	wmb();
- 
- 	/* kick tx dma */
--	enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
--			ENETDMA_CHANCFG_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
-+			 ENETDMAC_CHANCFG_REG(priv->tx_chan));
- 
- 	/* stop queue if no more desc available */
- 	if (!priv->tx_desc_count)
-@@ -833,8 +855,8 @@ static int bcm_enet_open(struct net_devi
- 
- 	/* mask all interrupts and request them */
- 	enet_writel(priv, 0, ENET_IRMASK_REG);
--	enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
--	enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
- 
- 	ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
- 	if (ret)
-@@ -919,28 +941,28 @@ static int bcm_enet_open(struct net_devi
- 	}
- 
- 	/* write rx & tx ring addresses */
--	enet_dma_writel(priv, priv->rx_desc_dma,
--			ENETDMA_RSTART_REG(priv->rx_chan));
--	enet_dma_writel(priv, priv->tx_desc_dma,
--			ENETDMA_RSTART_REG(priv->tx_chan));
-+	enet_dmas_writel(priv, priv->rx_desc_dma,
-+			 ENETDMAS_RSTART_REG(priv->rx_chan));
-+	enet_dmas_writel(priv, priv->tx_desc_dma,
-+			 ENETDMAS_RSTART_REG(priv->tx_chan));
- 
- 	/* clear remaining state ram for rx & tx channel */
--	enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->rx_chan));
--	enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->tx_chan));
--	enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->rx_chan));
--	enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->tx_chan));
--	enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->rx_chan));
--	enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->tx_chan));
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG(priv->rx_chan));
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG(priv->tx_chan));
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->rx_chan));
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->tx_chan));
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->rx_chan));
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->tx_chan));
- 
- 	/* set max rx/tx length */
- 	enet_writel(priv, priv->hw_mtu, ENET_RXMAXLEN_REG);
- 	enet_writel(priv, priv->hw_mtu, ENET_TXMAXLEN_REG);
- 
- 	/* set dma maximum burst len */
--	enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
--			ENETDMA_MAXBURST_REG(priv->rx_chan));
--	enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
--			ENETDMA_MAXBURST_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, BCMENET_DMA_MAXBURST,
-+			 ENETDMAC_MAXBURST_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, BCMENET_DMA_MAXBURST,
-+			 ENETDMAC_MAXBURST_REG(priv->tx_chan));
- 
- 	/* set correct transmit fifo watermark */
- 	enet_writel(priv, BCMENET_TX_FIFO_TRESH, ENET_TXWMARK_REG);
-@@ -958,26 +980,26 @@ static int bcm_enet_open(struct net_devi
- 	val |= ENET_CTL_ENABLE_MASK;
- 	enet_writel(priv, val, ENET_CTL_REG);
- 	enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
--	enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
--			ENETDMA_CHANCFG_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
-+			 ENETDMAC_CHANCFG_REG(priv->rx_chan));
- 
- 	/* watch "mib counters about to overflow" interrupt */
- 	enet_writel(priv, ENET_IR_MIB, ENET_IR_REG);
- 	enet_writel(priv, ENET_IR_MIB, ENET_IRMASK_REG);
- 
- 	/* watch "packet transferred" interrupt in rx and tx */
--	enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
--			ENETDMA_IR_REG(priv->rx_chan));
--	enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
--			ENETDMA_IR_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
-+			 ENETDMAC_IR_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
-+			 ENETDMAC_IR_REG(priv->tx_chan));
- 
- 	/* make sure we enable napi before rx interrupt  */
- 	napi_enable(&priv->napi);
- 
--	enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
--			ENETDMA_IRMASK_REG(priv->rx_chan));
--	enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
--			ENETDMA_IRMASK_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
-+			 ENETDMAC_IRMASK_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
-+			 ENETDMAC_IRMASK_REG(priv->tx_chan));
- 
- 	if (priv->has_phy)
- 		phy_start(priv->phydev);
-@@ -1057,14 +1079,14 @@ static void bcm_enet_disable_dma(struct
- {
- 	int limit;
- 
--	enet_dma_writel(priv, 0, ENETDMA_CHANCFG_REG(chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_CHANCFG_REG(chan));
- 
- 	limit = 1000;
- 	do {
- 		u32 val;
- 
--		val = enet_dma_readl(priv, ENETDMA_CHANCFG_REG(chan));
--		if (!(val & ENETDMA_CHANCFG_EN_MASK))
-+		val = enet_dmac_readl(priv, ENETDMAC_CHANCFG_REG(chan));
-+		if (!(val & ENETDMAC_CHANCFG_EN_MASK))
- 			break;
- 		udelay(1);
- 	} while (limit--);
-@@ -1090,8 +1112,8 @@ static int bcm_enet_stop(struct net_devi
- 
- 	/* mask all interrupts */
- 	enet_writel(priv, 0, ENET_IRMASK_REG);
--	enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
--	enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
- 
- 	/* make sure no mib update is scheduled */
- 	cancel_work_sync(&priv->mib_update_task);
-@@ -1636,7 +1658,7 @@ static int bcm_enet_probe(struct platfor
- 
- 	/* stop if shared driver failed, assume driver->probe will be
- 	 * called in the same order we register devices (correct ?) */
--	if (!bcm_enet_shared_base)
-+	if (!bcm_enet_shared_base[0])
- 		return -ENODEV;
- 
- 	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-@@ -1882,14 +1904,19 @@ struct platform_driver bcm63xx_enet_driv
- static int bcm_enet_shared_probe(struct platform_device *pdev)
- {
- 	struct resource *res;
-+	void __iomem *p[3];
-+	unsigned int i;
- 
--	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!res)
--		return -ENODEV;
-+	memset(bcm_enet_shared_base, 0, sizeof(bcm_enet_shared_base));
- 
--	bcm_enet_shared_base = devm_request_and_ioremap(&pdev->dev, res);
--	if (!bcm_enet_shared_base)
--		return -ENOMEM;
-+	for (i = 0; i < 3; i++) {
-+		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
-+		p[i] = devm_ioremap_resource(&pdev->dev, res);
-+		if (!p[i])
-+			return -ENOMEM;
-+	}
-+
-+	memcpy(bcm_enet_shared_base, p, sizeof(bcm_enet_shared_base));
- 
- 	return 0;
- }

target/linux/brcm63xx/patches-3.10/047-bcm63xx_enet-add-support-for-Broadcom-BCM63xx-integr.patch

@@ -1,1505 +0,0 @@
-From 85b2e40acd7b33409a0d889cd3d0b964c9df4b13 Mon Sep 17 00:00:00 2001
-From: Maxime Bizon <[email protected]>
-Date: Tue, 4 Jun 2013 20:53:35 +0000
-Subject: [PATCH 3/3] bcm63xx_enet: add support for Broadcom BCM63xx
- integrated gigabit switch
-
-Newer Broadcom BCM63xx SoCs: 6328, 6362 and 6368 have an integrated switch
-which needs to be driven slightly differently from the traditional
-external switches. This patch introduces changes in arch/mips/bcm63xx in order
-to:
-
-- register a bcm63xx_enetsw driver instead of bcm63xx_enet driver
-- update DMA channels configuration & state RAM base addresses
-- add a new platform data configuration knob to define the number of
-  ports per switch/device and force link on some ports
-- define the required switch registers
-
-On the driver side, the following changes are required:
-
-- the switch ports need to be polled to ensure the link is up and
-  running and RX/TX can properly work
-- basic switch configuration needs to be performed for the switch to
-  forward packets to the CPU
-- update the MIB counters since the integrated
-
-Signed-off-by: Maxime Bizon <[email protected]>
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c          |    4 +
- arch/mips/bcm63xx/dev-enet.c                       |  113 ++-
- .../include/asm/mach-bcm63xx/bcm63xx_dev_enet.h    |   28 +
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h  |   50 +
- .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h |    2 +
- drivers/net/ethernet/broadcom/bcm63xx_enet.c       |  995 +++++++++++++++++++-
- drivers/net/ethernet/broadcom/bcm63xx_enet.h       |   71 ++
- 7 files changed, 1205 insertions(+), 58 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -890,6 +890,10 @@ int __init board_register_devices(void)
- 	    !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
- 		bcm63xx_enet_register(1, &board.enet1);
- 
-+	if (board.has_enetsw &&
-+	    !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
-+		bcm63xx_enetsw_register(&board.enetsw);
-+
- 	if (board.has_usbd)
- 		bcm63xx_usbd_register(&board.usbd);
- 
---- a/arch/mips/bcm63xx/dev-enet.c
-+++ b/arch/mips/bcm63xx/dev-enet.c
-@@ -104,6 +104,64 @@ static struct platform_device bcm63xx_en
- 	},
- };
- 
-+static struct resource enetsw_res[] = {
-+	{
-+		/* start & end filled at runtime */
-+		.flags		= IORESOURCE_MEM,
-+	},
-+	{
-+		/* start filled at runtime */
-+		.flags		= IORESOURCE_IRQ,
-+	},
-+	{
-+		/* start filled at runtime */
-+		.flags		= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static struct bcm63xx_enetsw_platform_data enetsw_pd;
-+
-+static struct platform_device bcm63xx_enetsw_device = {
-+	.name		= "bcm63xx_enetsw",
-+	.num_resources	= ARRAY_SIZE(enetsw_res),
-+	.resource	= enetsw_res,
-+	.dev		= {
-+		.platform_data = &enetsw_pd,
-+	},
-+};
-+
-+static int __init register_shared(void)
-+{
-+	int ret, chan_count;
-+
-+	if (shared_device_registered)
-+		return 0;
-+
-+	shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
-+	shared_res[0].end = shared_res[0].start;
-+	shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
-+
-+	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
-+		chan_count = 32;
-+	else
-+		chan_count = 16;
-+
-+	shared_res[1].start = bcm63xx_regset_address(RSET_ENETDMAC);
-+	shared_res[1].end = shared_res[1].start;
-+	shared_res[1].end += RSET_ENETDMAC_SIZE(chan_count)  - 1;
-+
-+	shared_res[2].start = bcm63xx_regset_address(RSET_ENETDMAS);
-+	shared_res[2].end = shared_res[2].start;
-+	shared_res[2].end += RSET_ENETDMAS_SIZE(chan_count)  - 1;
-+
-+	ret = platform_device_register(&bcm63xx_enet_shared_device);
-+	if (ret)
-+		return ret;
-+	shared_device_registered = 1;
-+
-+	return 0;
-+}
-+
- int __init bcm63xx_enet_register(int unit,
- 				 const struct bcm63xx_enet_platform_data *pd)
- {
-@@ -117,24 +175,9 @@ int __init bcm63xx_enet_register(int uni
- 	if (unit == 1 && BCMCPU_IS_6338())
- 		return -ENODEV;
- 
--	if (!shared_device_registered) {
--		shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
--		shared_res[0].end = shared_res[0].start;
--		shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
--
--		shared_res[1].start = bcm63xx_regset_address(RSET_ENETDMAC);
--		shared_res[1].end = shared_res[1].start;
--		shared_res[1].end += RSET_ENETDMAC_SIZE(16)  - 1;
--
--		shared_res[2].start = bcm63xx_regset_address(RSET_ENETDMAS);
--		shared_res[2].end = shared_res[2].start;
--		shared_res[2].end += RSET_ENETDMAS_SIZE(16)  - 1;
--
--		ret = platform_device_register(&bcm63xx_enet_shared_device);
--		if (ret)
--			return ret;
--		shared_device_registered = 1;
--	}
-+	ret = register_shared();
-+	if (ret)
-+		return ret;
- 
- 	if (unit == 0) {
- 		enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0);
-@@ -175,3 +218,37 @@ int __init bcm63xx_enet_register(int uni
- 		return ret;
- 	return 0;
- }
-+
-+int __init
-+bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd)
-+{
-+	int ret;
-+
-+	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+		return -ENODEV;
-+
-+	ret = register_shared();
-+	if (ret)
-+		return ret;
-+
-+	enetsw_res[0].start = bcm63xx_regset_address(RSET_ENETSW);
-+	enetsw_res[0].end = enetsw_res[0].start;
-+	enetsw_res[0].end += RSET_ENETSW_SIZE - 1;
-+	enetsw_res[1].start = bcm63xx_get_irq_number(IRQ_ENETSW_RXDMA0);
-+	enetsw_res[2].start = bcm63xx_get_irq_number(IRQ_ENETSW_TXDMA0);
-+	if (!enetsw_res[2].start)
-+		enetsw_res[2].start = -1;
-+
-+	memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd));
-+
-+	if (BCMCPU_IS_6328())
-+		enetsw_pd.num_ports = ENETSW_PORTS_6328;
-+	else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
-+		enetsw_pd.num_ports = ENETSW_PORTS_6368;
-+
-+	ret = platform_device_register(&bcm63xx_enetsw_device);
-+	if (ret)
-+		return ret;
-+
-+	return 0;
-+}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-@@ -39,7 +39,35 @@ struct bcm63xx_enet_platform_data {
- 					    int phy_id, int reg, int val));
- };
- 
-+/*
-+ * on board ethernet switch platform data
-+ */
-+#define ENETSW_MAX_PORT	8
-+#define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
-+#define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
-+
-+#define ENETSW_RGMII_PORT0	4
-+
-+struct bcm63xx_enetsw_port {
-+	int		used;
-+	int		phy_id;
-+
-+	int		bypass_link;
-+	int		force_speed;
-+	int		force_duplex_full;
-+
-+	const char	*name;
-+};
-+
-+struct bcm63xx_enetsw_platform_data {
-+	char mac_addr[ETH_ALEN];
-+	int num_ports;
-+	struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
-+};
-+
- int __init bcm63xx_enet_register(int unit,
- 				 const struct bcm63xx_enet_platform_data *pd);
- 
-+int bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd);
-+
- #endif /* ! BCM63XX_DEV_ENET_H_ */
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -873,10 +873,60 @@
-  * _REG relative to RSET_ENETSW
-  *************************************************************************/
- 
-+/* Port traffic control */
-+#define ENETSW_PTCTRL_REG(x)		(0x0 + (x))
-+#define ENETSW_PTCTRL_RXDIS_MASK	(1 << 0)
-+#define ENETSW_PTCTRL_TXDIS_MASK	(1 << 1)
-+
-+/* Switch mode register */
-+#define ENETSW_SWMODE_REG		(0xb)
-+#define ENETSW_SWMODE_FWD_EN_MASK	(1 << 1)
-+
-+/* IMP override Register */
-+#define ENETSW_IMPOV_REG		(0xe)
-+#define ENETSW_IMPOV_FORCE_MASK		(1 << 7)
-+#define ENETSW_IMPOV_TXFLOW_MASK	(1 << 5)
-+#define ENETSW_IMPOV_RXFLOW_MASK	(1 << 4)
-+#define ENETSW_IMPOV_1000_MASK		(1 << 3)
-+#define ENETSW_IMPOV_100_MASK		(1 << 2)
-+#define ENETSW_IMPOV_FDX_MASK		(1 << 1)
-+#define ENETSW_IMPOV_LINKUP_MASK	(1 << 0)
-+
-+/* Port override Register */
-+#define ENETSW_PORTOV_REG(x)		(0x58 + (x))
-+#define ENETSW_PORTOV_ENABLE_MASK	(1 << 6)
-+#define ENETSW_PORTOV_TXFLOW_MASK	(1 << 5)
-+#define ENETSW_PORTOV_RXFLOW_MASK	(1 << 4)
-+#define ENETSW_PORTOV_1000_MASK		(1 << 3)
-+#define ENETSW_PORTOV_100_MASK		(1 << 2)
-+#define ENETSW_PORTOV_FDX_MASK		(1 << 1)
-+#define ENETSW_PORTOV_LINKUP_MASK	(1 << 0)
-+
-+/* MDIO control register */
-+#define ENETSW_MDIOC_REG		(0xb0)
-+#define ENETSW_MDIOC_EXT_MASK		(1 << 16)
-+#define ENETSW_MDIOC_REG_SHIFT		20
-+#define ENETSW_MDIOC_PHYID_SHIFT	25
-+#define ENETSW_MDIOC_RD_MASK		(1 << 30)
-+#define ENETSW_MDIOC_WR_MASK		(1 << 31)
-+
-+/* MDIO data register */
-+#define ENETSW_MDIOD_REG		(0xb4)
-+
-+/* Global Management Configuration Register */
-+#define ENETSW_GMCR_REG			(0x200)
-+#define ENETSW_GMCR_RST_MIB_MASK	(1 << 0)
-+
- /* MIB register */
- #define ENETSW_MIB_REG(x)		(0x2800 + (x) * 4)
- #define ENETSW_MIB_REG_COUNT		47
- 
-+/* Jumbo control register port mask register */
-+#define ENETSW_JMBCTL_PORT_REG		(0x4004)
-+
-+/* Jumbo control mib good frame register */
-+#define ENETSW_JMBCTL_MAXSIZE_REG	(0x4008)
-+
- 
- /*************************************************************************
-  * _REG relative to RSET_OHCI_PRIV
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -24,6 +24,7 @@ struct board_info {
- 	/* enabled feature/device */
- 	unsigned int	has_enet0:1;
- 	unsigned int	has_enet1:1;
-+	unsigned int	has_enetsw:1;
- 	unsigned int	has_pci:1;
- 	unsigned int	has_pccard:1;
- 	unsigned int	has_ohci0:1;
-@@ -36,6 +37,7 @@ struct board_info {
- 	/* ethernet config */
- 	struct bcm63xx_enet_platform_data enet0;
- 	struct bcm63xx_enet_platform_data enet1;
-+	struct bcm63xx_enetsw_platform_data enetsw;
- 
- 	/* USB config */
- 	struct bcm63xx_usbd_platform_data usbd;
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -59,8 +59,43 @@ static inline void enet_writel(struct bc
- }
- 
- /*
-- * io helpers to access shared registers
-+ * io helpers to access switch registers
-  */
-+static inline u32 enetsw_readl(struct bcm_enet_priv *priv, u32 off)
-+{
-+	return bcm_readl(priv->base + off);
-+}
-+
-+static inline void enetsw_writel(struct bcm_enet_priv *priv,
-+				 u32 val, u32 off)
-+{
-+	bcm_writel(val, priv->base + off);
-+}
-+
-+static inline u16 enetsw_readw(struct bcm_enet_priv *priv, u32 off)
-+{
-+	return bcm_readw(priv->base + off);
-+}
-+
-+static inline void enetsw_writew(struct bcm_enet_priv *priv,
-+				 u16 val, u32 off)
-+{
-+	bcm_writew(val, priv->base + off);
-+}
-+
-+static inline u8 enetsw_readb(struct bcm_enet_priv *priv, u32 off)
-+{
-+	return bcm_readb(priv->base + off);
-+}
-+
-+static inline void enetsw_writeb(struct bcm_enet_priv *priv,
-+				 u8 val, u32 off)
-+{
-+	bcm_writeb(val, priv->base + off);
-+}
-+
-+
-+/* io helpers to access shared registers */
- static inline u32 enet_dma_readl(struct bcm_enet_priv *priv, u32 off)
- {
- 	return bcm_readl(bcm_enet_shared_base[0] + off);
-@@ -218,7 +253,6 @@ static int bcm_enet_refill_rx(struct net
- 			if (!skb)
- 				break;
- 			priv->rx_skb[desc_idx] = skb;
--
- 			p = dma_map_single(&priv->pdev->dev, skb->data,
- 					   priv->rx_skb_size,
- 					   DMA_FROM_DEVICE);
-@@ -321,7 +355,8 @@ static int bcm_enet_receive_queue(struct
- 		}
- 
- 		/* recycle packet if it's marked as bad */
--		if (unlikely(len_stat & DMADESC_ERR_MASK)) {
-+		if (!priv->enet_is_sw &&
-+		    unlikely(len_stat & DMADESC_ERR_MASK)) {
- 			dev->stats.rx_errors++;
- 
- 			if (len_stat & DMADESC_OVSIZE_MASK)
-@@ -552,6 +587,26 @@ static int bcm_enet_start_xmit(struct sk
- 		goto out_unlock;
- 	}
- 
-+	/* pad small packets sent on a switch device */
-+	if (priv->enet_is_sw && skb->len < 64) {
-+		int needed = 64 - skb->len;
-+		char *data;
-+
-+		if (unlikely(skb_tailroom(skb) < needed)) {
-+			struct sk_buff *nskb;
-+
-+			nskb = skb_copy_expand(skb, 0, needed, GFP_ATOMIC);
-+			if (!nskb) {
-+				ret = NETDEV_TX_BUSY;
-+				goto out_unlock;
-+			}
-+			dev_kfree_skb(skb);
-+			skb = nskb;
-+		}
-+		data = skb_put(skb, needed);
-+		memset(data, 0, needed);
-+	}
-+
- 	/* point to the next available desc */
- 	desc = &priv->tx_desc_cpu[priv->tx_curr_desc];
- 	priv->tx_skb[priv->tx_curr_desc] = skb;
-@@ -959,9 +1014,9 @@ static int bcm_enet_open(struct net_devi
- 	enet_writel(priv, priv->hw_mtu, ENET_TXMAXLEN_REG);
- 
- 	/* set dma maximum burst len */
--	enet_dmac_writel(priv, BCMENET_DMA_MAXBURST,
-+	enet_dmac_writel(priv, priv->dma_maxburst,
- 			 ENETDMAC_MAXBURST_REG(priv->rx_chan));
--	enet_dmac_writel(priv, BCMENET_DMA_MAXBURST,
-+	enet_dmac_writel(priv, priv->dma_maxburst,
- 			 ENETDMAC_MAXBURST_REG(priv->tx_chan));
- 
- 	/* set correct transmit fifo watermark */
-@@ -1567,7 +1622,7 @@ static int compute_hw_mtu(struct bcm_ene
- 	 * it's appended
- 	 */
- 	priv->rx_skb_size = ALIGN(actual_mtu + ETH_FCS_LEN,
--				  BCMENET_DMA_MAXBURST * 4);
-+				  priv->dma_maxburst * 4);
- 	return 0;
- }
- 
-@@ -1674,6 +1729,9 @@ static int bcm_enet_probe(struct platfor
- 		return -ENOMEM;
- 	priv = netdev_priv(dev);
- 
-+	priv->enet_is_sw = false;
-+	priv->dma_maxburst = BCMENET_DMA_MAXBURST;
-+
- 	ret = compute_hw_mtu(priv, dev->mtu);
- 	if (ret)
- 		goto out;
-@@ -1899,60 +1957,916 @@ struct platform_driver bcm63xx_enet_driv
- };
- 
- /*
-- * reserve & remap memory space shared between all macs
-+ * switch mii access callbacks
-  */
--static int bcm_enet_shared_probe(struct platform_device *pdev)
-+static int bcmenet_sw_mdio_read(struct bcm_enet_priv *priv,
-+				int ext, int phy_id, int location)
- {
--	struct resource *res;
--	void __iomem *p[3];
--	unsigned int i;
-+	u32 reg;
-+	int ret;
- 
--	memset(bcm_enet_shared_base, 0, sizeof(bcm_enet_shared_base));
-+	spin_lock_bh(&priv->enetsw_mdio_lock);
-+	enetsw_writel(priv, 0, ENETSW_MDIOC_REG);
- 
--	for (i = 0; i < 3; i++) {
--		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
--		p[i] = devm_ioremap_resource(&pdev->dev, res);
--		if (!p[i])
--			return -ENOMEM;
--	}
-+	reg = ENETSW_MDIOC_RD_MASK |
-+		(phy_id << ENETSW_MDIOC_PHYID_SHIFT) |
-+		(location << ENETSW_MDIOC_REG_SHIFT);
-+
-+	if (ext)
-+		reg |= ENETSW_MDIOC_EXT_MASK;
-+
-+	enetsw_writel(priv, reg, ENETSW_MDIOC_REG);
-+	udelay(50);
-+	ret = enetsw_readw(priv, ENETSW_MDIOD_REG);
-+	spin_unlock_bh(&priv->enetsw_mdio_lock);
-+	return ret;
-+}
- 
--	memcpy(bcm_enet_shared_base, p, sizeof(bcm_enet_shared_base));
-+static void bcmenet_sw_mdio_write(struct bcm_enet_priv *priv,
-+				 int ext, int phy_id, int location,
-+				 uint16_t data)
-+{
-+	u32 reg;
- 
--	return 0;
-+	spin_lock_bh(&priv->enetsw_mdio_lock);
-+	enetsw_writel(priv, 0, ENETSW_MDIOC_REG);
-+
-+	reg = ENETSW_MDIOC_WR_MASK |
-+		(phy_id << ENETSW_MDIOC_PHYID_SHIFT) |
-+		(location << ENETSW_MDIOC_REG_SHIFT);
-+
-+	if (ext)
-+		reg |= ENETSW_MDIOC_EXT_MASK;
-+
-+	reg |= data;
-+
-+	enetsw_writel(priv, reg, ENETSW_MDIOC_REG);
-+	udelay(50);
-+	spin_unlock_bh(&priv->enetsw_mdio_lock);
- }
- 
--static int bcm_enet_shared_remove(struct platform_device *pdev)
-+static inline int bcm_enet_port_is_rgmii(int portid)
- {
--	return 0;
-+	return portid >= ENETSW_RGMII_PORT0;
- }
- 
- /*
-- * this "shared" driver is needed because both macs share a single
-- * address space
-+ * enet sw PHY polling
-  */
--struct platform_driver bcm63xx_enet_shared_driver = {
--	.probe	= bcm_enet_shared_probe,
--	.remove	= bcm_enet_shared_remove,
--	.driver	= {
--		.name	= "bcm63xx_enet_shared",
--		.owner  = THIS_MODULE,
--	},
--};
-+static void swphy_poll_timer(unsigned long data)
-+{
-+	struct bcm_enet_priv *priv = (struct bcm_enet_priv *)data;
-+	unsigned int i;
-+
-+	for (i = 0; i < priv->num_ports; i++) {
-+		struct bcm63xx_enetsw_port *port;
-+		int val, j, up, advertise, lpa, lpa2, speed, duplex, media;
-+		int external_phy = bcm_enet_port_is_rgmii(i);
-+		u8 override;
-+
-+		port = &priv->used_ports[i];
-+		if (!port->used)
-+			continue;
-+
-+		if (port->bypass_link)
-+			continue;
-+
-+		/* dummy read to clear */
-+		for (j = 0; j < 2; j++)
-+			val = bcmenet_sw_mdio_read(priv, external_phy,
-+						   port->phy_id, MII_BMSR);
-+
-+		if (val == 0xffff)
-+			continue;
-+
-+		up = (val & BMSR_LSTATUS) ? 1 : 0;
-+		if (!(up ^ priv->sw_port_link[i]))
-+			continue;
-+
-+		priv->sw_port_link[i] = up;
-+
-+		/* link changed */
-+		if (!up) {
-+			dev_info(&priv->pdev->dev, "link DOWN on %s\n",
-+				 port->name);
-+			enetsw_writeb(priv, ENETSW_PORTOV_ENABLE_MASK,
-+				      ENETSW_PORTOV_REG(i));
-+			enetsw_writeb(priv, ENETSW_PTCTRL_RXDIS_MASK |
-+				      ENETSW_PTCTRL_TXDIS_MASK,
-+				      ENETSW_PTCTRL_REG(i));
-+			continue;
-+		}
-+
-+		advertise = bcmenet_sw_mdio_read(priv, external_phy,
-+						 port->phy_id, MII_ADVERTISE);
-+
-+		lpa = bcmenet_sw_mdio_read(priv, external_phy, port->phy_id,
-+					   MII_LPA);
-+
-+		lpa2 = bcmenet_sw_mdio_read(priv, external_phy, port->phy_id,
-+					    MII_STAT1000);
-+
-+		/* figure out media and duplex from advertise and LPA values */
-+		media = mii_nway_result(lpa & advertise);
-+		duplex = (media & ADVERTISE_FULL) ? 1 : 0;
-+		if (lpa2 & LPA_1000FULL)
-+			duplex = 1;
-+
-+		if (lpa2 & (LPA_1000FULL | LPA_1000HALF))
-+			speed = 1000;
-+		else {
-+			if (media & (ADVERTISE_100FULL | ADVERTISE_100HALF))
-+				speed = 100;
-+			else
-+				speed = 10;
-+		}
-+
-+		dev_info(&priv->pdev->dev,
-+			 "link UP on %s, %dMbps, %s-duplex\n",
-+			 port->name, speed, duplex ? "full" : "half");
-+
-+		override = ENETSW_PORTOV_ENABLE_MASK |
-+			ENETSW_PORTOV_LINKUP_MASK;
-+
-+		if (speed == 1000)
-+			override |= ENETSW_IMPOV_1000_MASK;
-+		else if (speed == 100)
-+			override |= ENETSW_IMPOV_100_MASK;
-+		if (duplex)
-+			override |= ENETSW_IMPOV_FDX_MASK;
-+
-+		enetsw_writeb(priv, override, ENETSW_PORTOV_REG(i));
-+		enetsw_writeb(priv, 0, ENETSW_PTCTRL_REG(i));
-+	}
-+
-+	priv->swphy_poll.expires = jiffies + HZ;
-+	add_timer(&priv->swphy_poll);
-+}
- 
- /*
-- * entry point
-+ * open callback, allocate dma rings & buffers and start rx operation
-  */
--static int __init bcm_enet_init(void)
-+static int bcm_enetsw_open(struct net_device *dev)
- {
--	int ret;
-+	struct bcm_enet_priv *priv;
-+	struct device *kdev;
-+	int i, ret;
-+	unsigned int size;
-+	void *p;
-+	u32 val;
- 
--	ret = platform_driver_register(&bcm63xx_enet_shared_driver);
--	if (ret)
--		return ret;
-+	priv = netdev_priv(dev);
-+	kdev = &priv->pdev->dev;
- 
--	ret = platform_driver_register(&bcm63xx_enet_driver);
-+	/* mask all interrupts and request them */
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
-+
-+	ret = request_irq(priv->irq_rx, bcm_enet_isr_dma,
-+			  IRQF_DISABLED, dev->name, dev);
- 	if (ret)
--		platform_driver_unregister(&bcm63xx_enet_shared_driver);
-+		goto out_freeirq;
-+
-+	if (priv->irq_tx != -1) {
-+		ret = request_irq(priv->irq_tx, bcm_enet_isr_dma,
-+				  IRQF_DISABLED, dev->name, dev);
-+		if (ret)
-+			goto out_freeirq_rx;
-+	}
-+
-+	/* allocate rx dma ring */
-+	size = priv->rx_ring_size * sizeof(struct bcm_enet_desc);
-+	p = dma_alloc_coherent(kdev, size, &priv->rx_desc_dma, GFP_KERNEL);
-+	if (!p) {
-+		dev_err(kdev, "cannot allocate rx ring %u\n", size);
-+		ret = -ENOMEM;
-+		goto out_freeirq_tx;
-+	}
-+
-+	memset(p, 0, size);
-+	priv->rx_desc_alloc_size = size;
-+	priv->rx_desc_cpu = p;
-+
-+	/* allocate tx dma ring */
-+	size = priv->tx_ring_size * sizeof(struct bcm_enet_desc);
-+	p = dma_alloc_coherent(kdev, size, &priv->tx_desc_dma, GFP_KERNEL);
-+	if (!p) {
-+		dev_err(kdev, "cannot allocate tx ring\n");
-+		ret = -ENOMEM;
-+		goto out_free_rx_ring;
-+	}
-+
-+	memset(p, 0, size);
-+	priv->tx_desc_alloc_size = size;
-+	priv->tx_desc_cpu = p;
-+
-+	priv->tx_skb = kzalloc(sizeof(struct sk_buff *) * priv->tx_ring_size,
-+			       GFP_KERNEL);
-+	if (!priv->tx_skb) {
-+		dev_err(kdev, "cannot allocate rx skb queue\n");
-+		ret = -ENOMEM;
-+		goto out_free_tx_ring;
-+	}
-+
-+	priv->tx_desc_count = priv->tx_ring_size;
-+	priv->tx_dirty_desc = 0;
-+	priv->tx_curr_desc = 0;
-+	spin_lock_init(&priv->tx_lock);
-+
-+	/* init & fill rx ring with skbs */
-+	priv->rx_skb = kzalloc(sizeof(struct sk_buff *) * priv->rx_ring_size,
-+			       GFP_KERNEL);
-+	if (!priv->rx_skb) {
-+		dev_err(kdev, "cannot allocate rx skb queue\n");
-+		ret = -ENOMEM;
-+		goto out_free_tx_skb;
-+	}
-+
-+	priv->rx_desc_count = 0;
-+	priv->rx_dirty_desc = 0;
-+	priv->rx_curr_desc = 0;
-+
-+	/* disable all ports */
-+	for (i = 0; i < priv->num_ports; i++) {
-+		enetsw_writeb(priv, ENETSW_PORTOV_ENABLE_MASK,
-+			      ENETSW_PORTOV_REG(i));
-+		enetsw_writeb(priv, ENETSW_PTCTRL_RXDIS_MASK |
-+			      ENETSW_PTCTRL_TXDIS_MASK,
-+			      ENETSW_PTCTRL_REG(i));
-+
-+		priv->sw_port_link[i] = 0;
-+	}
-+
-+	/* reset mib */
-+	val = enetsw_readb(priv, ENETSW_GMCR_REG);
-+	val |= ENETSW_GMCR_RST_MIB_MASK;
-+	enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-+	mdelay(1);
-+	val &= ~ENETSW_GMCR_RST_MIB_MASK;
-+	enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-+	mdelay(1);
-+
-+	/* force CPU port state */
-+	val = enetsw_readb(priv, ENETSW_IMPOV_REG);
-+	val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
-+	enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
-+
-+	/* enable switch forward engine */
-+	val = enetsw_readb(priv, ENETSW_SWMODE_REG);
-+	val |= ENETSW_SWMODE_FWD_EN_MASK;
-+	enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
-+
-+	/* enable jumbo on all ports */
-+	enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
-+	enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
-+
-+	/* initialize flow control buffer allocation */
-+	enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
-+			ENETDMA_BUFALLOC_REG(priv->rx_chan));
-+
-+	if (bcm_enet_refill_rx(dev)) {
-+		dev_err(kdev, "cannot allocate rx skb queue\n");
-+		ret = -ENOMEM;
-+		goto out;
-+	}
-+
-+	/* write rx & tx ring addresses */
-+	enet_dmas_writel(priv, priv->rx_desc_dma,
-+			 ENETDMAS_RSTART_REG(priv->rx_chan));
-+	enet_dmas_writel(priv, priv->tx_desc_dma,
-+			 ENETDMAS_RSTART_REG(priv->tx_chan));
-+
-+	/* clear remaining state ram for rx & tx channel */
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG(priv->rx_chan));
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG(priv->tx_chan));
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->rx_chan));
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->tx_chan));
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->rx_chan));
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->tx_chan));
-+
-+	/* set dma maximum burst len */
-+	enet_dmac_writel(priv, priv->dma_maxburst,
-+			 ENETDMAC_MAXBURST_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, priv->dma_maxburst,
-+			 ENETDMAC_MAXBURST_REG(priv->tx_chan));
-+
-+	/* set flow control low/high threshold to 1/3 / 2/3 */
-+	val = priv->rx_ring_size / 3;
-+	enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));
-+	val = (priv->rx_ring_size * 2) / 3;
-+	enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));
-+
-+	/* all set, enable mac and interrupts, start dma engine and
-+	 * kick rx dma channel
-+	 */
-+	wmb();
-+	enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
-+	enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
-+			 ENETDMAC_CHANCFG_REG(priv->rx_chan));
-+
-+	/* watch "packet transferred" interrupt in rx and tx */
-+	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
-+			 ENETDMAC_IR_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
-+			 ENETDMAC_IR_REG(priv->tx_chan));
-+
-+	/* make sure we enable napi before rx interrupt  */
-+	napi_enable(&priv->napi);
-+
-+	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
-+			 ENETDMAC_IRMASK_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
-+			 ENETDMAC_IRMASK_REG(priv->tx_chan));
-+
-+	netif_carrier_on(dev);
-+	netif_start_queue(dev);
-+
-+	/* apply override config for bypass_link ports here. */
-+	for (i = 0; i < priv->num_ports; i++) {
-+		struct bcm63xx_enetsw_port *port;
-+		u8 override;
-+		port = &priv->used_ports[i];
-+		if (!port->used)
-+			continue;
-+
-+		if (!port->bypass_link)
-+			continue;
-+
-+		override = ENETSW_PORTOV_ENABLE_MASK |
-+			ENETSW_PORTOV_LINKUP_MASK;
-+
-+		switch (port->force_speed) {
-+		case 1000:
-+			override |= ENETSW_IMPOV_1000_MASK;
-+			break;
-+		case 100:
-+			override |= ENETSW_IMPOV_100_MASK;
-+			break;
-+		case 10:
-+			break;
-+		default:
-+			pr_warn("invalid forced speed on port %s: assume 10\n",
-+			       port->name);
-+			break;
-+		}
-+
-+		if (port->force_duplex_full)
-+			override |= ENETSW_IMPOV_FDX_MASK;
-+
-+
-+		enetsw_writeb(priv, override, ENETSW_PORTOV_REG(i));
-+		enetsw_writeb(priv, 0, ENETSW_PTCTRL_REG(i));
-+	}
-+
-+	/* start phy polling timer */
-+	init_timer(&priv->swphy_poll);
-+	priv->swphy_poll.function = swphy_poll_timer;
-+	priv->swphy_poll.data = (unsigned long)priv;
-+	priv->swphy_poll.expires = jiffies;
-+	add_timer(&priv->swphy_poll);
-+	return 0;
-+
-+out:
-+	for (i = 0; i < priv->rx_ring_size; i++) {
-+		struct bcm_enet_desc *desc;
-+
-+		if (!priv->rx_skb[i])
-+			continue;
-+
-+		desc = &priv->rx_desc_cpu[i];
-+		dma_unmap_single(kdev, desc->address, priv->rx_skb_size,
-+				 DMA_FROM_DEVICE);
-+		kfree_skb(priv->rx_skb[i]);
-+	}
-+	kfree(priv->rx_skb);
-+
-+out_free_tx_skb:
-+	kfree(priv->tx_skb);
-+
-+out_free_tx_ring:
-+	dma_free_coherent(kdev, priv->tx_desc_alloc_size,
-+			  priv->tx_desc_cpu, priv->tx_desc_dma);
-+
-+out_free_rx_ring:
-+	dma_free_coherent(kdev, priv->rx_desc_alloc_size,
-+			  priv->rx_desc_cpu, priv->rx_desc_dma);
-+
-+out_freeirq_tx:
-+	if (priv->irq_tx != -1)
-+		free_irq(priv->irq_tx, dev);
-+
-+out_freeirq_rx:
-+	free_irq(priv->irq_rx, dev);
-+
-+out_freeirq:
-+	return ret;
-+}
-+
-+/* stop callback */
-+static int bcm_enetsw_stop(struct net_device *dev)
-+{
-+	struct bcm_enet_priv *priv;
-+	struct device *kdev;
-+	int i;
-+
-+	priv = netdev_priv(dev);
-+	kdev = &priv->pdev->dev;
-+
-+	del_timer_sync(&priv->swphy_poll);
-+	netif_stop_queue(dev);
-+	napi_disable(&priv->napi);
-+	del_timer_sync(&priv->rx_timeout);
-+
-+	/* mask all interrupts */
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
-+
-+	/* disable dma & mac */
-+	bcm_enet_disable_dma(priv, priv->tx_chan);
-+	bcm_enet_disable_dma(priv, priv->rx_chan);
-+
-+	/* force reclaim of all tx buffers */
-+	bcm_enet_tx_reclaim(dev, 1);
-+
-+	/* free the rx skb ring */
-+	for (i = 0; i < priv->rx_ring_size; i++) {
-+		struct bcm_enet_desc *desc;
-+
-+		if (!priv->rx_skb[i])
-+			continue;
-+
-+		desc = &priv->rx_desc_cpu[i];
-+		dma_unmap_single(kdev, desc->address, priv->rx_skb_size,
-+				 DMA_FROM_DEVICE);
-+		kfree_skb(priv->rx_skb[i]);
-+	}
-+
-+	/* free remaining allocated memory */
-+	kfree(priv->rx_skb);
-+	kfree(priv->tx_skb);
-+	dma_free_coherent(kdev, priv->rx_desc_alloc_size,
-+			  priv->rx_desc_cpu, priv->rx_desc_dma);
-+	dma_free_coherent(kdev, priv->tx_desc_alloc_size,
-+			  priv->tx_desc_cpu, priv->tx_desc_dma);
-+	if (priv->irq_tx != -1)
-+		free_irq(priv->irq_tx, dev);
-+	free_irq(priv->irq_rx, dev);
-+
-+	return 0;
-+}
-+
-+/* try to sort out phy external status by walking the used_port field
-+ * in the bcm_enet_priv structure. in case the phy address is not
-+ * assigned to any physical port on the switch, assume it is external
-+ * (and yell at the user).
-+ */
-+static int bcm_enetsw_phy_is_external(struct bcm_enet_priv *priv, int phy_id)
-+{
-+	int i;
-+
-+	for (i = 0; i < priv->num_ports; ++i) {
-+		if (!priv->used_ports[i].used)
-+			continue;
-+		if (priv->used_ports[i].phy_id == phy_id)
-+			return bcm_enet_port_is_rgmii(i);
-+	}
-+
-+	printk_once(KERN_WARNING  "bcm63xx_enet: could not find a used port with phy_id %i, assuming phy is external\n",
-+		    phy_id);
-+	return 1;
-+}
-+
-+/* can't use bcmenet_sw_mdio_read directly as we need to sort out
-+ * external/internal status of the given phy_id first.
-+ */
-+static int bcm_enetsw_mii_mdio_read(struct net_device *dev, int phy_id,
-+				    int location)
-+{
-+	struct bcm_enet_priv *priv;
-+
-+	priv = netdev_priv(dev);
-+	return bcmenet_sw_mdio_read(priv,
-+				    bcm_enetsw_phy_is_external(priv, phy_id),
-+				    phy_id, location);
-+}
-+
-+/* can't use bcmenet_sw_mdio_write directly as we need to sort out
-+ * external/internal status of the given phy_id first.
-+ */
-+static void bcm_enetsw_mii_mdio_write(struct net_device *dev, int phy_id,
-+				      int location,
-+				      int val)
-+{
-+	struct bcm_enet_priv *priv;
-+
-+	priv = netdev_priv(dev);
-+	bcmenet_sw_mdio_write(priv, bcm_enetsw_phy_is_external(priv, phy_id),
-+			      phy_id, location, val);
-+}
-+
-+static int bcm_enetsw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
-+{
-+	struct mii_if_info mii;
-+
-+	mii.dev = dev;
-+	mii.mdio_read = bcm_enetsw_mii_mdio_read;
-+	mii.mdio_write = bcm_enetsw_mii_mdio_write;
-+	mii.phy_id = 0;
-+	mii.phy_id_mask = 0x3f;
-+	mii.reg_num_mask = 0x1f;
-+	return generic_mii_ioctl(&mii, if_mii(rq), cmd, NULL);
-+
-+}
-+
-+static const struct net_device_ops bcm_enetsw_ops = {
-+	.ndo_open		= bcm_enetsw_open,
-+	.ndo_stop		= bcm_enetsw_stop,
-+	.ndo_start_xmit		= bcm_enet_start_xmit,
-+	.ndo_change_mtu		= bcm_enet_change_mtu,
-+	.ndo_do_ioctl		= bcm_enetsw_ioctl,
-+};
-+
-+
-+static const struct bcm_enet_stats bcm_enetsw_gstrings_stats[] = {
-+	{ "rx_packets", DEV_STAT(rx_packets), -1 },
-+	{ "tx_packets",	DEV_STAT(tx_packets), -1 },
-+	{ "rx_bytes", DEV_STAT(rx_bytes), -1 },
-+	{ "tx_bytes", DEV_STAT(tx_bytes), -1 },
-+	{ "rx_errors", DEV_STAT(rx_errors), -1 },
-+	{ "tx_errors", DEV_STAT(tx_errors), -1 },
-+	{ "rx_dropped",	DEV_STAT(rx_dropped), -1 },
-+	{ "tx_dropped",	DEV_STAT(tx_dropped), -1 },
-+
-+	{ "tx_good_octets", GEN_STAT(mib.tx_gd_octets), ETHSW_MIB_RX_GD_OCT },
-+	{ "tx_unicast", GEN_STAT(mib.tx_unicast), ETHSW_MIB_RX_BRDCAST },
-+	{ "tx_broadcast", GEN_STAT(mib.tx_brdcast), ETHSW_MIB_RX_BRDCAST },
-+	{ "tx_multicast", GEN_STAT(mib.tx_mult), ETHSW_MIB_RX_MULT },
-+	{ "tx_64_octets", GEN_STAT(mib.tx_64), ETHSW_MIB_RX_64 },
-+	{ "tx_65_127_oct", GEN_STAT(mib.tx_65_127), ETHSW_MIB_RX_65_127 },
-+	{ "tx_128_255_oct", GEN_STAT(mib.tx_128_255), ETHSW_MIB_RX_128_255 },
-+	{ "tx_256_511_oct", GEN_STAT(mib.tx_256_511), ETHSW_MIB_RX_256_511 },
-+	{ "tx_512_1023_oct", GEN_STAT(mib.tx_512_1023), ETHSW_MIB_RX_512_1023},
-+	{ "tx_1024_1522_oct", GEN_STAT(mib.tx_1024_max),
-+	  ETHSW_MIB_RX_1024_1522 },
-+	{ "tx_1523_2047_oct", GEN_STAT(mib.tx_1523_2047),
-+	  ETHSW_MIB_RX_1523_2047 },
-+	{ "tx_2048_4095_oct", GEN_STAT(mib.tx_2048_4095),
-+	  ETHSW_MIB_RX_2048_4095 },
-+	{ "tx_4096_8191_oct", GEN_STAT(mib.tx_4096_8191),
-+	  ETHSW_MIB_RX_4096_8191 },
-+	{ "tx_8192_9728_oct", GEN_STAT(mib.tx_8192_9728),
-+	  ETHSW_MIB_RX_8192_9728 },
-+	{ "tx_oversize", GEN_STAT(mib.tx_ovr), ETHSW_MIB_RX_OVR },
-+	{ "tx_oversize_drop", GEN_STAT(mib.tx_ovr), ETHSW_MIB_RX_OVR_DISC },
-+	{ "tx_dropped",	GEN_STAT(mib.tx_drop), ETHSW_MIB_RX_DROP },
-+	{ "tx_undersize", GEN_STAT(mib.tx_underrun), ETHSW_MIB_RX_UND },
-+	{ "tx_pause", GEN_STAT(mib.tx_pause), ETHSW_MIB_RX_PAUSE },
-+
-+	{ "rx_good_octets", GEN_STAT(mib.rx_gd_octets), ETHSW_MIB_TX_ALL_OCT },
-+	{ "rx_broadcast", GEN_STAT(mib.rx_brdcast), ETHSW_MIB_TX_BRDCAST },
-+	{ "rx_multicast", GEN_STAT(mib.rx_mult), ETHSW_MIB_TX_MULT },
-+	{ "rx_unicast", GEN_STAT(mib.rx_unicast), ETHSW_MIB_TX_MULT },
-+	{ "rx_pause", GEN_STAT(mib.rx_pause), ETHSW_MIB_TX_PAUSE },
-+	{ "rx_dropped", GEN_STAT(mib.rx_drop), ETHSW_MIB_TX_DROP_PKTS },
-+
-+};
-+
-+#define BCM_ENETSW_STATS_LEN	\
-+	(sizeof(bcm_enetsw_gstrings_stats) / sizeof(struct bcm_enet_stats))
-+
-+static void bcm_enetsw_get_strings(struct net_device *netdev,
-+				   u32 stringset, u8 *data)
-+{
-+	int i;
-+
-+	switch (stringset) {
-+	case ETH_SS_STATS:
-+		for (i = 0; i < BCM_ENETSW_STATS_LEN; i++) {
-+			memcpy(data + i * ETH_GSTRING_LEN,
-+			       bcm_enetsw_gstrings_stats[i].stat_string,
-+			       ETH_GSTRING_LEN);
-+		}
-+		break;
-+	}
-+}
-+
-+static int bcm_enetsw_get_sset_count(struct net_device *netdev,
-+				     int string_set)
-+{
-+	switch (string_set) {
-+	case ETH_SS_STATS:
-+		return BCM_ENETSW_STATS_LEN;
-+	default:
-+		return -EINVAL;
-+	}
-+}
-+
-+static void bcm_enetsw_get_drvinfo(struct net_device *netdev,
-+				   struct ethtool_drvinfo *drvinfo)
-+{
-+	strncpy(drvinfo->driver, bcm_enet_driver_name, 32);
-+	strncpy(drvinfo->version, bcm_enet_driver_version, 32);
-+	strncpy(drvinfo->fw_version, "N/A", 32);
-+	strncpy(drvinfo->bus_info, "bcm63xx", 32);
-+	drvinfo->n_stats = BCM_ENETSW_STATS_LEN;
-+}
-+
-+static void bcm_enetsw_get_ethtool_stats(struct net_device *netdev,
-+					 struct ethtool_stats *stats,
-+					 u64 *data)
-+{
-+	struct bcm_enet_priv *priv;
-+	int i;
-+
-+	priv = netdev_priv(netdev);
-+
-+	for (i = 0; i < BCM_ENETSW_STATS_LEN; i++) {
-+		const struct bcm_enet_stats *s;
-+		u32 lo, hi;
-+		char *p;
-+		int reg;
-+
-+		s = &bcm_enetsw_gstrings_stats[i];
-+
-+		reg = s->mib_reg;
-+		if (reg == -1)
-+			continue;
-+
-+		lo = enetsw_readl(priv, ENETSW_MIB_REG(reg));
-+		p = (char *)priv + s->stat_offset;
-+
-+		if (s->sizeof_stat == sizeof(u64)) {
-+			hi = enetsw_readl(priv, ENETSW_MIB_REG(reg + 1));
-+			*(u64 *)p = ((u64)hi << 32 | lo);
-+		} else {
-+			*(u32 *)p = lo;
-+		}
-+	}
-+
-+	for (i = 0; i < BCM_ENETSW_STATS_LEN; i++) {
-+		const struct bcm_enet_stats *s;
-+		char *p;
-+
-+		s = &bcm_enetsw_gstrings_stats[i];
-+
-+		if (s->mib_reg == -1)
-+			p = (char *)&netdev->stats + s->stat_offset;
-+		else
-+			p = (char *)priv + s->stat_offset;
-+
-+		data[i] = (s->sizeof_stat == sizeof(u64)) ?
-+			*(u64 *)p : *(u32 *)p;
-+	}
-+}
-+
-+static void bcm_enetsw_get_ringparam(struct net_device *dev,
-+				     struct ethtool_ringparam *ering)
-+{
-+	struct bcm_enet_priv *priv;
-+
-+	priv = netdev_priv(dev);
-+
-+	/* rx/tx ring is actually only limited by memory */
-+	ering->rx_max_pending = 8192;
-+	ering->tx_max_pending = 8192;
-+	ering->rx_mini_max_pending = 0;
-+	ering->rx_jumbo_max_pending = 0;
-+	ering->rx_pending = priv->rx_ring_size;
-+	ering->tx_pending = priv->tx_ring_size;
-+}
-+
-+static int bcm_enetsw_set_ringparam(struct net_device *dev,
-+				    struct ethtool_ringparam *ering)
-+{
-+	struct bcm_enet_priv *priv;
-+	int was_running;
-+
-+	priv = netdev_priv(dev);
-+
-+	was_running = 0;
-+	if (netif_running(dev)) {
-+		bcm_enetsw_stop(dev);
-+		was_running = 1;
-+	}
-+
-+	priv->rx_ring_size = ering->rx_pending;
-+	priv->tx_ring_size = ering->tx_pending;
-+
-+	if (was_running) {
-+		int err;
-+
-+		err = bcm_enetsw_open(dev);
-+		if (err)
-+			dev_close(dev);
-+	}
-+	return 0;
-+}
-+
-+static struct ethtool_ops bcm_enetsw_ethtool_ops = {
-+	.get_strings		= bcm_enetsw_get_strings,
-+	.get_sset_count		= bcm_enetsw_get_sset_count,
-+	.get_ethtool_stats      = bcm_enetsw_get_ethtool_stats,
-+	.get_drvinfo		= bcm_enetsw_get_drvinfo,
-+	.get_ringparam		= bcm_enetsw_get_ringparam,
-+	.set_ringparam		= bcm_enetsw_set_ringparam,
-+};
-+
-+/* allocate netdevice, request register memory and register device. */
-+static int bcm_enetsw_probe(struct platform_device *pdev)
-+{
-+	struct bcm_enet_priv *priv;
-+	struct net_device *dev;
-+	struct bcm63xx_enetsw_platform_data *pd;
-+	struct resource *res_mem;
-+	int ret, irq_rx, irq_tx;
-+
-+	/* stop if shared driver failed, assume driver->probe will be
-+	 * called in the same order we register devices (correct ?)
-+	 */
-+	if (!bcm_enet_shared_base[0])
-+		return -ENODEV;
-+
-+	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	irq_rx = platform_get_irq(pdev, 0);
-+	irq_tx = platform_get_irq(pdev, 1);
-+	if (!res_mem || irq_rx < 0)
-+		return -ENODEV;
-+
-+	ret = 0;
-+	dev = alloc_etherdev(sizeof(*priv));
-+	if (!dev)
-+		return -ENOMEM;
-+	priv = netdev_priv(dev);
-+	memset(priv, 0, sizeof(*priv));
-+
-+	/* initialize default and fetch platform data */
-+	priv->enet_is_sw = true;
-+	priv->irq_rx = irq_rx;
-+	priv->irq_tx = irq_tx;
-+	priv->rx_ring_size = BCMENET_DEF_RX_DESC;
-+	priv->tx_ring_size = BCMENET_DEF_TX_DESC;
-+	priv->dma_maxburst = BCMENETSW_DMA_MAXBURST;
-+
-+	pd = pdev->dev.platform_data;
-+	if (pd) {
-+		memcpy(dev->dev_addr, pd->mac_addr, ETH_ALEN);
-+		memcpy(priv->used_ports, pd->used_ports,
-+		       sizeof(pd->used_ports));
-+		priv->num_ports = pd->num_ports;
-+	}
-+
-+	ret = compute_hw_mtu(priv, dev->mtu);
-+	if (ret)
-+		goto out;
-+
-+	if (!request_mem_region(res_mem->start, resource_size(res_mem),
-+				"bcm63xx_enetsw")) {
-+		ret = -EBUSY;
-+		goto out;
-+	}
-+
-+	priv->base = ioremap(res_mem->start, resource_size(res_mem));
-+	if (priv->base == NULL) {
-+		ret = -ENOMEM;
-+		goto out_release_mem;
-+	}
-+
-+	priv->mac_clk = clk_get(&pdev->dev, "enetsw");
-+	if (IS_ERR(priv->mac_clk)) {
-+		ret = PTR_ERR(priv->mac_clk);
-+		goto out_unmap;
-+	}
-+	clk_enable(priv->mac_clk);
-+
-+	priv->rx_chan = 0;
-+	priv->tx_chan = 1;
-+	spin_lock_init(&priv->rx_lock);
-+
-+	/* init rx timeout (used for oom) */
-+	init_timer(&priv->rx_timeout);
-+	priv->rx_timeout.function = bcm_enet_refill_rx_timer;
-+	priv->rx_timeout.data = (unsigned long)dev;
-+
-+	/* register netdevice */
-+	dev->netdev_ops = &bcm_enetsw_ops;
-+	netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16);
-+	SET_ETHTOOL_OPS(dev, &bcm_enetsw_ethtool_ops);
-+	SET_NETDEV_DEV(dev, &pdev->dev);
-+
-+	spin_lock_init(&priv->enetsw_mdio_lock);
-+
-+	ret = register_netdev(dev);
-+	if (ret)
-+		goto out_put_clk;
-+
-+	netif_carrier_off(dev);
-+	platform_set_drvdata(pdev, dev);
-+	priv->pdev = pdev;
-+	priv->net_dev = dev;
-+
-+	return 0;
-+
-+out_put_clk:
-+	clk_put(priv->mac_clk);
-+
-+out_unmap:
-+	iounmap(priv->base);
-+
-+out_release_mem:
-+	release_mem_region(res_mem->start, resource_size(res_mem));
-+out:
-+	free_netdev(dev);
-+	return ret;
-+}
-+
-+
-+/* exit func, stops hardware and unregisters netdevice */
-+static int bcm_enetsw_remove(struct platform_device *pdev)
-+{
-+	struct bcm_enet_priv *priv;
-+	struct net_device *dev;
-+	struct resource *res;
-+
-+	/* stop netdevice */
-+	dev = platform_get_drvdata(pdev);
-+	priv = netdev_priv(dev);
-+	unregister_netdev(dev);
-+
-+	/* release device resources */
-+	iounmap(priv->base);
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	release_mem_region(res->start, resource_size(res));
-+
-+	platform_set_drvdata(pdev, NULL);
-+	free_netdev(dev);
-+	return 0;
-+}
-+
-+struct platform_driver bcm63xx_enetsw_driver = {
-+	.probe	= bcm_enetsw_probe,
-+	.remove	= bcm_enetsw_remove,
-+	.driver	= {
-+		.name	= "bcm63xx_enetsw",
-+		.owner  = THIS_MODULE,
-+	},
-+};
-+
-+/* reserve & remap memory space shared between all macs */
-+static int bcm_enet_shared_probe(struct platform_device *pdev)
-+{
-+	struct resource *res;
-+	void __iomem *p[3];
-+	unsigned int i;
-+
-+	memset(bcm_enet_shared_base, 0, sizeof(bcm_enet_shared_base));
-+
-+	for (i = 0; i < 3; i++) {
-+		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
-+		p[i] = devm_ioremap_resource(&pdev->dev, res);
-+		if (!p[i])
-+			return -ENOMEM;
-+	}
-+
-+	memcpy(bcm_enet_shared_base, p, sizeof(bcm_enet_shared_base));
-+
-+	return 0;
-+}
-+
-+static int bcm_enet_shared_remove(struct platform_device *pdev)
-+{
-+	return 0;
-+}
-+
-+/* this "shared" driver is needed because both macs share a single
-+ * address space
-+ */
-+struct platform_driver bcm63xx_enet_shared_driver = {
-+	.probe	= bcm_enet_shared_probe,
-+	.remove	= bcm_enet_shared_remove,
-+	.driver	= {
-+		.name	= "bcm63xx_enet_shared",
-+		.owner  = THIS_MODULE,
-+	},
-+};
-+
-+/* entry point */
-+static int __init bcm_enet_init(void)
-+{
-+	int ret;
-+
-+	ret = platform_driver_register(&bcm63xx_enet_shared_driver);
-+	if (ret)
-+		return ret;
-+
-+	ret = platform_driver_register(&bcm63xx_enet_driver);
-+	if (ret)
-+		platform_driver_unregister(&bcm63xx_enet_shared_driver);
-+
-+	ret = platform_driver_register(&bcm63xx_enetsw_driver);
-+	if (ret) {
-+		platform_driver_unregister(&bcm63xx_enet_driver);
-+		platform_driver_unregister(&bcm63xx_enet_shared_driver);
-+	}
- 
- 	return ret;
- }
-@@ -1960,6 +2874,7 @@ static int __init bcm_enet_init(void)
- static void __exit bcm_enet_exit(void)
- {
- 	platform_driver_unregister(&bcm63xx_enet_driver);
-+	platform_driver_unregister(&bcm63xx_enetsw_driver);
- 	platform_driver_unregister(&bcm63xx_enet_shared_driver);
- }
- 
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-@@ -18,6 +18,7 @@
- 
- /* maximum burst len for dma (4 bytes unit) */
- #define BCMENET_DMA_MAXBURST	16
-+#define BCMENETSW_DMA_MAXBURST	8
- 
- /* tx transmit threshold (4 bytes unit), fifo is 256 bytes, the value
-  * must be low enough so that a DMA transfer of above burst length can
-@@ -84,11 +85,60 @@
- #define ETH_MIB_RX_CNTRL			54
- 
- 
-+/*
-+ * SW MIB Counters register definitions
-+*/
-+#define ETHSW_MIB_TX_ALL_OCT			0
-+#define ETHSW_MIB_TX_DROP_PKTS			2
-+#define ETHSW_MIB_TX_QOS_PKTS			3
-+#define ETHSW_MIB_TX_BRDCAST			4
-+#define ETHSW_MIB_TX_MULT			5
-+#define ETHSW_MIB_TX_UNI			6
-+#define ETHSW_MIB_TX_COL			7
-+#define ETHSW_MIB_TX_1_COL			8
-+#define ETHSW_MIB_TX_M_COL			9
-+#define ETHSW_MIB_TX_DEF			10
-+#define ETHSW_MIB_TX_LATE			11
-+#define ETHSW_MIB_TX_EX_COL			12
-+#define ETHSW_MIB_TX_PAUSE			14
-+#define ETHSW_MIB_TX_QOS_OCT			15
-+
-+#define ETHSW_MIB_RX_ALL_OCT			17
-+#define ETHSW_MIB_RX_UND			19
-+#define ETHSW_MIB_RX_PAUSE			20
-+#define ETHSW_MIB_RX_64				21
-+#define ETHSW_MIB_RX_65_127			22
-+#define ETHSW_MIB_RX_128_255			23
-+#define ETHSW_MIB_RX_256_511			24
-+#define ETHSW_MIB_RX_512_1023			25
-+#define ETHSW_MIB_RX_1024_1522			26
-+#define ETHSW_MIB_RX_OVR			27
-+#define ETHSW_MIB_RX_JAB			28
-+#define ETHSW_MIB_RX_ALIGN			29
-+#define ETHSW_MIB_RX_CRC			30
-+#define ETHSW_MIB_RX_GD_OCT			31
-+#define ETHSW_MIB_RX_DROP			33
-+#define ETHSW_MIB_RX_UNI			34
-+#define ETHSW_MIB_RX_MULT			35
-+#define ETHSW_MIB_RX_BRDCAST			36
-+#define ETHSW_MIB_RX_SA_CHANGE			37
-+#define ETHSW_MIB_RX_FRAG			38
-+#define ETHSW_MIB_RX_OVR_DISC			39
-+#define ETHSW_MIB_RX_SYM			40
-+#define ETHSW_MIB_RX_QOS_PKTS			41
-+#define ETHSW_MIB_RX_QOS_OCT			42
-+#define ETHSW_MIB_RX_1523_2047			44
-+#define ETHSW_MIB_RX_2048_4095			45
-+#define ETHSW_MIB_RX_4096_8191			46
-+#define ETHSW_MIB_RX_8192_9728			47
-+
-+
- struct bcm_enet_mib_counters {
- 	u64 tx_gd_octets;
- 	u32 tx_gd_pkts;
- 	u32 tx_all_octets;
- 	u32 tx_all_pkts;
-+	u32 tx_unicast;
- 	u32 tx_brdcast;
- 	u32 tx_mult;
- 	u32 tx_64;
-@@ -97,7 +147,12 @@ struct bcm_enet_mib_counters {
- 	u32 tx_256_511;
- 	u32 tx_512_1023;
- 	u32 tx_1024_max;
-+	u32 tx_1523_2047;
-+	u32 tx_2048_4095;
-+	u32 tx_4096_8191;
-+	u32 tx_8192_9728;
- 	u32 tx_jab;
-+	u32 tx_drop;
- 	u32 tx_ovr;
- 	u32 tx_frag;
- 	u32 tx_underrun;
-@@ -114,6 +169,7 @@ struct bcm_enet_mib_counters {
- 	u32 rx_all_octets;
- 	u32 rx_all_pkts;
- 	u32 rx_brdcast;
-+	u32 rx_unicast;
- 	u32 rx_mult;
- 	u32 rx_64;
- 	u32 rx_65_127;
-@@ -197,6 +253,9 @@ struct bcm_enet_priv {
- 	/* number of dma desc in tx ring */
- 	int tx_ring_size;
- 
-+	/* maximum dma burst size */
-+	int dma_maxburst;
-+
- 	/* cpu view of rx dma ring */
- 	struct bcm_enet_desc *tx_desc_cpu;
- 
-@@ -269,6 +328,18 @@ struct bcm_enet_priv {
- 
- 	/* maximum hardware transmit/receive size */
- 	unsigned int hw_mtu;
-+
-+	bool enet_is_sw;
-+
-+	/* port mapping for switch devices */
-+	int num_ports;
-+	struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
-+	int sw_port_link[ENETSW_MAX_PORT];
-+
-+	/* used to poll switch port state */
-+	struct timer_list swphy_poll;
-+	spinlock_t enetsw_mdio_lock;
- };
- 
-+
- #endif /* ! BCM63XX_ENET_H_ */

target/linux/brcm63xx/patches-3.10/048-bcm63xx_enet-add-support-Broadcom-BCM6345-Ethernet.patch

@@ -1,838 +0,0 @@
-From fb7e08ec47f7168b8f4f72d8e3b5bcf625e1089e Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Wed, 12 Jun 2013 18:53:05 +0000
-Subject: [PATCH] bcm63xx_enet: add support Broadcom BCM6345 Ethernet
-
-This patch adds support for the Broadcom BCM6345 SoC Ethernet. BCM6345
-has a slightly different and older DMA engine which requires the
-following modifications:
-
-- the width of the DMA channels on BCM6345 is 64 bytes vs 16 bytes,
-  which means that the helpers enet_dma{c,s} need to account for this
-  channel width and we can no longer use macros
-
-- BCM6345 DMA engine does not have any internal SRAM for transfering
-  buffers
-
-- BCM6345 buffer allocation and flow control is not per-channel but
-  global (done in RSET_ENETDMA)
-
-- the DMA engine bits are right-shifted by 3 compared to other DMA
-  generations
-
-- the DMA enable/interrupt masks are a little different (we need to
-  enabled more bits for 6345)
-
-- some register have the same meaning but are offsetted in the ENET_DMAC
-  space so a lookup table is required to return the proper offset
-
-The MAC itself is identical and requires no modifications to work.
-
-Signed-off-by: Florian Fainelli <[email protected]>
-Acked-by: Ralf Baechle <[email protected]>
----
- arch/mips/bcm63xx/dev-enet.c                       |   65 ++++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h   |    3 +-
- .../include/asm/mach-bcm63xx/bcm63xx_dev_enet.h    |   94 +++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h  |   43 ++++-
- drivers/net/ethernet/broadcom/bcm63xx_enet.c       |  200 ++++++++++++--------
- drivers/net/ethernet/broadcom/bcm63xx_enet.h       |   15 ++
- 6 files changed, 329 insertions(+), 91 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-enet.c
-+++ b/arch/mips/bcm63xx/dev-enet.c
-@@ -9,10 +9,44 @@
- #include <linux/init.h>
- #include <linux/kernel.h>
- #include <linux/platform_device.h>
-+#include <linux/export.h>
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
- 
-+#ifdef BCMCPU_RUNTIME_DETECT
-+static const unsigned long bcm6348_regs_enetdmac[] = {
-+	[ENETDMAC_CHANCFG]	= ENETDMAC_CHANCFG_REG,
-+	[ENETDMAC_IR]		= ENETDMAC_IR_REG,
-+	[ENETDMAC_IRMASK]	= ENETDMAC_IRMASK_REG,
-+	[ENETDMAC_MAXBURST]	= ENETDMAC_MAXBURST_REG,
-+};
-+
-+static const unsigned long bcm6345_regs_enetdmac[] = {
-+	[ENETDMAC_CHANCFG]	= ENETDMA_6345_CHANCFG_REG,
-+	[ENETDMAC_IR]		= ENETDMA_6345_IR_REG,
-+	[ENETDMAC_IRMASK]	= ENETDMA_6345_IRMASK_REG,
-+	[ENETDMAC_MAXBURST]	= ENETDMA_6345_MAXBURST_REG,
-+	[ENETDMAC_BUFALLOC]	= ENETDMA_6345_BUFALLOC_REG,
-+	[ENETDMAC_RSTART]	= ENETDMA_6345_RSTART_REG,
-+	[ENETDMAC_FC]		= ENETDMA_6345_FC_REG,
-+	[ENETDMAC_LEN]		= ENETDMA_6345_LEN_REG,
-+};
-+
-+const unsigned long *bcm63xx_regs_enetdmac;
-+EXPORT_SYMBOL(bcm63xx_regs_enetdmac);
-+
-+static __init void bcm63xx_enetdmac_regs_init(void)
-+{
-+	if (BCMCPU_IS_6345())
-+		bcm63xx_regs_enetdmac = bcm6345_regs_enetdmac;
-+	else
-+		bcm63xx_regs_enetdmac = bcm6348_regs_enetdmac;
-+}
-+#else
-+static __init void bcm63xx_enetdmac_regs_init(void) { }
-+#endif
-+
- static struct resource shared_res[] = {
- 	{
- 		.start		= -1, /* filled at runtime */
-@@ -137,12 +171,19 @@ static int __init register_shared(void)
- 	if (shared_device_registered)
- 		return 0;
- 
-+	bcm63xx_enetdmac_regs_init();
-+
- 	shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
- 	shared_res[0].end = shared_res[0].start;
--	shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
-+	if (BCMCPU_IS_6345())
-+		shared_res[0].end += (RSET_6345_ENETDMA_SIZE) - 1;
-+	else
-+		shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
- 
- 	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
- 		chan_count = 32;
-+	else if (BCMCPU_IS_6345())
-+		chan_count = 8;
- 	else
- 		chan_count = 16;
- 
-@@ -172,7 +213,7 @@ int __init bcm63xx_enet_register(int uni
- 	if (unit > 1)
- 		return -ENODEV;
- 
--	if (unit == 1 && BCMCPU_IS_6338())
-+	if (unit == 1 && (BCMCPU_IS_6338() || BCMCPU_IS_6345()))
- 		return -ENODEV;
- 
- 	ret = register_shared();
-@@ -213,6 +254,21 @@ int __init bcm63xx_enet_register(int uni
- 		dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY);
- 	}
- 
-+	dpd->dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK;
-+	dpd->dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK;
-+	if (BCMCPU_IS_6345()) {
-+		dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_CHAINING_MASK;
-+		dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_WRAP_EN_MASK;
-+		dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_FLOWC_EN_MASK;
-+		dpd->dma_chan_int_mask |= ENETDMA_IR_BUFDONE_MASK;
-+		dpd->dma_chan_int_mask |= ENETDMA_IR_NOTOWNER_MASK;
-+		dpd->dma_chan_width = ENETDMA_6345_CHAN_WIDTH;
-+		dpd->dma_desc_shift = ENETDMA_6345_DESC_SHIFT;
-+	} else {
-+		dpd->dma_has_sram = true;
-+		dpd->dma_chan_width = ENETDMA_CHAN_WIDTH;
-+	}
-+
- 	ret = platform_device_register(pdev);
- 	if (ret)
- 		return ret;
-@@ -246,6 +302,11 @@ bcm63xx_enetsw_register(const struct bcm
- 	else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
- 		enetsw_pd.num_ports = ENETSW_PORTS_6368;
- 
-+	enetsw_pd.dma_has_sram = true;
-+	enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
-+	enetsw_pd.dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK;
-+	enetsw_pd.dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK;
-+
- 	ret = platform_device_register(&bcm63xx_enetsw_device);
- 	if (ret)
- 		return ret;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -188,6 +188,7 @@ enum bcm63xx_regs_set {
- #define BCM_6368_RSET_SPI_SIZE		1804
- #define RSET_ENET_SIZE			2048
- #define RSET_ENETDMA_SIZE		256
-+#define RSET_6345_ENETDMA_SIZE		64
- #define RSET_ENETDMAC_SIZE(chans)	(16 * (chans))
- #define RSET_ENETDMAS_SIZE(chans)	(16 * (chans))
- #define RSET_ENETSW_SIZE		65536
-@@ -363,7 +364,7 @@ enum bcm63xx_regs_set {
- #define BCM_6345_USBDMA_BASE		(0xfffe2800)
- #define BCM_6345_ENET0_BASE		(0xfffe1800)
- #define BCM_6345_ENETDMA_BASE		(0xfffe2800)
--#define BCM_6345_ENETDMAC_BASE		(0xfffe2900)
-+#define BCM_6345_ENETDMAC_BASE		(0xfffe2840)
- #define BCM_6345_ENETDMAS_BASE		(0xfffe2a00)
- #define BCM_6345_ENETSW_BASE		(0xdeadbeef)
- #define BCM_6345_PCMCIA_BASE		(0xfffe2028)
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-@@ -4,6 +4,8 @@
- #include <linux/if_ether.h>
- #include <linux/init.h>
- 
-+#include <bcm63xx_regs.h>
-+
- /*
-  * on board ethernet platform data
-  */
-@@ -37,6 +39,21 @@ struct bcm63xx_enet_platform_data {
- 					  int phy_id, int reg),
- 			  void (*mii_write)(struct net_device *dev,
- 					    int phy_id, int reg, int val));
-+
-+	/* DMA channel enable mask */
-+	u32 dma_chan_en_mask;
-+
-+	/* DMA channel interrupt mask */
-+	u32 dma_chan_int_mask;
-+
-+	/* DMA engine has internal SRAM */
-+	bool dma_has_sram;
-+
-+	/* DMA channel register width */
-+	unsigned int dma_chan_width;
-+
-+	/* DMA descriptor shift */
-+	unsigned int dma_desc_shift;
- };
- 
- /*
-@@ -63,6 +80,18 @@ struct bcm63xx_enetsw_platform_data {
- 	char mac_addr[ETH_ALEN];
- 	int num_ports;
- 	struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
-+
-+	/* DMA channel enable mask */
-+	u32 dma_chan_en_mask;
-+
-+	/* DMA channel interrupt mask */
-+	u32 dma_chan_int_mask;
-+
-+	/* DMA channel register width */
-+	unsigned int dma_chan_width;
-+
-+	/* DMA engine has internal SRAM */
-+	bool dma_has_sram;
- };
- 
- int __init bcm63xx_enet_register(int unit,
-@@ -70,4 +99,69 @@ int __init bcm63xx_enet_register(int uni
- 
- int bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd);
- 
-+enum bcm63xx_regs_enetdmac {
-+	ENETDMAC_CHANCFG,
-+	ENETDMAC_IR,
-+	ENETDMAC_IRMASK,
-+	ENETDMAC_MAXBURST,
-+	ENETDMAC_BUFALLOC,
-+	ENETDMAC_RSTART,
-+	ENETDMAC_FC,
-+	ENETDMAC_LEN,
-+};
-+
-+static inline unsigned long bcm63xx_enetdmacreg(enum bcm63xx_regs_enetdmac reg)
-+{
-+#ifdef BCMCPU_RUNTIME_DETECT
-+	extern const unsigned long *bcm63xx_regs_enetdmac;
-+
-+	return bcm63xx_regs_enetdmac[reg];
-+#else
-+#ifdef CONFIG_BCM63XX_CPU_6345
-+	switch (reg) {
-+	case ENETDMAC_CHANCFG:
-+		return ENETDMA_6345_CHANCFG_REG;
-+	case ENETDMAC_IR:
-+		return ENETDMA_6345_IR_REG;
-+	case ENETDMAC_IRMASK:
-+		return ENETDMA_6345_IRMASK_REG;
-+	case ENETDMAC_MAXBURST:
-+		return ENETDMA_6345_MAXBURST_REG;
-+	case ENETDMAC_BUFALLOC:
-+		return ENETDMA_6345_BUFALLOC_REG;
-+	case ENETDMAC_RSTART:
-+		return ENETDMA_6345_RSTART_REG;
-+	case ENETDMAC_FC:
-+		return ENETDMA_6345_FC_REG;
-+	case ENETDMAC_LEN:
-+		return ENETDMA_6345_LEN_REG;
-+	}
-+#endif
-+#if defined(CONFIG_BCM63XX_CPU_6328) || \
-+	defined(CONFIG_BCM63XX_CPU_6338) || \
-+	defined(CONFIG_BCM63XX_CPU_6348) || \
-+	defined(CONFIG_BCM63XX_CPU_6358) || \
-+	defined(CONFIG_BCM63XX_CPU_6362) || \
-+	defined(CONFIG_BCM63XX_CPU_6368)
-+	switch (reg) {
-+	case ENETDMAC_CHANCFG:
-+		return ENETDMAC_CHANCFG_REG;
-+	case ENETDMAC_IR:
-+		return ENETDMAC_IR_REG;
-+	case ENETDMAC_IRMASK:
-+		return ENETDMAC_IRMASK_REG;
-+	case ENETDMAC_MAXBURST:
-+		return ENETDMAC_MAXBURST_REG;
-+	case ENETDMAC_BUFALLOC:
-+	case ENETDMAC_RSTART:
-+	case ENETDMAC_FC:
-+	case ENETDMAC_LEN:
-+		return 0;
-+	}
-+#endif
-+#endif
-+	return 0;
-+}
-+
-+
- #endif /* ! BCM63XX_DEV_ENET_H_ */
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -770,6 +770,8 @@
- /*************************************************************************
-  * _REG relative to RSET_ENETDMA
-  *************************************************************************/
-+#define ENETDMA_CHAN_WIDTH		0x10
-+#define ENETDMA_6345_CHAN_WIDTH		0x40
- 
- /* Controller Configuration Register */
- #define ENETDMA_CFG_REG			(0x0)
-@@ -825,31 +827,56 @@
- /* State Ram Word 4 */
- #define ENETDMA_SRAM4_REG(x)		(0x20c + (x) * 0x10)
- 
-+/* Broadcom 6345 ENET DMA definitions */
-+#define ENETDMA_6345_CHANCFG_REG	(0x00)
-+
-+#define ENETDMA_6345_MAXBURST_REG	(0x40)
-+
-+#define ENETDMA_6345_RSTART_REG		(0x08)
-+
-+#define ENETDMA_6345_LEN_REG		(0x0C)
-+
-+#define ENETDMA_6345_IR_REG		(0x14)
-+
-+#define ENETDMA_6345_IRMASK_REG		(0x18)
-+
-+#define ENETDMA_6345_FC_REG		(0x1C)
-+
-+#define ENETDMA_6345_BUFALLOC_REG	(0x20)
-+
-+/* Shift down for EOP, SOP and WRAP bits */
-+#define ENETDMA_6345_DESC_SHIFT		(3)
- 
- /*************************************************************************
-  * _REG relative to RSET_ENETDMAC
-  *************************************************************************/
- 
- /* Channel Configuration register */
--#define ENETDMAC_CHANCFG_REG(x)		((x) * 0x10)
-+#define ENETDMAC_CHANCFG_REG		(0x0)
- #define ENETDMAC_CHANCFG_EN_SHIFT	0
- #define ENETDMAC_CHANCFG_EN_MASK	(1 << ENETDMAC_CHANCFG_EN_SHIFT)
- #define ENETDMAC_CHANCFG_PKTHALT_SHIFT	1
- #define ENETDMAC_CHANCFG_PKTHALT_MASK	(1 << ENETDMAC_CHANCFG_PKTHALT_SHIFT)
- #define ENETDMAC_CHANCFG_BUFHALT_SHIFT	2
- #define ENETDMAC_CHANCFG_BUFHALT_MASK	(1 << ENETDMAC_CHANCFG_BUFHALT_SHIFT)
-+#define ENETDMAC_CHANCFG_CHAINING_SHIFT	2
-+#define ENETDMAC_CHANCFG_CHAINING_MASK	(1 << ENETDMAC_CHANCFG_CHAINING_SHIFT)
-+#define ENETDMAC_CHANCFG_WRAP_EN_SHIFT	3
-+#define ENETDMAC_CHANCFG_WRAP_EN_MASK	(1 << ENETDMAC_CHANCFG_WRAP_EN_SHIFT)
-+#define ENETDMAC_CHANCFG_FLOWC_EN_SHIFT	4
-+#define ENETDMAC_CHANCFG_FLOWC_EN_MASK	(1 << ENETDMAC_CHANCFG_FLOWC_EN_SHIFT)
- 
- /* Interrupt Control/Status register */
--#define ENETDMAC_IR_REG(x)		(0x4 + (x) * 0x10)
-+#define ENETDMAC_IR_REG			(0x4)
- #define ENETDMAC_IR_BUFDONE_MASK	(1 << 0)
- #define ENETDMAC_IR_PKTDONE_MASK	(1 << 1)
- #define ENETDMAC_IR_NOTOWNER_MASK	(1 << 2)
- 
- /* Interrupt Mask register */
--#define ENETDMAC_IRMASK_REG(x)		(0x8 + (x) * 0x10)
-+#define ENETDMAC_IRMASK_REG		(0x8)
- 
- /* Maximum Burst Length */
--#define ENETDMAC_MAXBURST_REG(x)	(0xc + (x) * 0x10)
-+#define ENETDMAC_MAXBURST_REG		(0xc)
- 
- 
- /*************************************************************************
-@@ -857,16 +884,16 @@
-  *************************************************************************/
- 
- /* Ring Start Address register */
--#define ENETDMAS_RSTART_REG(x)		((x) * 0x10)
-+#define ENETDMAS_RSTART_REG		(0x0)
- 
- /* State Ram Word 2 */
--#define ENETDMAS_SRAM2_REG(x)		(0x4 + (x) * 0x10)
-+#define ENETDMAS_SRAM2_REG		(0x4)
- 
- /* State Ram Word 3 */
--#define ENETDMAS_SRAM3_REG(x)		(0x8 + (x) * 0x10)
-+#define ENETDMAS_SRAM3_REG		(0x8)
- 
- /* State Ram Word 4 */
--#define ENETDMAS_SRAM4_REG(x)		(0xc + (x) * 0x10)
-+#define ENETDMAS_SRAM4_REG		(0xc)
- 
- 
- /*************************************************************************
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -107,26 +107,28 @@ static inline void enet_dma_writel(struc
- 	bcm_writel(val, bcm_enet_shared_base[0] + off);
- }
- 
--static inline u32 enet_dmac_readl(struct bcm_enet_priv *priv, u32 off)
-+static inline u32 enet_dmac_readl(struct bcm_enet_priv *priv, u32 off, int chan)
- {
--	return bcm_readl(bcm_enet_shared_base[1] + off);
-+	return bcm_readl(bcm_enet_shared_base[1] +
-+		bcm63xx_enetdmacreg(off) + chan * priv->dma_chan_width);
- }
- 
- static inline void enet_dmac_writel(struct bcm_enet_priv *priv,
--				       u32 val, u32 off)
-+				       u32 val, u32 off, int chan)
- {
--	bcm_writel(val, bcm_enet_shared_base[1] + off);
-+	bcm_writel(val, bcm_enet_shared_base[1] +
-+		bcm63xx_enetdmacreg(off) + chan * priv->dma_chan_width);
- }
- 
--static inline u32 enet_dmas_readl(struct bcm_enet_priv *priv, u32 off)
-+static inline u32 enet_dmas_readl(struct bcm_enet_priv *priv, u32 off, int chan)
- {
--	return bcm_readl(bcm_enet_shared_base[2] + off);
-+	return bcm_readl(bcm_enet_shared_base[2] + off + chan * priv->dma_chan_width);
- }
- 
- static inline void enet_dmas_writel(struct bcm_enet_priv *priv,
--				       u32 val, u32 off)
-+				       u32 val, u32 off, int chan)
- {
--	bcm_writel(val, bcm_enet_shared_base[2] + off);
-+	bcm_writel(val, bcm_enet_shared_base[2] + off + chan * priv->dma_chan_width);
- }
- 
- /*
-@@ -262,7 +264,7 @@ static int bcm_enet_refill_rx(struct net
- 		len_stat = priv->rx_skb_size << DMADESC_LENGTH_SHIFT;
- 		len_stat |= DMADESC_OWNER_MASK;
- 		if (priv->rx_dirty_desc == priv->rx_ring_size - 1) {
--			len_stat |= DMADESC_WRAP_MASK;
-+			len_stat |= (DMADESC_WRAP_MASK >> priv->dma_desc_shift);
- 			priv->rx_dirty_desc = 0;
- 		} else {
- 			priv->rx_dirty_desc++;
-@@ -273,7 +275,10 @@ static int bcm_enet_refill_rx(struct net
- 		priv->rx_desc_count++;
- 
- 		/* tell dma engine we allocated one buffer */
--		enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));
-+		if (priv->dma_has_sram)
-+			enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));
-+		else
-+			enet_dmac_writel(priv, 1, ENETDMAC_BUFALLOC, priv->rx_chan);
- 	}
- 
- 	/* If rx ring is still empty, set a timer to try allocating
-@@ -349,7 +354,8 @@ static int bcm_enet_receive_queue(struct
- 
- 		/* if the packet does not have start of packet _and_
- 		 * end of packet flag set, then just recycle it */
--		if ((len_stat & DMADESC_ESOP_MASK) != DMADESC_ESOP_MASK) {
-+		if ((len_stat & (DMADESC_ESOP_MASK >> priv->dma_desc_shift)) !=
-+			(DMADESC_ESOP_MASK >> priv->dma_desc_shift)) {
- 			dev->stats.rx_dropped++;
- 			continue;
- 		}
-@@ -410,8 +416,8 @@ static int bcm_enet_receive_queue(struct
- 		bcm_enet_refill_rx(dev);
- 
- 		/* kick rx dma */
--		enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
--				 ENETDMAC_CHANCFG_REG(priv->rx_chan));
-+		enet_dmac_writel(priv, priv->dma_chan_en_mask,
-+					 ENETDMAC_CHANCFG, priv->rx_chan);
- 	}
- 
- 	return processed;
-@@ -486,10 +492,10 @@ static int bcm_enet_poll(struct napi_str
- 	dev = priv->net_dev;
- 
- 	/* ack interrupts */
--	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
--			 ENETDMAC_IR_REG(priv->rx_chan));
--	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
--			 ENETDMAC_IR_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, priv->dma_chan_int_mask,
-+			 ENETDMAC_IR, priv->rx_chan);
-+	enet_dmac_writel(priv, priv->dma_chan_int_mask,
-+			 ENETDMAC_IR, priv->tx_chan);
- 
- 	/* reclaim sent skb */
- 	tx_work_done = bcm_enet_tx_reclaim(dev, 0);
-@@ -508,10 +514,10 @@ static int bcm_enet_poll(struct napi_str
- 	napi_complete(napi);
- 
- 	/* restore rx/tx interrupt */
--	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
--			 ENETDMAC_IRMASK_REG(priv->rx_chan));
--	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
--			 ENETDMAC_IRMASK_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, priv->dma_chan_int_mask,
-+			 ENETDMAC_IRMASK, priv->rx_chan);
-+	enet_dmac_writel(priv, priv->dma_chan_int_mask,
-+			 ENETDMAC_IRMASK, priv->tx_chan);
- 
- 	return rx_work_done;
- }
-@@ -554,8 +560,8 @@ static irqreturn_t bcm_enet_isr_dma(int
- 	priv = netdev_priv(dev);
- 
- 	/* mask rx/tx interrupts */
--	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
--	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->tx_chan);
- 
- 	napi_schedule(&priv->napi);
- 
-@@ -616,14 +622,14 @@ static int bcm_enet_start_xmit(struct sk
- 				       DMA_TO_DEVICE);
- 
- 	len_stat = (skb->len << DMADESC_LENGTH_SHIFT) & DMADESC_LENGTH_MASK;
--	len_stat |= DMADESC_ESOP_MASK |
-+	len_stat |= (DMADESC_ESOP_MASK >> priv->dma_desc_shift) |
- 		DMADESC_APPEND_CRC |
- 		DMADESC_OWNER_MASK;
- 
- 	priv->tx_curr_desc++;
- 	if (priv->tx_curr_desc == priv->tx_ring_size) {
- 		priv->tx_curr_desc = 0;
--		len_stat |= DMADESC_WRAP_MASK;
-+		len_stat |= (DMADESC_WRAP_MASK >> priv->dma_desc_shift);
- 	}
- 	priv->tx_desc_count--;
- 
-@@ -634,8 +640,8 @@ static int bcm_enet_start_xmit(struct sk
- 	wmb();
- 
- 	/* kick tx dma */
--	enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
--			 ENETDMAC_CHANCFG_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, priv->dma_chan_en_mask,
-+				 ENETDMAC_CHANCFG, priv->tx_chan);
- 
- 	/* stop queue if no more desc available */
- 	if (!priv->tx_desc_count)
-@@ -763,6 +769,9 @@ static void bcm_enet_set_flow(struct bcm
- 		val &= ~ENET_RXCFG_ENFLOW_MASK;
- 	enet_writel(priv, val, ENET_RXCFG_REG);
- 
-+	if (!priv->dma_has_sram)
-+		return;
-+
- 	/* tx flow control (pause frame generation) */
- 	val = enet_dma_readl(priv, ENETDMA_CFG_REG);
- 	if (tx_en)
-@@ -910,8 +919,8 @@ static int bcm_enet_open(struct net_devi
- 
- 	/* mask all interrupts and request them */
- 	enet_writel(priv, 0, ENET_IRMASK_REG);
--	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
--	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->tx_chan);
- 
- 	ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
- 	if (ret)
-@@ -986,8 +995,12 @@ static int bcm_enet_open(struct net_devi
- 	priv->rx_curr_desc = 0;
- 
- 	/* initialize flow control buffer allocation */
--	enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
--			ENETDMA_BUFALLOC_REG(priv->rx_chan));
-+	if (priv->dma_has_sram)
-+		enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
-+				ENETDMA_BUFALLOC_REG(priv->rx_chan));
-+	else
-+		enet_dmac_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
-+				ENETDMAC_BUFALLOC, priv->rx_chan);
- 
- 	if (bcm_enet_refill_rx(dev)) {
- 		dev_err(kdev, "cannot allocate rx skb queue\n");
-@@ -996,18 +1009,30 @@ static int bcm_enet_open(struct net_devi
- 	}
- 
- 	/* write rx & tx ring addresses */
--	enet_dmas_writel(priv, priv->rx_desc_dma,
--			 ENETDMAS_RSTART_REG(priv->rx_chan));
--	enet_dmas_writel(priv, priv->tx_desc_dma,
--			 ENETDMAS_RSTART_REG(priv->tx_chan));
-+	if (priv->dma_has_sram) {
-+		enet_dmas_writel(priv, priv->rx_desc_dma,
-+				 ENETDMAS_RSTART_REG, priv->rx_chan);
-+		enet_dmas_writel(priv, priv->tx_desc_dma,
-+			 ENETDMAS_RSTART_REG, priv->tx_chan);
-+	} else {
-+		enet_dmac_writel(priv, priv->rx_desc_dma,
-+				ENETDMAC_RSTART, priv->rx_chan);
-+		enet_dmac_writel(priv, priv->tx_desc_dma,
-+				ENETDMAC_RSTART, priv->tx_chan);
-+	}
- 
- 	/* clear remaining state ram for rx & tx channel */
--	enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG(priv->rx_chan));
--	enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG(priv->tx_chan));
--	enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->rx_chan));
--	enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->tx_chan));
--	enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->rx_chan));
--	enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->tx_chan));
-+	if (priv->dma_has_sram) {
-+		enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->rx_chan);
-+		enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->tx_chan);
-+		enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->rx_chan);
-+		enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->tx_chan);
-+		enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG, priv->rx_chan);
-+		enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG, priv->tx_chan);
-+	} else {
-+		enet_dmac_writel(priv, 0, ENETDMAC_FC, priv->rx_chan);
-+		enet_dmac_writel(priv, 0, ENETDMAC_FC, priv->tx_chan);
-+	}
- 
- 	/* set max rx/tx length */
- 	enet_writel(priv, priv->hw_mtu, ENET_RXMAXLEN_REG);
-@@ -1015,18 +1040,24 @@ static int bcm_enet_open(struct net_devi
- 
- 	/* set dma maximum burst len */
- 	enet_dmac_writel(priv, priv->dma_maxburst,
--			 ENETDMAC_MAXBURST_REG(priv->rx_chan));
-+			 ENETDMAC_MAXBURST, priv->rx_chan);
- 	enet_dmac_writel(priv, priv->dma_maxburst,
--			 ENETDMAC_MAXBURST_REG(priv->tx_chan));
-+			 ENETDMAC_MAXBURST, priv->tx_chan);
- 
- 	/* set correct transmit fifo watermark */
- 	enet_writel(priv, BCMENET_TX_FIFO_TRESH, ENET_TXWMARK_REG);
- 
- 	/* set flow control low/high threshold to 1/3 / 2/3 */
--	val = priv->rx_ring_size / 3;
--	enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));
--	val = (priv->rx_ring_size * 2) / 3;
--	enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));
-+	if (priv->dma_has_sram) {
-+		val = priv->rx_ring_size / 3;
-+		enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));
-+		val = (priv->rx_ring_size * 2) / 3;
-+		enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));
-+	} else {
-+		enet_dmac_writel(priv, 5, ENETDMAC_FC, priv->rx_chan);
-+		enet_dmac_writel(priv, priv->rx_ring_size, ENETDMAC_LEN, priv->rx_chan);
-+		enet_dmac_writel(priv, priv->tx_ring_size, ENETDMAC_LEN, priv->tx_chan);
-+	}
- 
- 	/* all set, enable mac and interrupts, start dma engine and
- 	 * kick rx dma channel */
-@@ -1035,26 +1066,26 @@ static int bcm_enet_open(struct net_devi
- 	val |= ENET_CTL_ENABLE_MASK;
- 	enet_writel(priv, val, ENET_CTL_REG);
- 	enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
--	enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
--			 ENETDMAC_CHANCFG_REG(priv->rx_chan));
-+	enet_dmac_writel(priv, priv->dma_chan_en_mask,
-+			 ENETDMAC_CHANCFG, priv->rx_chan);
- 
- 	/* watch "mib counters about to overflow" interrupt */
- 	enet_writel(priv, ENET_IR_MIB, ENET_IR_REG);
- 	enet_writel(priv, ENET_IR_MIB, ENET_IRMASK_REG);
- 
- 	/* watch "packet transferred" interrupt in rx and tx */
--	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
--			 ENETDMAC_IR_REG(priv->rx_chan));
--	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
--			 ENETDMAC_IR_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, priv->dma_chan_int_mask,
-+			 ENETDMAC_IR, priv->rx_chan);
-+	enet_dmac_writel(priv, priv->dma_chan_int_mask,
-+			 ENETDMAC_IR, priv->tx_chan);
- 
- 	/* make sure we enable napi before rx interrupt  */
- 	napi_enable(&priv->napi);
- 
--	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
--			 ENETDMAC_IRMASK_REG(priv->rx_chan));
--	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
--			 ENETDMAC_IRMASK_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, priv->dma_chan_int_mask,
-+			 ENETDMAC_IRMASK, priv->rx_chan);
-+	enet_dmac_writel(priv, priv->dma_chan_int_mask,
-+			 ENETDMAC_IRMASK, priv->tx_chan);
- 
- 	if (priv->has_phy)
- 		phy_start(priv->phydev);
-@@ -1134,13 +1165,13 @@ static void bcm_enet_disable_dma(struct
- {
- 	int limit;
- 
--	enet_dmac_writel(priv, 0, ENETDMAC_CHANCFG_REG(chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_CHANCFG, chan);
- 
- 	limit = 1000;
- 	do {
- 		u32 val;
- 
--		val = enet_dmac_readl(priv, ENETDMAC_CHANCFG_REG(chan));
-+		val = enet_dmac_readl(priv, ENETDMAC_CHANCFG, chan);
- 		if (!(val & ENETDMAC_CHANCFG_EN_MASK))
- 			break;
- 		udelay(1);
-@@ -1167,8 +1198,8 @@ static int bcm_enet_stop(struct net_devi
- 
- 	/* mask all interrupts */
- 	enet_writel(priv, 0, ENET_IRMASK_REG);
--	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
--	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->tx_chan);
- 
- 	/* make sure no mib update is scheduled */
- 	cancel_work_sync(&priv->mib_update_task);
-@@ -1782,6 +1813,11 @@ static int bcm_enet_probe(struct platfor
- 		priv->pause_tx = pd->pause_tx;
- 		priv->force_duplex_full = pd->force_duplex_full;
- 		priv->force_speed_100 = pd->force_speed_100;
-+		priv->dma_chan_en_mask = pd->dma_chan_en_mask;
-+		priv->dma_chan_int_mask = pd->dma_chan_int_mask;
-+		priv->dma_chan_width = pd->dma_chan_width;
-+		priv->dma_has_sram = pd->dma_has_sram;
-+		priv->dma_desc_shift = pd->dma_desc_shift;
- 	}
- 
- 	if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) {
-@@ -2119,8 +2155,8 @@ static int bcm_enetsw_open(struct net_de
- 	kdev = &priv->pdev->dev;
- 
- 	/* mask all interrupts and request them */
--	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
--	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->tx_chan);
- 
- 	ret = request_irq(priv->irq_rx, bcm_enet_isr_dma,
- 			  IRQF_DISABLED, dev->name, dev);
-@@ -2232,23 +2268,23 @@ static int bcm_enetsw_open(struct net_de
- 
- 	/* write rx & tx ring addresses */
- 	enet_dmas_writel(priv, priv->rx_desc_dma,
--			 ENETDMAS_RSTART_REG(priv->rx_chan));
-+			 ENETDMAS_RSTART_REG, priv->rx_chan);
- 	enet_dmas_writel(priv, priv->tx_desc_dma,
--			 ENETDMAS_RSTART_REG(priv->tx_chan));
-+			 ENETDMAS_RSTART_REG, priv->tx_chan);
- 
- 	/* clear remaining state ram for rx & tx channel */
--	enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG(priv->rx_chan));
--	enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG(priv->tx_chan));
--	enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->rx_chan));
--	enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->tx_chan));
--	enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->rx_chan));
--	enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->tx_chan));
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->rx_chan);
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->tx_chan);
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->rx_chan);
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->tx_chan);
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG, priv->rx_chan);
-+	enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG, priv->tx_chan);
- 
- 	/* set dma maximum burst len */
- 	enet_dmac_writel(priv, priv->dma_maxburst,
--			 ENETDMAC_MAXBURST_REG(priv->rx_chan));
-+			 ENETDMAC_MAXBURST, priv->rx_chan);
- 	enet_dmac_writel(priv, priv->dma_maxburst,
--			 ENETDMAC_MAXBURST_REG(priv->tx_chan));
-+			 ENETDMAC_MAXBURST, priv->tx_chan);
- 
- 	/* set flow control low/high threshold to 1/3 / 2/3 */
- 	val = priv->rx_ring_size / 3;
-@@ -2262,21 +2298,21 @@ static int bcm_enetsw_open(struct net_de
- 	wmb();
- 	enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
- 	enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
--			 ENETDMAC_CHANCFG_REG(priv->rx_chan));
-+			 ENETDMAC_CHANCFG, priv->rx_chan);
- 
- 	/* watch "packet transferred" interrupt in rx and tx */
- 	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
--			 ENETDMAC_IR_REG(priv->rx_chan));
-+			 ENETDMAC_IR, priv->rx_chan);
- 	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
--			 ENETDMAC_IR_REG(priv->tx_chan));
-+			 ENETDMAC_IR, priv->tx_chan);
- 
- 	/* make sure we enable napi before rx interrupt  */
- 	napi_enable(&priv->napi);
- 
- 	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
--			 ENETDMAC_IRMASK_REG(priv->rx_chan));
-+			 ENETDMAC_IRMASK, priv->rx_chan);
- 	enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
--			 ENETDMAC_IRMASK_REG(priv->tx_chan));
-+			 ENETDMAC_IRMASK, priv->tx_chan);
- 
- 	netif_carrier_on(dev);
- 	netif_start_queue(dev);
-@@ -2378,8 +2414,8 @@ static int bcm_enetsw_stop(struct net_de
- 	del_timer_sync(&priv->rx_timeout);
- 
- 	/* mask all interrupts */
--	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
--	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan);
-+	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->tx_chan);
- 
- 	/* disable dma & mac */
- 	bcm_enet_disable_dma(priv, priv->tx_chan);
-@@ -2713,6 +2749,10 @@ static int bcm_enetsw_probe(struct platf
- 		memcpy(priv->used_ports, pd->used_ports,
- 		       sizeof(pd->used_ports));
- 		priv->num_ports = pd->num_ports;
-+		priv->dma_has_sram = pd->dma_has_sram;
-+		priv->dma_chan_en_mask = pd->dma_chan_en_mask;
-+		priv->dma_chan_int_mask = pd->dma_chan_int_mask;
-+		priv->dma_chan_width = pd->dma_chan_width;
- 	}
- 
- 	ret = compute_hw_mtu(priv, dev->mtu);
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-@@ -339,6 +339,21 @@ struct bcm_enet_priv {
- 	/* used to poll switch port state */
- 	struct timer_list swphy_poll;
- 	spinlock_t enetsw_mdio_lock;
-+
-+	/* dma channel enable mask */
-+	u32 dma_chan_en_mask;
-+
-+	/* dma channel interrupt mask */
-+	u32 dma_chan_int_mask;
-+
-+	/* DMA engine has internal SRAM */
-+	bool dma_has_sram;
-+
-+	/* dma channel width */
-+	unsigned int dma_chan_width;
-+
-+	/* dma descriptor shift value */
-+	unsigned int dma_desc_shift;
- };
- 
- 

target/linux/brcm63xx/patches-3.10/049-spi-add-bcm63xx-HSSPI-driver.patch

@@ -1,531 +0,0 @@
-From 8e051b79ae3f66dbad96312fe2976401c28d2148 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 12 Nov 2011 12:19:55 +0100
-Subject: [PATCH 5/5] spi: add bcm63xx HSSPI driver
-
-Add a driver for the High Speed SPI controller found on newer BCM63XX SoCs.
-
-It does feature some new modes like 3-wire or dual spi, but neither of it
-is currently implemented.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- drivers/spi/Kconfig             |   7 +
- drivers/spi/Makefile            |   1 +
- drivers/spi/spi-bcm63xx-hsspi.c | 484 ++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 492 insertions(+)
- create mode 100644 drivers/spi/spi-bcm63xx-hsspi.c
-
---- a/drivers/spi/Kconfig
-+++ b/drivers/spi/Kconfig
-@@ -112,6 +112,13 @@ config SPI_BCM63XX
- 	help
-           Enable support for the SPI controller on the Broadcom BCM63xx SoCs.
- 
-+config SPI_BCM63XX_HSSPI
-+	tristate "Broadcom BCM63XX HS SPI controller driver"
-+	depends on BCM63XX || COMPILE_TEST
-+	help
-+	  This enables support for the High Speed SPI controller present on
-+	  newer Broadcom BCM63XX SoCs.
-+
- config SPI_BITBANG
- 	tristate "Utilities for Bitbanging SPI masters"
- 	help
---- a/drivers/spi/Makefile
-+++ b/drivers/spi/Makefile
-@@ -16,6 +16,7 @@ obj-$(CONFIG_SPI_ATH79)			+= spi-ath79.o
- obj-$(CONFIG_SPI_AU1550)		+= spi-au1550.o
- obj-$(CONFIG_SPI_BCM2835)		+= spi-bcm2835.o
- obj-$(CONFIG_SPI_BCM63XX)		+= spi-bcm63xx.o
-+obj-$(CONFIG_SPI_BCM63XX_HSSPI)		+= spi-bcm63xx-hsspi.o
- obj-$(CONFIG_SPI_BFIN5XX)		+= spi-bfin5xx.o
- obj-$(CONFIG_SPI_BFIN_SPORT)		+= spi-bfin-sport.o
- obj-$(CONFIG_SPI_BITBANG)		+= spi-bitbang.o
---- /dev/null
-+++ b/drivers/spi/spi-bcm63xx-hsspi.c
-@@ -0,0 +1,484 @@
-+/*
-+ * Broadcom BCM63XX High Speed SPI Controller driver
-+ *
-+ * Copyright 2000-2010 Broadcom Corporation
-+ * Copyright 2012-2013 Jonas Gorski <[email protected]>
-+ *
-+ * Licensed under the GNU/GPL. See COPYING for details.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/io.h>
-+#include <linux/clk.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/delay.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/err.h>
-+#include <linux/interrupt.h>
-+#include <linux/spi/spi.h>
-+#include <linux/workqueue.h>
-+#include <linux/mutex.h>
-+
-+#define HSSPI_GLOBAL_CTRL_REG			0x0
-+#define GLOBAL_CTRL_CS_POLARITY_SHIFT		0
-+#define GLOBAL_CTRL_CS_POLARITY_MASK		0x000000ff
-+#define GLOBAL_CTRL_PLL_CLK_CTRL_SHIFT		8
-+#define GLOBAL_CTRL_PLL_CLK_CTRL_MASK		0x0000ff00
-+#define GLOBAL_CTRL_CLK_GATE_SSOFF		BIT(16)
-+#define GLOBAL_CTRL_CLK_POLARITY		BIT(17)
-+#define GLOBAL_CTRL_MOSI_IDLE			BIT(18)
-+
-+#define HSSPI_GLOBAL_EXT_TRIGGER_REG		0x4
-+
-+#define HSSPI_INT_STATUS_REG			0x8
-+#define HSSPI_INT_STATUS_MASKED_REG		0xc
-+#define HSSPI_INT_MASK_REG			0x10
-+
-+#define HSSPI_PINGx_CMD_DONE(i)			BIT((i * 8) + 0)
-+#define HSSPI_PINGx_RX_OVER(i)			BIT((i * 8) + 1)
-+#define HSSPI_PINGx_TX_UNDER(i)			BIT((i * 8) + 2)
-+#define HSSPI_PINGx_POLL_TIMEOUT(i)		BIT((i * 8) + 3)
-+#define HSSPI_PINGx_CTRL_INVAL(i)		BIT((i * 8) + 4)
-+
-+#define HSSPI_INT_CLEAR_ALL			0xff001f1f
-+
-+#define HSSPI_PINGPONG_COMMAND_REG(x)		(0x80 + (x) * 0x40)
-+#define PINGPONG_CMD_COMMAND_MASK		0xf
-+#define PINGPONG_COMMAND_NOOP			0
-+#define PINGPONG_COMMAND_START_NOW		1
-+#define PINGPONG_COMMAND_START_TRIGGER		2
-+#define PINGPONG_COMMAND_HALT			3
-+#define PINGPONG_COMMAND_FLUSH			4
-+#define PINGPONG_CMD_PROFILE_SHIFT		8
-+#define PINGPONG_CMD_SS_SHIFT			12
-+
-+#define HSSPI_PINGPONG_STATUS_REG(x)		(0x84 + (x) * 0x40)
-+
-+#define HSSPI_PROFILE_CLK_CTRL_REG(x)		(0x100 + (x) * 0x20)
-+#define CLK_CTRL_FREQ_CTRL_MASK			0x0000ffff
-+#define CLK_CTRL_SPI_CLK_2X_SEL			BIT(14)
-+#define CLK_CTRL_ACCUM_RST_ON_LOOP		BIT(15)
-+
-+#define HSSPI_PROFILE_SIGNAL_CTRL_REG(x)	(0x104 + (x) * 0x20)
-+#define SIGNAL_CTRL_LATCH_RISING		BIT(12)
-+#define SIGNAL_CTRL_LAUNCH_RISING		BIT(13)
-+#define SIGNAL_CTRL_ASYNC_INPUT_PATH		BIT(16)
-+
-+#define HSSPI_PROFILE_MODE_CTRL_REG(x)		(0x108 + (x) * 0x20)
-+#define MODE_CTRL_MULTIDATA_RD_STRT_SHIFT	8
-+#define MODE_CTRL_MULTIDATA_WR_STRT_SHIFT	12
-+#define MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT	16
-+#define MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT	18
-+#define MODE_CTRL_MODE_3WIRE			BIT(20)
-+#define MODE_CTRL_PREPENDBYTE_CNT_SHIFT		24
-+
-+#define HSSPI_FIFO_REG(x)			(0x200 + (x) * 0x200)
-+
-+
-+#define HSSPI_OP_CODE_SHIFT			13
-+#define HSSPI_OP_SLEEP				(0 << HSSPI_OP_CODE_SHIFT)
-+#define HSSPI_OP_READ_WRITE			(1 << HSSPI_OP_CODE_SHIFT)
-+#define HSSPI_OP_WRITE				(2 << HSSPI_OP_CODE_SHIFT)
-+#define HSSPI_OP_READ				(3 << HSSPI_OP_CODE_SHIFT)
-+#define HSSPI_OP_SETIRQ				(4 << HSSPI_OP_CODE_SHIFT)
-+
-+#define HSSPI_BUFFER_LEN			512
-+#define HSSPI_OPCODE_LEN			2
-+
-+#define HSSPI_MAX_PREPEND_LEN			15
-+
-+#define HSSPI_MAX_SYNC_CLOCK			30000000
-+
-+#define HSSPI_BUS_NUM				1 /* 0 is legacy SPI */
-+
-+struct bcm63xx_hsspi {
-+	struct completion done;
-+	struct mutex bus_mutex;
-+
-+	struct platform_device *pdev;
-+	struct clk *clk;
-+	void __iomem *regs;
-+	u8 __iomem *fifo;
-+
-+	u32 speed_hz;
-+	u8 cs_polarity;
-+};
-+
-+static void bcm63xx_hsspi_set_cs(struct bcm63xx_hsspi *bs, unsigned cs,
-+				 bool active)
-+{
-+	u32 reg;
-+
-+	mutex_lock(&bs->bus_mutex);
-+	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+
-+	reg &= ~BIT(cs);
-+	if (active == !(bs->cs_polarity & BIT(cs)))
-+		reg |= BIT(cs);
-+
-+	__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+	mutex_unlock(&bs->bus_mutex);
-+}
-+
-+static void bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi *bs,
-+				  struct spi_device *spi, int hz)
-+{
-+	unsigned profile = spi->chip_select;
-+	u32 reg;
-+
-+	reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz));
-+	__raw_writel(CLK_CTRL_ACCUM_RST_ON_LOOP | reg,
-+		     bs->regs + HSSPI_PROFILE_CLK_CTRL_REG(profile));
-+
-+	reg = __raw_readl(bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));
-+	if (hz > HSSPI_MAX_SYNC_CLOCK)
-+		reg |= SIGNAL_CTRL_ASYNC_INPUT_PATH;
-+	else
-+		reg &= ~SIGNAL_CTRL_ASYNC_INPUT_PATH;
-+	__raw_writel(reg, bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));
-+
-+	mutex_lock(&bs->bus_mutex);
-+	/* setup clock polarity */
-+	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+	reg &= ~GLOBAL_CTRL_CLK_POLARITY;
-+	if (spi->mode & SPI_CPOL)
-+		reg |= GLOBAL_CTRL_CLK_POLARITY;
-+	__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+	mutex_unlock(&bs->bus_mutex);
-+}
-+
-+static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t)
-+{
-+	struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master);
-+	unsigned chip_select = spi->chip_select;
-+	u16 opcode = 0;
-+	int pending = t->len;
-+	int step_size = HSSPI_BUFFER_LEN;
-+	const u8 *tx = t->tx_buf;
-+	u8 *rx = t->rx_buf;
-+
-+	bcm63xx_hsspi_set_clk(bs, spi, t->speed_hz);
-+	bcm63xx_hsspi_set_cs(bs, spi->chip_select, true);
-+
-+	if (tx && rx)
-+		opcode = HSSPI_OP_READ_WRITE;
-+	else if (tx)
-+		opcode = HSSPI_OP_WRITE;
-+	else if (rx)
-+		opcode = HSSPI_OP_READ;
-+
-+	if (opcode != HSSPI_OP_READ)
-+		step_size -= HSSPI_OPCODE_LEN;
-+
-+	__raw_writel(0 << MODE_CTRL_PREPENDBYTE_CNT_SHIFT |
-+		     2 << MODE_CTRL_MULTIDATA_WR_STRT_SHIFT |
-+		     2 << MODE_CTRL_MULTIDATA_RD_STRT_SHIFT | 0xff,
-+		     bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select));
-+
-+	while (pending > 0) {
-+		int curr_step = min_t(int, step_size, pending);
-+
-+		init_completion(&bs->done);
-+		if (tx) {
-+			memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step);
-+			tx += curr_step;
-+		}
-+
-+		__raw_writew(opcode | curr_step, bs->fifo);
-+
-+		/* enable interrupt */
-+		__raw_writel(HSSPI_PINGx_CMD_DONE(0),
-+			     bs->regs + HSSPI_INT_MASK_REG);
-+
-+		/* start the transfer */
-+		__raw_writel(!chip_select << PINGPONG_CMD_SS_SHIFT |
-+			     chip_select << PINGPONG_CMD_PROFILE_SHIFT |
-+			     PINGPONG_COMMAND_START_NOW,
-+			     bs->regs + HSSPI_PINGPONG_COMMAND_REG(0));
-+
-+		if (wait_for_completion_timeout(&bs->done, HZ) == 0) {
-+			dev_err(&bs->pdev->dev, "transfer timed out!\n");
-+			return -ETIMEDOUT;
-+		}
-+
-+		if (rx) {
-+			memcpy_fromio(rx, bs->fifo, curr_step);
-+			rx += curr_step;
-+		}
-+
-+		pending -= curr_step;
-+	}
-+
-+	return 0;
-+}
-+
-+static int bcm63xx_hsspi_setup(struct spi_device *spi)
-+{
-+	struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master);
-+	u32 reg;
-+
-+	reg = __raw_readl(bs->regs +
-+			  HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select));
-+	reg &= ~(SIGNAL_CTRL_LAUNCH_RISING | SIGNAL_CTRL_LATCH_RISING);
-+	if (spi->mode & SPI_CPHA)
-+		reg |= SIGNAL_CTRL_LAUNCH_RISING;
-+	else
-+		reg |= SIGNAL_CTRL_LATCH_RISING;
-+	__raw_writel(reg, bs->regs +
-+		     HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select));
-+
-+	mutex_lock(&bs->bus_mutex);
-+	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+
-+	/* only change actual polarities if there is no transfer */
-+	if ((reg & GLOBAL_CTRL_CS_POLARITY_MASK) == bs->cs_polarity) {
-+		if (spi->mode & SPI_CS_HIGH)
-+			reg |= BIT(spi->chip_select);
-+		else
-+			reg &= ~BIT(spi->chip_select);
-+		__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+	}
-+
-+	if (spi->mode & SPI_CS_HIGH)
-+		bs->cs_polarity |= BIT(spi->chip_select);
-+	else
-+		bs->cs_polarity &= ~BIT(spi->chip_select);
-+
-+	mutex_unlock(&bs->bus_mutex);
-+
-+	return 0;
-+}
-+
-+static int bcm63xx_hsspi_transfer_one(struct spi_master *master,
-+				      struct spi_message *msg)
-+{
-+	struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
-+	struct spi_transfer *t;
-+	struct spi_device *spi = msg->spi;
-+	int status = -EINVAL;
-+	int dummy_cs;
-+	u32 reg;
-+
-+	/* This controller does not support keeping CS active during idle.
-+	 * To work around this, we use the following ugly hack:
-+	 *
-+	 * a. Invert the target chip select's polarity so it will be active.
-+	 * b. Select a "dummy" chip select to use as the hardware target.
-+	 * c. Invert the dummy chip select's polarity so it will be inactive
-+	 *    during the actual transfers.
-+	 * d. Tell the hardware to send to the dummy chip select. Thanks to
-+	 *    the multiplexed nature of SPI the actual target will receive
-+	 *    the transfer and we see its response.
-+	 *
-+	 * e. At the end restore the polarities again to their default values.
-+	 */
-+
-+	dummy_cs = !spi->chip_select;
-+	bcm63xx_hsspi_set_cs(bs, dummy_cs, true);
-+
-+	list_for_each_entry(t, &msg->transfers, transfer_list) {
-+		status = bcm63xx_hsspi_do_txrx(spi, t);
-+		if (status)
-+			break;
-+
-+		msg->actual_length += t->len;
-+
-+		if (t->delay_usecs)
-+			udelay(t->delay_usecs);
-+
-+		if (t->cs_change)
-+			bcm63xx_hsspi_set_cs(bs, spi->chip_select, false);
-+	}
-+
-+	mutex_lock(&bs->bus_mutex);
-+	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+	reg &= ~GLOBAL_CTRL_CS_POLARITY_MASK;
-+	reg |= bs->cs_polarity;
-+	__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+	mutex_unlock(&bs->bus_mutex);
-+
-+	msg->status = status;
-+	spi_finalize_current_message(master);
-+
-+	return 0;
-+}
-+
-+static irqreturn_t bcm63xx_hsspi_interrupt(int irq, void *dev_id)
-+{
-+	struct bcm63xx_hsspi *bs = (struct bcm63xx_hsspi *)dev_id;
-+
-+	if (__raw_readl(bs->regs + HSSPI_INT_STATUS_MASKED_REG) == 0)
-+		return IRQ_NONE;
-+
-+	__raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);
-+	__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
-+
-+	complete(&bs->done);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static int bcm63xx_hsspi_probe(struct platform_device *pdev)
-+{
-+	struct spi_master *master;
-+	struct bcm63xx_hsspi *bs;
-+	struct resource *res_mem;
-+	void __iomem *regs;
-+	struct device *dev = &pdev->dev;
-+	struct clk *clk;
-+	int irq, ret;
-+	u32 reg, rate;
-+
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq < 0) {
-+		dev_err(dev, "no irq\n");
-+		return -ENXIO;
-+	}
-+
-+	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	regs = devm_request_and_ioremap(dev, res_mem);
-+	if (IS_ERR(regs))
-+		return PTR_ERR(regs);
-+
-+	clk = clk_get(dev, "hsspi");
-+
-+	if (IS_ERR(clk))
-+		return PTR_ERR(clk);
-+
-+	rate = clk_get_rate(clk);
-+	if (!rate) {
-+		ret = -EINVAL;
-+		goto out_put_clk;
-+	}
-+
-+	clk_prepare_enable(clk);
-+
-+	master = spi_alloc_master(&pdev->dev, sizeof(*bs));
-+	if (!master) {
-+		ret = -ENOMEM;
-+		goto out_disable_clk;
-+	}
-+
-+	bs = spi_master_get_devdata(master);
-+	bs->pdev = pdev;
-+	bs->clk = clk;
-+	bs->regs = regs;
-+	bs->speed_hz = rate;
-+	bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0));
-+
-+	mutex_init(&bs->bus_mutex);
-+
-+	master->bus_num = HSSPI_BUS_NUM;
-+	master->num_chipselect = 8;
-+	master->setup = bcm63xx_hsspi_setup;
-+	master->transfer_one_message = bcm63xx_hsspi_transfer_one;
-+	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
-+	master->bits_per_word_mask = SPI_BPW_MASK(8);
-+	master->auto_runtime_pm = true;
-+
-+	platform_set_drvdata(pdev, master);
-+
-+	/* Initialize the hardware */
-+	__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
-+
-+	/* clean up any pending interrupts */
-+	__raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);
-+
-+	/* read out default CS polarities */
-+	reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+	bs->cs_polarity = reg & GLOBAL_CTRL_CS_POLARITY_MASK;
-+	__raw_writel(reg | GLOBAL_CTRL_CLK_GATE_SSOFF,
-+		     bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+
-+	ret = devm_request_irq(dev, irq, bcm63xx_hsspi_interrupt, IRQF_SHARED,
-+			       pdev->name, bs);
-+
-+	if (ret)
-+		goto out_put_master;
-+
-+	/* register and we are done */
-+	ret = spi_register_master(master);
-+	if (ret)
-+		goto out_put_master;
-+
-+	return 0;
-+
-+out_put_master:
-+	spi_master_put(master);
-+out_disable_clk:
-+	clk_disable_unprepare(clk);
-+out_put_clk:
-+	clk_put(clk);
-+
-+	return ret;
-+}
-+
-+
-+static int bcm63xx_hsspi_remove(struct platform_device *pdev)
-+{
-+	struct spi_master *master = platform_get_drvdata(pdev);
-+	struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
-+
-+	spi_unregister_master(master);
-+
-+	/* reset the hardware and block queue progress */
-+	__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
-+	clk_disable_unprepare(bs->clk);
-+	clk_put(bs->clk);
-+
-+	return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+static int bcm63xx_hsspi_suspend(struct device *dev)
-+{
-+	struct spi_master *master = dev_get_drvdata(dev);
-+	struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
-+
-+	spi_master_suspend(master);
-+	clk_disable(bs->clk);
-+
-+	return 0;
-+}
-+
-+static int bcm63xx_hsspi_resume(struct device *dev)
-+{
-+	struct spi_master *master = dev_get_drvdata(dev);
-+	struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
-+
-+	clk_enable(bs->clk);
-+	spi_master_resume(master);
-+
-+	return 0;
-+}
-+
-+static const struct dev_pm_ops bcm63xx_hsspi_pm_ops = {
-+	.suspend	= bcm63xx_hsspi_suspend,
-+	.resume		= bcm63xx_hsspi_resume,
-+};
-+
-+#define BCM63XX_HSSPI_PM_OPS	(&bcm63xx_hsspi_pm_ops)
-+#else
-+#define BCM63XX_HSSPI_PM_OPS	NULL
-+#endif
-+
-+
-+
-+static struct platform_driver bcm63xx_hsspi_driver = {
-+	.driver = {
-+		.name	= "bcm63xx-hsspi",
-+		.owner	= THIS_MODULE,
-+		.pm	= BCM63XX_HSSPI_PM_OPS,
-+	},
-+	.probe		= bcm63xx_hsspi_probe,
-+	.remove		= bcm63xx_hsspi_remove,
-+};
-+
-+module_platform_driver(bcm63xx_hsspi_driver);
-+
-+MODULE_ALIAS("platform:bcm63xx_hsspi");
-+MODULE_DESCRIPTION("Broadcom BCM63xx High Speed SPI Controller driver");
-+MODULE_AUTHOR("Jonas Gorski <[email protected]>");
-+MODULE_LICENSE("GPL");

target/linux/brcm63xx/patches-3.10/050-MIPS-BCM63XX-expose-the-HSSPI-clock.patch

@@ -1,50 +0,0 @@
-From f0df10fb498c21bbb201bc81dd209ea646b5a311 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 12 Nov 2011 12:19:09 +0100
-Subject: [PATCH 1/5] MIPS: BCM63XX: expose the HSSPI clock
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/clk.c | 24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -226,6 +226,28 @@ static struct clk clk_spi = {
- };
- 
- /*
-+ * HSSPI clock
-+ */
-+static void hsspi_set(struct clk *clk, int enable)
-+{
-+	u32 mask;
-+
-+	if (BCMCPU_IS_6328())
-+		mask = CKCTL_6328_HSSPI_EN;
-+	else if (BCMCPU_IS_6362())
-+		mask = CKCTL_6362_HSSPI_EN;
-+	else
-+		return;
-+
-+	bcm_hwclock_set(mask, enable);
-+}
-+
-+static struct clk clk_hsspi = {
-+	.set	= hsspi_set,
-+};
-+
-+
-+/*
-  * XTM clock
-  */
- static void xtm_set(struct clk *clk, int enable)
-@@ -334,6 +356,8 @@ struct clk *clk_get(struct device *dev,
- 		return &clk_usbd;
- 	if (!strcmp(id, "spi"))
- 		return &clk_spi;
-+	if (!strcmp(id, "hsspi"))
-+		return &clk_hsspi;
- 	if (!strcmp(id, "xtm"))
- 		return &clk_xtm;
- 	if (!strcmp(id, "periph"))

target/linux/brcm63xx/patches-3.10/051-MIPS-BCM63XX-setup-the-HSSPI-clock-rate.patch

@@ -1,36 +0,0 @@
-From c8b7d2630d907025ce30989bddd01f4f0f13c103 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Wed, 20 Nov 2013 17:22:40 +0100
-Subject: [PATCH 2/5] MIPS: BCM63XX: setup the HSSPI clock rate
-
-Properly set up the HSSPI clock rate depending on the SoC's PLL rate.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/clk.c | 18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -378,3 +378,21 @@ void clk_put(struct clk *clk)
- }
- 
- EXPORT_SYMBOL(clk_put);
-+
-+#define HSSPI_PLL_HZ_6328	133333333
-+#define HSSPI_PLL_HZ_6362	400000000
-+
-+static int __init bcm63xx_clk_init(void)
-+{
-+	switch (bcm63xx_get_cpu_id()) {
-+	case BCM6328_CPU_ID:
-+		clk_hsspi.rate = HSSPI_PLL_HZ_6328;
-+		break;
-+	case BCM6362_CPU_ID:
-+		clk_hsspi.rate = HSSPI_PLL_HZ_6362;
-+		break;
-+	}
-+
-+	return 0;
-+}
-+arch_initcall(bcm63xx_clk_init);

target/linux/brcm63xx/patches-3.10/052-MIPS-BCM63XX-add-HSSPI-IRQ-and-register-offsets.patch

@@ -1,156 +0,0 @@
-From 33a6acbe47636adcd9062a0e0af7985c0df9faa5 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 12 Nov 2011 12:19:55 +0100
-Subject: [PATCH 3/5] MIPS: BCM63XX: add HSSPI IRQ and register offsets
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -145,6 +145,7 @@ enum bcm63xx_regs_set {
- 	RSET_UART1,
- 	RSET_GPIO,
- 	RSET_SPI,
-+	RSET_HSSPI,
- 	RSET_UDC0,
- 	RSET_OHCI0,
- 	RSET_OHCI_PRIV,
-@@ -193,6 +194,7 @@ enum bcm63xx_regs_set {
- #define RSET_ENETDMAS_SIZE(chans)	(16 * (chans))
- #define RSET_ENETSW_SIZE		65536
- #define RSET_UART_SIZE			24
-+#define RSET_HSSPI_SIZE			1536
- #define RSET_UDC_SIZE			256
- #define RSET_OHCI_SIZE			256
- #define RSET_EHCI_SIZE			256
-@@ -265,6 +267,7 @@ enum bcm63xx_regs_set {
- #define BCM_6328_UART1_BASE		(0xb0000120)
- #define BCM_6328_GPIO_BASE		(0xb0000080)
- #define BCM_6328_SPI_BASE		(0xdeadbeef)
-+#define BCM_6328_HSSPI_BASE		(0xb0001000)
- #define BCM_6328_UDC0_BASE		(0xdeadbeef)
- #define BCM_6328_USBDMA_BASE		(0xb000c000)
- #define BCM_6328_OHCI0_BASE		(0xb0002600)
-@@ -313,6 +316,7 @@ enum bcm63xx_regs_set {
- #define BCM_6338_UART1_BASE		(0xdeadbeef)
- #define BCM_6338_GPIO_BASE		(0xfffe0400)
- #define BCM_6338_SPI_BASE		(0xfffe0c00)
-+#define BCM_6338_HSSPI_BASE		(0xdeadbeef)
- #define BCM_6338_UDC0_BASE		(0xdeadbeef)
- #define BCM_6338_USBDMA_BASE		(0xfffe2400)
- #define BCM_6338_OHCI0_BASE		(0xdeadbeef)
-@@ -360,6 +364,7 @@ enum bcm63xx_regs_set {
- #define BCM_6345_UART1_BASE		(0xdeadbeef)
- #define BCM_6345_GPIO_BASE		(0xfffe0400)
- #define BCM_6345_SPI_BASE		(0xdeadbeef)
-+#define BCM_6345_HSSPI_BASE		(0xdeadbeef)
- #define BCM_6345_UDC0_BASE		(0xdeadbeef)
- #define BCM_6345_USBDMA_BASE		(0xfffe2800)
- #define BCM_6345_ENET0_BASE		(0xfffe1800)
-@@ -406,6 +411,7 @@ enum bcm63xx_regs_set {
- #define BCM_6348_UART1_BASE		(0xdeadbeef)
- #define BCM_6348_GPIO_BASE		(0xfffe0400)
- #define BCM_6348_SPI_BASE		(0xfffe0c00)
-+#define BCM_6348_HSSPI_BASE		(0xdeadbeef)
- #define BCM_6348_UDC0_BASE		(0xfffe1000)
- #define BCM_6348_USBDMA_BASE		(0xdeadbeef)
- #define BCM_6348_OHCI0_BASE		(0xfffe1b00)
-@@ -451,6 +457,7 @@ enum bcm63xx_regs_set {
- #define BCM_6358_UART1_BASE		(0xfffe0120)
- #define BCM_6358_GPIO_BASE		(0xfffe0080)
- #define BCM_6358_SPI_BASE		(0xfffe0800)
-+#define BCM_6358_HSSPI_BASE		(0xdeadbeef)
- #define BCM_6358_UDC0_BASE		(0xfffe0800)
- #define BCM_6358_USBDMA_BASE		(0xdeadbeef)
- #define BCM_6358_OHCI0_BASE		(0xfffe1400)
-@@ -553,6 +560,7 @@ enum bcm63xx_regs_set {
- #define BCM_6368_UART1_BASE		(0xb0000120)
- #define BCM_6368_GPIO_BASE		(0xb0000080)
- #define BCM_6368_SPI_BASE		(0xb0000800)
-+#define BCM_6368_HSSPI_BASE		(0xdeadbeef)
- #define BCM_6368_UDC0_BASE		(0xdeadbeef)
- #define BCM_6368_USBDMA_BASE		(0xb0004800)
- #define BCM_6368_OHCI0_BASE		(0xb0001600)
-@@ -604,6 +612,7 @@ extern const unsigned long *bcm63xx_regs
- 	__GEN_RSET_BASE(__cpu, UART1)					\
- 	__GEN_RSET_BASE(__cpu, GPIO)					\
- 	__GEN_RSET_BASE(__cpu, SPI)					\
-+	__GEN_RSET_BASE(__cpu, HSSPI)					\
- 	__GEN_RSET_BASE(__cpu, UDC0)					\
- 	__GEN_RSET_BASE(__cpu, OHCI0)					\
- 	__GEN_RSET_BASE(__cpu, OHCI_PRIV)				\
-@@ -647,6 +656,7 @@ extern const unsigned long *bcm63xx_regs
- 	[RSET_UART1]		= BCM_## __cpu ##_UART1_BASE,		\
- 	[RSET_GPIO]		= BCM_## __cpu ##_GPIO_BASE,		\
- 	[RSET_SPI]		= BCM_## __cpu ##_SPI_BASE,		\
-+	[RSET_HSSPI]		= BCM_## __cpu ##_HSSPI_BASE,		\
- 	[RSET_UDC0]		= BCM_## __cpu ##_UDC0_BASE,		\
- 	[RSET_OHCI0]		= BCM_## __cpu ##_OHCI0_BASE,		\
- 	[RSET_OHCI_PRIV]	= BCM_## __cpu ##_OHCI_PRIV_BASE,	\
-@@ -727,6 +737,7 @@ enum bcm63xx_irq {
- 	IRQ_ENET0,
- 	IRQ_ENET1,
- 	IRQ_ENET_PHY,
-+	IRQ_HSSPI,
- 	IRQ_OHCI0,
- 	IRQ_EHCI0,
- 	IRQ_USBD,
-@@ -815,6 +826,7 @@ enum bcm63xx_irq {
- #define BCM_6328_ENET0_IRQ		0
- #define BCM_6328_ENET1_IRQ		0
- #define BCM_6328_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 12)
-+#define BCM_6328_HSSPI_IRQ		(IRQ_INTERNAL_BASE + 29)
- #define BCM_6328_OHCI0_IRQ		(BCM_6328_HIGH_IRQ_BASE + 9)
- #define BCM_6328_EHCI0_IRQ		(BCM_6328_HIGH_IRQ_BASE + 10)
- #define BCM_6328_USBD_IRQ		(IRQ_INTERNAL_BASE + 4)
-@@ -860,6 +872,7 @@ enum bcm63xx_irq {
- #define BCM_6338_ENET0_IRQ		(IRQ_INTERNAL_BASE + 8)
- #define BCM_6338_ENET1_IRQ		0
- #define BCM_6338_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 9)
-+#define BCM_6338_HSSPI_IRQ		0
- #define BCM_6338_OHCI0_IRQ		0
- #define BCM_6338_EHCI0_IRQ		0
- #define BCM_6338_USBD_IRQ		0
-@@ -898,6 +911,7 @@ enum bcm63xx_irq {
- #define BCM_6345_ENET0_IRQ		(IRQ_INTERNAL_BASE + 8)
- #define BCM_6345_ENET1_IRQ		0
- #define BCM_6345_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 12)
-+#define BCM_6345_HSSPI_IRQ		0
- #define BCM_6345_OHCI0_IRQ		0
- #define BCM_6345_EHCI0_IRQ		0
- #define BCM_6345_USBD_IRQ		0
-@@ -936,6 +950,7 @@ enum bcm63xx_irq {
- #define BCM_6348_ENET0_IRQ		(IRQ_INTERNAL_BASE + 8)
- #define BCM_6348_ENET1_IRQ		(IRQ_INTERNAL_BASE + 7)
- #define BCM_6348_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 9)
-+#define BCM_6348_HSSPI_IRQ		0
- #define BCM_6348_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 12)
- #define BCM_6348_EHCI0_IRQ		0
- #define BCM_6348_USBD_IRQ		0
-@@ -974,6 +989,7 @@ enum bcm63xx_irq {
- #define BCM_6358_ENET0_IRQ		(IRQ_INTERNAL_BASE + 8)
- #define BCM_6358_ENET1_IRQ		(IRQ_INTERNAL_BASE + 6)
- #define BCM_6358_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 9)
-+#define BCM_6358_HSSPI_IRQ		0
- #define BCM_6358_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 5)
- #define BCM_6358_EHCI0_IRQ		(IRQ_INTERNAL_BASE + 10)
- #define BCM_6358_USBD_IRQ		0
-@@ -1086,6 +1102,7 @@ enum bcm63xx_irq {
- #define BCM_6368_ENET0_IRQ		0
- #define BCM_6368_ENET1_IRQ		0
- #define BCM_6368_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 15)
-+#define BCM_6368_HSSPI_IRQ		0
- #define BCM_6368_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 5)
- #define BCM_6368_EHCI0_IRQ		(IRQ_INTERNAL_BASE + 7)
- #define BCM_6368_USBD_IRQ		(IRQ_INTERNAL_BASE + 8)
-@@ -1133,6 +1150,7 @@ extern const int *bcm63xx_irqs;
- 	[IRQ_ENET0]		= BCM_## __cpu ##_ENET0_IRQ,		\
- 	[IRQ_ENET1]		= BCM_## __cpu ##_ENET1_IRQ,		\
- 	[IRQ_ENET_PHY]		= BCM_## __cpu ##_ENET_PHY_IRQ,		\
-+	[IRQ_HSSPI]		= BCM_## __cpu ##_HSSPI_IRQ,		\
- 	[IRQ_OHCI0]		= BCM_## __cpu ##_OHCI0_IRQ,		\
- 	[IRQ_EHCI0]		= BCM_## __cpu ##_EHCI0_IRQ,		\
- 	[IRQ_USBD]		= BCM_## __cpu ##_USBD_IRQ,		\

target/linux/brcm63xx/patches-3.10/053-MIPS-BCM63XX-add-HSSPI-platform-device-and-register-.patch

@@ -1,107 +0,0 @@
-From ad04c99347cf9e583457f7258e97f0be22fad2ec Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 12 Nov 2011 12:18:26 +0100
-Subject: [PATCH 4/5] MIPS: BCM63XX: add HSSPI platform device and register it
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/Makefile                         |  4 +-
- arch/mips/bcm63xx/boards/board_bcm963xx.c          |  3 ++
- arch/mips/bcm63xx/dev-hsspi.c                      | 47 ++++++++++++++++++++++
- .../include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h   |  8 ++++
- 4 files changed, 60 insertions(+), 2 deletions(-)
- create mode 100644 arch/mips/bcm63xx/dev-hsspi.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,7 +1,7 @@
- obj-y		+= clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
--		   dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \
--		   dev-usb-usbd.o
-+		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
-+		   dev-wdt.o dev-usb-usbd.o
- obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
- 
- obj-y		+= boards/
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -23,6 +23,7 @@
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_dsp.h>
- #include <bcm63xx_dev_flash.h>
-+#include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_dev_pcmcia.h>
- #include <bcm63xx_dev_spi.h>
- #include <bcm63xx_dev_usb_usbd.h>
-@@ -915,6 +916,8 @@ int __init board_register_devices(void)
- 
- 	bcm63xx_spi_register();
- 
-+	bcm63xx_hsspi_register();
-+
- 	bcm63xx_flash_register();
- 
- 	bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-hsspi.c
-@@ -0,0 +1,47 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_dev_hsspi.h>
-+#include <bcm63xx_regs.h>
-+
-+static struct resource spi_resources[] = {
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.end		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_MEM,
-+	},
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static struct platform_device bcm63xx_hsspi_device = {
-+	.name		= "bcm63xx-hsspi",
-+	.id		= 0,
-+	.num_resources	= ARRAY_SIZE(spi_resources),
-+	.resource	= spi_resources,
-+};
-+
-+int __init bcm63xx_hsspi_register(void)
-+{
-+	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362())
-+		return -ENODEV;
-+
-+	spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
-+	spi_resources[0].end = spi_resources[0].start;
-+	spi_resources[0].end += RSET_HSSPI_SIZE - 1;
-+	spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI);
-+
-+	return platform_device_register(&bcm63xx_hsspi_device);
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
-@@ -0,0 +1,8 @@
-+#ifndef BCM63XX_DEV_HSSPI_H
-+#define BCM63XX_DEV_HSSPI_H
-+
-+#include <linux/types.h>
-+
-+int bcm63xx_hsspi_register(void);
-+
-+#endif /* BCM63XX_DEV_HSSPI_H */

target/linux/brcm63xx/patches-3.10/055-spi-bcm63xx-don-t-reject-reads-256-bytes.patch

@@ -1,31 +0,0 @@
-From 4d8fa9d3d1fe1d70fe7d59537acf49797f6010a1 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 1 Dec 2013 16:19:46 +0100
-Subject: [PATCH 2/2] spi/bcm63xx: don't reject reads >= 256 bytes
-
-The rx_tail register is only 8 bit wide, so it will wrap around
-after 256 read bytes. This makes it rather meaningless, so drop any
-usage of it to not treat reads over 256 as failed.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- drivers/spi/spi-bcm63xx.c | 8 +-------
- 1 file changed, 1 insertion(+), 7 deletions(-)
-
---- a/drivers/spi/spi-bcm63xx.c
-+++ b/drivers/spi/spi-bcm63xx.c
-@@ -214,13 +214,7 @@ static int bcm63xx_txrx_bufs(struct spi_
- 	if (!timeout)
- 		return -ETIMEDOUT;
- 
--	/* read out all data */
--	rx_tail = bcm_spi_readb(bs, SPI_RX_TAIL);
--
--	if (do_rx && rx_tail != len)
--		return -EIO;
--
--	if (!rx_tail)
-+	if (!do_rx)
- 		return 0;
- 
- 	len = 0;

target/linux/brcm63xx/patches-3.10/056-MIPS-BMIPS-Fix-thinko-to-release-slave-TP-from-reset.patch

@@ -1,37 +0,0 @@
-From 976f39b139cdd06a88a5aadd8202b0c30cac9cda Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Wed, 17 Jul 2013 17:56:31 +0000
-Subject: [PATCH] MIPS: BMIPS: Fix thinko to release slave TP from reset
-
-Commit 4df715aa ["MIPS: BMIPS: support booting from physical CPU other
-than 0"] introduced a thinko which will prevents slave CPUs from being
-released from reset on systems where we boot from TP0. The problem is
-that we are checking whether the slave CPU logical CPU map is 0, which
-is never true for systems booting from TP0, so we do not release the
-slave TP from reset and we are just stuck. Fix this by properly checking
-that the CPU we intend to boot really is the physical slave CPU (logical
-and physical value being 1).
-
-Signed-off-by: Florian Fainelli <[email protected]>
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Cc: Florian Fainelli <[email protected]>
-Patchwork: https://patchwork.linux-mips.org/patch/5598/
-Signed-off-by: Ralf Baechle <[email protected]>
----
- arch/mips/kernel/smp-bmips.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/mips/kernel/smp-bmips.c
-+++ b/arch/mips/kernel/smp-bmips.c
-@@ -173,7 +173,7 @@ static void bmips_boot_secondary(int cpu
- 	else {
- #if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
- 		/* Reset slave TP1 if booting from TP0 */
--		if (cpu_logical_map(cpu) == 0)
-+		if (cpu_logical_map(cpu) == 1)
- 			set_c0_brcm_cmt_ctrl(0x01);
- #elif defined(CONFIG_CPU_BMIPS5000)
- 		if (cpu & 0x01)

target/linux/brcm63xx/patches-3.10/057-MIPS-BMIPS-do-not-change-interrupt-routing-depending.patch

@@ -1,41 +0,0 @@
-From c4091d3fbbed922a3641e5e749655e49cc0d4dee Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Wed, 24 Jul 2013 17:12:10 +0100
-Subject: [PATCH] MIPS: BMIPS: do not change interrupt routing depending on
- boot CPU
-
-Commit 4df715aa ("MIPS: BMIPS: support booting from physical CPU other
-than 0") changed the interupt routing when we are booting from physical
-CPU 0, but the settings are actually correct if we are booting from
-physical CPU 0 or CPU 1. Revert that specific change.
-
-Signed-off-by: Florian Fainelli <[email protected]>
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Patchwork: https://patchwork.linux-mips.org/patch/5622/
-Signed-off-by: Ralf Baechle <[email protected]>
----
- arch/mips/kernel/smp-bmips.c | 8 +-------
- 1 file changed, 1 insertion(+), 7 deletions(-)
-
---- a/arch/mips/kernel/smp-bmips.c
-+++ b/arch/mips/kernel/smp-bmips.c
-@@ -79,15 +79,9 @@ static void __init bmips_smp_setup(void)
- 	 * MIPS interrupts 0,1 (SW INT 0,1) cross over to the other thread
- 	 * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output
- 	 * MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output
--	 *
--	 * If booting from TP1, leave the existing CMT interrupt routing
--	 * such that TP0 responds to SW1 and TP1 responds to SW0.
- 	 */
--	if (boot_cpu == 0)
--		change_c0_brcm_cmt_intr(0xf8018000,
-+	change_c0_brcm_cmt_intr(0xf8018000,
- 					(0x02 << 27) | (0x03 << 15));
--	else
--		change_c0_brcm_cmt_intr(0xf8018000, (0x1d << 27));
- 
- 	/* single core, 2 threads (2 pipelines) */
- 	max_cpus = 2;

target/linux/brcm63xx/patches-3.10/058-MIPS-BMIPS-fix-slave-CPU-booting-when-physical-CPU-i.patch

@@ -1,58 +0,0 @@
-From ff5fadaff39180dc0b652753b5614a564711be29 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Wed, 24 Jul 2013 17:12:11 +0100
-Subject: [PATCH] MIPS: BMIPS: fix slave CPU booting when physical CPU is not 0
-
-The current BMIPS SMP code assumes that the slave CPU is physical and
-logical CPU 1, but on some systems such as BCM3368, the slave CPU is
-physical CPU0. Fix the code to read the physical CPU (thread ID) we are
-running this code on, and adjust the relocation vector address based on
-it. This allows bringing up the second CPU on BCM3368 for instance.
-
-Signed-off-by: Florian Fainelli <[email protected]>
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Patchwork: https://patchwork.linux-mips.org/patch/5621/
-Signed-off-by: Ralf Baechle <[email protected]>
----
- arch/mips/kernel/bmips_vec.S |  6 +++++-
- arch/mips/kernel/smp-bmips.c | 10 ++++++++--
- 2 files changed, 13 insertions(+), 3 deletions(-)
-
---- a/arch/mips/kernel/bmips_vec.S
-+++ b/arch/mips/kernel/bmips_vec.S
-@@ -56,7 +56,11 @@ LEAF(bmips_smp_movevec)
- 	/* set up CPU1 CBR; move BASE to 0xa000_0000 */
- 	li	k0, 0xff400000
- 	mtc0	k0, $22, 6
--	li	k1, CKSEG1 | BMIPS_RELO_VECTOR_CONTROL_1
-+	/* set up relocation vector address based on thread ID */
-+	mfc0	k1, $22, 3
-+	srl	k1, 16
-+	andi	k1, 0x8000
-+	or	k1, CKSEG1 | BMIPS_RELO_VECTOR_CONTROL_0
- 	or	k0, k1
- 	li	k1, 0xa0080000
- 	sw	k1, 0(k0)
---- a/arch/mips/kernel/smp-bmips.c
-+++ b/arch/mips/kernel/smp-bmips.c
-@@ -196,9 +196,15 @@ static void bmips_init_secondary(void)
- #if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
- 	void __iomem *cbr = BMIPS_GET_CBR();
- 	unsigned long old_vec;
-+	unsigned long relo_vector;
-+	int boot_cpu;
- 
--	old_vec = __raw_readl(cbr + BMIPS_RELO_VECTOR_CONTROL_1);
--	__raw_writel(old_vec & ~0x20000000, cbr + BMIPS_RELO_VECTOR_CONTROL_1);
-+	boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
-+	relo_vector = boot_cpu ? BMIPS_RELO_VECTOR_CONTROL_0 :
-+			  BMIPS_RELO_VECTOR_CONTROL_1;
-+
-+	old_vec = __raw_readl(cbr + relo_vector);
-+	__raw_writel(old_vec & ~0x20000000, cbr + relo_vector);
- 
- 	clear_c0_cause(smp_processor_id() ? C_SW1 : C_SW0);
- #elif defined(CONFIG_CPU_BMIPS5000)

target/linux/brcm63xx/patches-3.10/059-MIPS-BMIPS-fix-hardware-interrupt-routing-for-boot-C.patch

@@ -1,48 +0,0 @@
-From fcfa66de8a2f0631a65a2cec0f6149dafd36ec81 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Mon, 5 Aug 2013 11:50:25 +0100
-Subject: [PATCH] MIPS: BMIPS: fix hardware interrupt routing for boot CPU != 0
-
-The hardware interrupt routing for boot CPU != 0 is wrong because it
-will route all the hardware interrupts to TP0 which is not the one we
-booted from. Fix this by properly checking which boot CPU we are booting
-from and updating the right interrupt mask for the boot CPU. This fixes
-booting on BCM3368 with bmips_smp_emabled = 0.
-
-Signed-off-by: Florian Fainelli <[email protected]>
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Cc: [email protected]
-Patchwork: https://patchwork.linux-mips.org/patch/5650/
-Signed-off-by: Ralf Baechle <[email protected]>
----
- arch/mips/kernel/smp-bmips.c | 10 ++++++++--
- 1 file changed, 8 insertions(+), 2 deletions(-)
-
---- a/arch/mips/kernel/smp-bmips.c
-+++ b/arch/mips/kernel/smp-bmips.c
-@@ -66,6 +66,8 @@ static void __init bmips_smp_setup(void)
- 	int i, cpu = 1, boot_cpu = 0;
- 
- #if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
-+	int cpu_hw_intr;
-+
- 	/* arbitration priority */
- 	clear_c0_brcm_cmt_ctrl(0x30);
- 
-@@ -80,8 +82,12 @@ static void __init bmips_smp_setup(void)
- 	 * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output
- 	 * MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output
- 	 */
--	change_c0_brcm_cmt_intr(0xf8018000,
--					(0x02 << 27) | (0x03 << 15));
-+	if (boot_cpu == 0)
-+		cpu_hw_intr = 0x02;
-+	else
-+		cpu_hw_intr = 0x1d;
-+
-+	change_c0_brcm_cmt_intr(0xf8018000, (cpu_hw_intr << 27) | (0x03 << 15));
- 
- 	/* single core, 2 threads (2 pipelines) */
- 	max_cpus = 2;

target/linux/brcm63xx/patches-3.10/060-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch

@@ -1,36 +0,0 @@
-From 8bd8f46cbc709974b26396aa440133db4484015e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Fri, 28 Jun 2013 00:25:13 +0200
-Subject: [PATCH V2 01/13] MIPS: BCM63XX: disable SMP also on BCM3368
-
-BCM3368 has the same shared TLB as BCM6358.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/prom.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -64,9 +64,9 @@ void __init prom_init(void)
- 		register_smp_ops(&bmips_smp_ops);
- 
- 		/*
--		 * BCM6328 might not have its second CPU enabled, while BCM6358
--		 * needs special handling for its shared TLB, so disable SMP
--		 * for now.
-+		 * BCM6328 might not have its second CPU enabled, while BCM3368
-+		 * and BCM6358 need special handling for their shared TLB, so
-+		 * disable SMP for now.
- 		 */
- 		if (BCMCPU_IS_6328()) {
- 			reg = bcm_readl(BCM_6328_OTP_BASE +
-@@ -74,7 +74,7 @@ void __init prom_init(void)
- 
- 			if (reg & OTP_6328_REG3_TP1_DISABLED)
- 				bmips_smp_enabled = 0;
--		} else if (BCMCPU_IS_6358()) {
-+		} else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
- 			bmips_smp_enabled = 0;
- 		}
- 

target/linux/brcm63xx/patches-3.10/061-MIPS-allow-asm-cpu.h-to-be-included-from-assembly.patch

@@ -1,31 +0,0 @@
-From 72a1c3ad0392d7b42bf50e6ecade63a775166c73 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Thu, 27 Jun 2013 21:32:41 +0200
-Subject: [PATCH V2 02/13] MIPS: allow asm/cpu.h to be included from assembly
-
-Add guards around the enum to allow including cpu.h from assembly.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/include/asm/cpu.h | 3 +++
- 1 file changed, 3 insertions(+)
-
---- a/arch/mips/include/asm/cpu.h
-+++ b/arch/mips/include/asm/cpu.h
-@@ -225,6 +225,8 @@
- 
- #define FPIR_IMP_NONE		0x0000
- 
-+#if !defined(__ASSEMBLY__)
-+
- enum cpu_type_enum {
- 	CPU_UNKNOWN,
- 
-@@ -277,6 +279,7 @@ enum cpu_type_enum {
- 	CPU_LAST
- };
- 
-+#endif /* !__ASSEMBLY */
- 
- /*
-  * ISA Level encodings

target/linux/brcm63xx/patches-3.10/062-MIPS-BMIPS-change-compile-time-checks-to-runtime-che.patch

@@ -1,602 +0,0 @@
-From 7d790bd6cab314462a29ba194e243b8b1d529524 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Thu, 27 Jun 2013 21:33:56 +0200
-Subject: [PATCH V2 03/13] MIPS: BMIPS: change compile time checks to runtime
- checks
-
-Allow building for all bmips cpus at the same time by changing ifdefs
-to checks for the cpu type, or adding appropriate checks to the
-assembly.
-
-Since BMIPS43XX and BMIPS5000 require different IPI implementations,
-split the SMP ops into one for each, so the runtime overhead is only
-at registration time for them.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
-V1 -> V2:
-  * use switch (cpu_type()) instead of if () else if () ...
-  * split the smp ops into bmips43xx and bmips5000
-
- arch/mips/bcm63xx/prom.c      |   2 +-
- arch/mips/include/asm/bmips.h |   3 +-
- arch/mips/kernel/bmips_vec.S  |  55 ++++++--
- arch/mips/kernel/smp-bmips.c  | 312 +++++++++++++++++++++++++-----------------
- 4 files changed, 235 insertions(+), 137 deletions(-)
-
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -61,7 +61,7 @@ void __init prom_init(void)
- 
- 	if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) {
- 		/* set up SMP */
--		register_smp_ops(&bmips_smp_ops);
-+		register_smp_ops(&bmips43xx_smp_ops);
- 
- 		/*
- 		 * BCM6328 might not have its second CPU enabled, while BCM3368
---- a/arch/mips/include/asm/bmips.h
-+++ b/arch/mips/include/asm/bmips.h
-@@ -47,7 +47,8 @@
- #include <linux/cpumask.h>
- #include <asm/r4kcache.h>
- 
--extern struct plat_smp_ops bmips_smp_ops;
-+extern struct plat_smp_ops bmips43xx_smp_ops;
-+extern struct plat_smp_ops bmips5000_smp_ops;
- extern char bmips_reset_nmi_vec;
- extern char bmips_reset_nmi_vec_end;
- extern char bmips_smp_movevec;
---- a/arch/mips/kernel/bmips_vec.S
-+++ b/arch/mips/kernel/bmips_vec.S
-@@ -13,6 +13,7 @@
- #include <asm/asm.h>
- #include <asm/asmmacro.h>
- #include <asm/cacheops.h>
-+#include <asm/cpu.h>
- #include <asm/regdef.h>
- #include <asm/mipsregs.h>
- #include <asm/stackframe.h>
-@@ -93,12 +94,18 @@ NESTED(bmips_reset_nmi_vec, PT_SIZE, sp)
- 	beqz	k0, bmips_smp_entry
- 
- #if defined(CONFIG_CPU_BMIPS5000)
-+	mfc0	k0, CP0_PRID
-+	li	k1, PRID_IMP_BMIPS5000
-+	andi	k0, 0xff00
-+	bne	k0, k1, 1f
-+
- 	/* if we're not on core 0, this must be the SMP boot signal */
- 	li	k1, (3 << 25)
- 	mfc0	k0, $22
- 	and	k0, k1
- 	bnez	k0, bmips_smp_entry
--#endif
-+1:
-+#endif /* CONFIG_CPU_BMIPS5000 */
- #endif /* CONFIG_SMP */
- 
- 	/* nope, it's just a regular NMI */
-@@ -141,7 +148,12 @@ bmips_smp_entry:
- 	xori	k0, 0x04
- 	mtc0	k0, CP0_CONFIG
- 
-+	mfc0	k0, CP0_PRID
-+	andi	k0, 0xff00
- #if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
-+	li	k1, PRID_IMP_BMIPS43XX
-+	bne	k0, k1, 2f
-+
- 	/* initialize CPU1's local I-cache */
- 	li	k0, 0x80000000
- 	li	k1, 0x80010000
-@@ -152,14 +164,21 @@ bmips_smp_entry:
- 1:	cache	Index_Store_Tag_I, 0(k0)
- 	addiu	k0, 16
- 	bne	k0, k1, 1b
--#elif defined(CONFIG_CPU_BMIPS5000)
-+
-+	b	3f
-+2:
-+#endif /* CONFIG_CPU_BMIPS4350 || CONFIG_CPU_BMIPS4380 */
-+#if defined(CONFIG_CPU_BMIPS5000)
- 	/* set exception vector base */
-+	li	k1, PRID_IMP_BMIPS5000
-+	bne	k0, k1, 3f
-+
- 	la	k0, ebase
- 	lw	k0, 0(k0)
- 	mtc0	k0, $15, 1
- 	BARRIER
--#endif
--
-+#endif /* CONFIG_CPU_BMIPS5000 */
-+3:
- 	/* jump back to kseg0 in case we need to remap the kseg1 area */
- 	la	k0, 1f
- 	jr	k0
-@@ -225,8 +244,18 @@ END(bmips_smp_int_vec)
- LEAF(bmips_enable_xks01)
- 
- #if defined(CONFIG_XKS01)
--
-+	mfc0	t0, CP0_PRID
-+	andi	t2, t0, 0xff00
- #if defined(CONFIG_CPU_BMIPS4380)
-+	li	t1, PRID_IMP_BMIPS43XX
-+	bne	t2, t1, 1f
-+
-+	andi	t0, 0xff
-+	addiu	t1, t0, -PRID_REV_BMIPS4380_HI
-+	bgtz	t1, 2f
-+	addiu	t0, -PRID_REV_BMIPS4380_LO
-+	bltz	t0, 2f
-+
- 	mfc0	t0, $22, 3
- 	li	t1, 0x1ff0
- 	li	t2, (1 << 12) | (1 << 9)
-@@ -235,7 +264,13 @@ LEAF(bmips_enable_xks01)
- 	or	t0, t2
- 	mtc0	t0, $22, 3
- 	BARRIER
--#elif defined(CONFIG_CPU_BMIPS5000)
-+	b	2f
-+1:
-+#endif /* CONFIG_CPU_BMIPS4380 */
-+#if defined(CONFIG_CPU_BMIPS5000)
-+	li	t1, PRID_IMP_BMIPS5000
-+	bne	t2, t1, 2f
-+
- 	mfc0	t0, $22, 5
- 	li	t1, 0x01ff
- 	li	t2, (1 << 8) | (1 << 5)
-@@ -244,12 +279,8 @@ LEAF(bmips_enable_xks01)
- 	or	t0, t2
- 	mtc0	t0, $22, 5
- 	BARRIER
--#else
--
--#error Missing XKS01 setup
--
--#endif
--
-+#endif /* CONFIG_CPU_BMIPS5000 */
-+2:
- #endif /* defined(CONFIG_XKS01) */
- 
- 	jr	ra
---- a/arch/mips/kernel/smp-bmips.c
-+++ b/arch/mips/kernel/smp-bmips.c
-@@ -49,8 +49,10 @@ cpumask_t bmips_booted_mask;
- unsigned long bmips_smp_boot_sp;
- unsigned long bmips_smp_boot_gp;
- 
--static void bmips_send_ipi_single(int cpu, unsigned int action);
--static irqreturn_t bmips_ipi_interrupt(int irq, void *dev_id);
-+static void bmips43xx_send_ipi_single(int cpu, unsigned int action);
-+static void bmips5000_send_ipi_single(int cpu, unsigned int action);
-+static irqreturn_t bmips43xx_ipi_interrupt(int irq, void *dev_id);
-+static irqreturn_t bmips5000_ipi_interrupt(int irq, void *dev_id);
- 
- /* SW interrupts 0,1 are used for interprocessor signaling */
- #define IPI0_IRQ			(MIPS_CPU_IRQ_BASE + 0)
-@@ -64,49 +66,58 @@ static irqreturn_t bmips_ipi_interrupt(i
- static void __init bmips_smp_setup(void)
- {
- 	int i, cpu = 1, boot_cpu = 0;
--
--#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
- 	int cpu_hw_intr;
- 
--	/* arbitration priority */
--	clear_c0_brcm_cmt_ctrl(0x30);
--
--	/* NBK and weak order flags */
--	set_c0_brcm_config_0(0x30000);
--
--	/* Find out if we are running on TP0 or TP1 */
--	boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
--
--	/*
--	 * MIPS interrupts 0,1 (SW INT 0,1) cross over to the other thread
--	 * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output
--	 * MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output
--	 */
--	if (boot_cpu == 0)
--		cpu_hw_intr = 0x02;
--	else
--		cpu_hw_intr = 0x1d;
--
--	change_c0_brcm_cmt_intr(0xf8018000, (cpu_hw_intr << 27) | (0x03 << 15));
--
--	/* single core, 2 threads (2 pipelines) */
--	max_cpus = 2;
--#elif defined(CONFIG_CPU_BMIPS5000)
--	/* enable raceless SW interrupts */
--	set_c0_brcm_config(0x03 << 22);
--
--	/* route HW interrupt 0 to CPU0, HW interrupt 1 to CPU1 */
--	change_c0_brcm_mode(0x1f << 27, 0x02 << 27);
--
--	/* N cores, 2 threads per core */
--	max_cpus = (((read_c0_brcm_config() >> 6) & 0x03) + 1) << 1;
-+	switch (current_cpu_type()) {
-+	case CPU_BMIPS4350:
-+	case CPU_BMIPS4380:
-+		/* arbitration priority */
-+		clear_c0_brcm_cmt_ctrl(0x30);
-+
-+		/* NBK and weak order flags */
-+		set_c0_brcm_config_0(0x30000);
-+
-+		/* Find out if we are running on TP0 or TP1 */
-+		boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
-+
-+		/*
-+		 * MIPS interrupts 0,1 (SW INT 0,1) cross over to the other
-+		 * thread
-+		 * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output
-+		 * MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output
-+		 */
-+		if (boot_cpu == 0)
-+			cpu_hw_intr = 0x02;
-+		else
-+			cpu_hw_intr = 0x1d;
-+
-+		change_c0_brcm_cmt_intr(0xf8018000,
-+					(cpu_hw_intr << 27) | (0x03 << 15));
-+
-+		/* single core, 2 threads (2 pipelines) */
-+		max_cpus = 2;
-+
-+		break;
-+	case CPU_BMIPS5000:
-+		/* enable raceless SW interrupts */
-+		set_c0_brcm_config(0x03 << 22);
-+
-+		/* route HW interrupt 0 to CPU0, HW interrupt 1 to CPU1 */
-+		change_c0_brcm_mode(0x1f << 27, 0x02 << 27);
-+
-+		/* N cores, 2 threads per core */
-+		max_cpus = (((read_c0_brcm_config() >> 6) & 0x03) + 1) << 1;
-+
-+		/* clear any pending SW interrupts */
-+		for (i = 0; i < max_cpus; i++) {
-+			write_c0_brcm_action(ACTION_CLR_IPI(i, 0));
-+			write_c0_brcm_action(ACTION_CLR_IPI(i, 1));
-+		}
- 
--	/* clear any pending SW interrupts */
--	for (i = 0; i < max_cpus; i++) {
--		write_c0_brcm_action(ACTION_CLR_IPI(i, 0));
--		write_c0_brcm_action(ACTION_CLR_IPI(i, 1));
-+		break;
-+	default:
-+		max_cpus = 1;
- 	}
--#endif
- 
- 	if (!bmips_smp_enabled)
- 		max_cpus = 1;
-@@ -134,6 +145,20 @@ static void __init bmips_smp_setup(void)
-  */
- static void bmips_prepare_cpus(unsigned int max_cpus)
- {
-+	irqreturn_t (*bmips_ipi_interrupt)(int irq, void *dev_id);
-+
-+	switch (current_cpu_type()) {
-+	case CPU_BMIPS4350:
-+	case CPU_BMIPS4380:
-+		bmips_ipi_interrupt = bmips43xx_ipi_interrupt;
-+		break;
-+	case CPU_BMIPS5000:
-+		bmips_ipi_interrupt = bmips5000_ipi_interrupt;
-+		break;
-+	default:
-+		return;
-+	}
-+
- 	if (request_irq(IPI0_IRQ, bmips_ipi_interrupt, IRQF_PERCPU,
- 			"smp_ipi0", NULL))
- 		panic("Can't request IPI0 interrupt\n");
-@@ -168,26 +193,39 @@ static void bmips_boot_secondary(int cpu
- 
- 	pr_info("SMP: Booting CPU%d...\n", cpu);
- 
--	if (cpumask_test_cpu(cpu, &bmips_booted_mask))
--		bmips_send_ipi_single(cpu, 0);
-+	if (cpumask_test_cpu(cpu, &bmips_booted_mask)) {
-+		switch (current_cpu_type()) {
-+		case CPU_BMIPS4350:
-+		case CPU_BMIPS4380:
-+			bmips43xx_send_ipi_single(cpu, 0);
-+			break;
-+		case CPU_BMIPS5000:
-+			bmips5000_send_ipi_single(cpu, 0);
-+			break;
-+		}
-+	}
- 	else {
--#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
--		/* Reset slave TP1 if booting from TP0 */
--		if (cpu_logical_map(cpu) == 1)
--			set_c0_brcm_cmt_ctrl(0x01);
--#elif defined(CONFIG_CPU_BMIPS5000)
--		if (cpu & 0x01)
--			write_c0_brcm_action(ACTION_BOOT_THREAD(cpu));
--		else {
--			/*
--			 * core N thread 0 was already booted; just
--			 * pulse the NMI line
--			 */
--			bmips_write_zscm_reg(0x210, 0xc0000000);
--			udelay(10);
--			bmips_write_zscm_reg(0x210, 0x00);
-+		switch (current_cpu_type()) {
-+		case CPU_BMIPS4350:
-+		case CPU_BMIPS4380:
-+			/* Reset slave TP1 if booting from TP0 */
-+			if (cpu_logical_map(cpu) == 1)
-+				set_c0_brcm_cmt_ctrl(0x01);
-+			break;
-+		case CPU_BMIPS5000:
-+			if (cpu & 0x01)
-+				write_c0_brcm_action(ACTION_BOOT_THREAD(cpu));
-+			else {
-+				/*
-+				 * core N thread 0 was already booted; just
-+				 * pulse the NMI line
-+				 */
-+				bmips_write_zscm_reg(0x210, 0xc0000000);
-+				udelay(10);
-+				bmips_write_zscm_reg(0x210, 0x00);
-+			}
-+			break;
- 		}
--#endif
- 		cpumask_set_cpu(cpu, &bmips_booted_mask);
- 	}
- }
-@@ -199,26 +237,32 @@ static void bmips_init_secondary(void)
- {
- 	/* move NMI vector to kseg0, in case XKS01 is enabled */
- 
--#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
--	void __iomem *cbr = BMIPS_GET_CBR();
-+	void __iomem *cbr;
- 	unsigned long old_vec;
- 	unsigned long relo_vector;
- 	int boot_cpu;
- 
--	boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
--	relo_vector = boot_cpu ? BMIPS_RELO_VECTOR_CONTROL_0 :
--			  BMIPS_RELO_VECTOR_CONTROL_1;
--
--	old_vec = __raw_readl(cbr + relo_vector);
--	__raw_writel(old_vec & ~0x20000000, cbr + relo_vector);
--
--	clear_c0_cause(smp_processor_id() ? C_SW1 : C_SW0);
--#elif defined(CONFIG_CPU_BMIPS5000)
--	write_c0_brcm_bootvec(read_c0_brcm_bootvec() &
--		(smp_processor_id() & 0x01 ? ~0x20000000 : ~0x2000));
-+	switch (current_cpu_type()) {
-+	case CPU_BMIPS4350:
-+	case CPU_BMIPS4380:
-+		cbr = BMIPS_GET_CBR();
-+
-+		boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
-+		relo_vector = boot_cpu ? BMIPS_RELO_VECTOR_CONTROL_0 :
-+				  BMIPS_RELO_VECTOR_CONTROL_1;
-+
-+		old_vec = __raw_readl(cbr + relo_vector);
-+		__raw_writel(old_vec & ~0x20000000, cbr + relo_vector);
-+
-+		clear_c0_cause(smp_processor_id() ? C_SW1 : C_SW0);
-+		break;
-+	case CPU_BMIPS5000:
-+		write_c0_brcm_bootvec(read_c0_brcm_bootvec() &
-+			(smp_processor_id() & 0x01 ? ~0x20000000 : ~0x2000));
- 
--	write_c0_brcm_action(ACTION_CLR_IPI(smp_processor_id(), 0));
--#endif
-+		write_c0_brcm_action(ACTION_CLR_IPI(smp_processor_id(), 0));
-+		break;
-+	}
- }
- 
- /*
-@@ -243,8 +287,6 @@ static void bmips_cpus_done(void)
- {
- }
- 
--#if defined(CONFIG_CPU_BMIPS5000)
--
- /*
-  * BMIPS5000 raceless IPIs
-  *
-@@ -253,12 +295,12 @@ static void bmips_cpus_done(void)
-  * IPI1 is used for SMP_CALL_FUNCTION
-  */
- 
--static void bmips_send_ipi_single(int cpu, unsigned int action)
-+static void bmips5000_send_ipi_single(int cpu, unsigned int action)
- {
- 	write_c0_brcm_action(ACTION_SET_IPI(cpu, action == SMP_CALL_FUNCTION));
- }
- 
--static irqreturn_t bmips_ipi_interrupt(int irq, void *dev_id)
-+static irqreturn_t bmips5000_ipi_interrupt(int irq, void *dev_id)
- {
- 	int action = irq - IPI0_IRQ;
- 
-@@ -272,7 +314,14 @@ static irqreturn_t bmips_ipi_interrupt(i
- 	return IRQ_HANDLED;
- }
- 
--#else
-+static void bmips5000_send_ipi_mask(const struct cpumask *mask,
-+	unsigned int action)
-+{
-+	unsigned int i;
-+
-+	for_each_cpu(i, mask)
-+		bmips5000_send_ipi_single(i, action);
-+}
- 
- /*
-  * BMIPS43xx racey IPIs
-@@ -287,7 +336,7 @@ static irqreturn_t bmips_ipi_interrupt(i
- static DEFINE_SPINLOCK(ipi_lock);
- static DEFINE_PER_CPU(int, ipi_action_mask);
- 
--static void bmips_send_ipi_single(int cpu, unsigned int action)
-+static void bmips43xx_send_ipi_single(int cpu, unsigned int action)
- {
- 	unsigned long flags;
- 
-@@ -298,7 +347,7 @@ static void bmips_send_ipi_single(int cp
- 	spin_unlock_irqrestore(&ipi_lock, flags);
- }
- 
--static irqreturn_t bmips_ipi_interrupt(int irq, void *dev_id)
-+static irqreturn_t bmips43xx_ipi_interrupt(int irq, void *dev_id)
- {
- 	unsigned long flags;
- 	int action, cpu = irq - IPI0_IRQ;
-@@ -317,15 +366,13 @@ static irqreturn_t bmips_ipi_interrupt(i
- 	return IRQ_HANDLED;
- }
- 
--#endif /* BMIPS type */
--
--static void bmips_send_ipi_mask(const struct cpumask *mask,
-+static void bmips43xx_send_ipi_mask(const struct cpumask *mask,
- 	unsigned int action)
- {
- 	unsigned int i;
- 
- 	for_each_cpu(i, mask)
--		bmips_send_ipi_single(i, action);
-+		bmips43xx_send_ipi_single(i, action);
- }
- 
- #ifdef CONFIG_HOTPLUG_CPU
-@@ -381,15 +428,30 @@ void __ref play_dead(void)
- 
- #endif /* CONFIG_HOTPLUG_CPU */
- 
--struct plat_smp_ops bmips_smp_ops = {
-+struct plat_smp_ops bmips43xx_smp_ops = {
-+	.smp_setup		= bmips_smp_setup,
-+	.prepare_cpus		= bmips_prepare_cpus,
-+	.boot_secondary		= bmips_boot_secondary,
-+	.smp_finish		= bmips_smp_finish,
-+	.init_secondary		= bmips_init_secondary,
-+	.cpus_done		= bmips_cpus_done,
-+	.send_ipi_single	= bmips43xx_send_ipi_single,
-+	.send_ipi_mask		= bmips43xx_send_ipi_mask,
-+#ifdef CONFIG_HOTPLUG_CPU
-+	.cpu_disable		= bmips_cpu_disable,
-+	.cpu_die		= bmips_cpu_die,
-+#endif
-+};
-+
-+struct plat_smp_ops bmips5000_smp_ops = {
- 	.smp_setup		= bmips_smp_setup,
- 	.prepare_cpus		= bmips_prepare_cpus,
- 	.boot_secondary		= bmips_boot_secondary,
- 	.smp_finish		= bmips_smp_finish,
- 	.init_secondary		= bmips_init_secondary,
- 	.cpus_done		= bmips_cpus_done,
--	.send_ipi_single	= bmips_send_ipi_single,
--	.send_ipi_mask		= bmips_send_ipi_mask,
-+	.send_ipi_single	= bmips5000_send_ipi_single,
-+	.send_ipi_mask		= bmips5000_send_ipi_mask,
- #ifdef CONFIG_HOTPLUG_CPU
- 	.cpu_disable		= bmips_cpu_disable,
- 	.cpu_die		= bmips_cpu_die,
-@@ -427,43 +489,47 @@ void __cpuinit bmips_ebase_setup(void)
- 
- 	BUG_ON(ebase != CKSEG0);
- 
--#if defined(CONFIG_CPU_BMIPS4350)
--	/*
--	 * BMIPS4350 cannot relocate the normal vectors, but it
--	 * can relocate the BEV=1 vectors.  So CPU1 starts up at
--	 * the relocated BEV=1, IV=0 general exception vector @
--	 * 0xa000_0380.
--	 *
--	 * set_uncached_handler() is used here because:
--	 *  - CPU1 will run this from uncached space
--	 *  - None of the cacheflush functions are set up yet
--	 */
--	set_uncached_handler(BMIPS_WARM_RESTART_VEC - CKSEG0,
--		&bmips_smp_int_vec, 0x80);
--	__sync();
--	return;
--#elif defined(CONFIG_CPU_BMIPS4380)
--	/*
--	 * 0x8000_0000: reset/NMI (initially in kseg1)
--	 * 0x8000_0400: normal vectors
--	 */
--	new_ebase = 0x80000400;
--	cbr = BMIPS_GET_CBR();
--	__raw_writel(0x80080800, cbr + BMIPS_RELO_VECTOR_CONTROL_0);
--	__raw_writel(0xa0080800, cbr + BMIPS_RELO_VECTOR_CONTROL_1);
--#elif defined(CONFIG_CPU_BMIPS5000)
--	/*
--	 * 0x8000_0000: reset/NMI (initially in kseg1)
--	 * 0x8000_1000: normal vectors
--	 */
--	new_ebase = 0x80001000;
--	write_c0_brcm_bootvec(0xa0088008);
--	write_c0_ebase(new_ebase);
--	if (max_cpus > 2)
--		bmips_write_zscm_reg(0xa0, 0xa008a008);
--#else
--	return;
--#endif
-+	switch (current_cpu_type()) {
-+	case CPU_BMIPS4350:
-+		/*
-+		 * BMIPS4350 cannot relocate the normal vectors, but it
-+		 * can relocate the BEV=1 vectors.  So CPU1 starts up at
-+		 * the relocated BEV=1, IV=0 general exception vector @
-+		 * 0xa000_0380.
-+		 *
-+		 * set_uncached_handler() is used here because:
-+		 *  - CPU1 will run this from uncached space
-+		 *  - None of the cacheflush functions are set up yet
-+		 */
-+		set_uncached_handler(BMIPS_WARM_RESTART_VEC - CKSEG0,
-+			&bmips_smp_int_vec, 0x80);
-+		__sync();
-+		return;
-+	case CPU_BMIPS4380:
-+		/*
-+		 * 0x8000_0000: reset/NMI (initially in kseg1)
-+		 * 0x8000_0400: normal vectors
-+		 */
-+		new_ebase = 0x80000400;
-+		cbr = BMIPS_GET_CBR();
-+		__raw_writel(0x80080800, cbr + BMIPS_RELO_VECTOR_CONTROL_0);
-+		__raw_writel(0xa0080800, cbr + BMIPS_RELO_VECTOR_CONTROL_1);
-+		break;
-+	case CPU_BMIPS5000:
-+		/*
-+		 * 0x8000_0000: reset/NMI (initially in kseg1)
-+		 * 0x8000_1000: normal vectors
-+		 */
-+		new_ebase = 0x80001000;
-+		write_c0_brcm_bootvec(0xa0088008);
-+		write_c0_ebase(new_ebase);
-+		if (max_cpus > 2)
-+			bmips_write_zscm_reg(0xa0, 0xa008a008);
-+		break;
-+	default:
-+		return;
-+	}
-+
- 	board_nmi_handler_setup = &bmips_nmi_handler_setup;
- 	ebase = new_ebase;
- }

target/linux/brcm63xx/patches-3.10/063-MIPS-BMIPS-merge-CPU-options-into-one-option.patch

@@ -1,137 +0,0 @@
-From 81d6f5e024884ce904b7bd36fec60291d751df48 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Thu, 27 Jun 2013 23:57:20 +0200
-Subject: [PATCH V2 04/13] MIPS: BMIPS: merge CPU options into one option
-
-Instead of treating each flavour as an exclusive CPU to select, make
-BMIPS the only option and let SYS_HAS_CPU_BMIPS* decide for which
-flavours to include support.
-
-Run tested on BMIPS3300 and BMIPS4350, only build tested for BMIPS4380
-and BMIPS5000.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
-V1 -> V2:
- * Let the SYS_HAS_CPU_BMIPS* symbols select SYS_HAS_CPU_BMIPS instead of
-   requiring users to select it
-
- arch/mips/Kconfig | 80 +++++++++++++++++++++++++++----------------------------
- 1 file changed, 39 insertions(+), 41 deletions(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -1453,41 +1453,21 @@ config CPU_CAVIUM_OCTEON
- 	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
- 	  Full details can be found at http://www.caviumnetworks.com.
- 
--config CPU_BMIPS3300
--	bool "BMIPS3300"
--	depends on SYS_HAS_CPU_BMIPS3300
--	select CPU_BMIPS
--	help
--	  Broadcom BMIPS3300 processors.
--
--config CPU_BMIPS4350
--	bool "BMIPS4350"
--	depends on SYS_HAS_CPU_BMIPS4350
--	select CPU_BMIPS
--	select SYS_SUPPORTS_SMP
--	select SYS_SUPPORTS_HOTPLUG_CPU
--	help
--	  Broadcom BMIPS4350 ("VIPER") processors.
--
--config CPU_BMIPS4380
--	bool "BMIPS4380"
--	depends on SYS_HAS_CPU_BMIPS4380
--	select CPU_BMIPS
--	select SYS_SUPPORTS_SMP
--	select SYS_SUPPORTS_HOTPLUG_CPU
--	help
--	  Broadcom BMIPS4380 processors.
--
--config CPU_BMIPS5000
--	bool "BMIPS5000"
--	depends on SYS_HAS_CPU_BMIPS5000
--	select CPU_BMIPS
--	select CPU_SUPPORTS_HIGHMEM
--	select MIPS_CPU_SCACHE
--	select SYS_SUPPORTS_SMP
--	select SYS_SUPPORTS_HOTPLUG_CPU
-+config CPU_BMIPS
-+	bool "Broadcom BMIPS"
-+	depends on SYS_HAS_CPU_BMIPS
-+	select CPU_MIPS32
-+	select CPU_BMIPS3300 if SYS_HAS_CPU_BMIPS3300
-+	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
-+	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
-+	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
-+	select CPU_SUPPORTS_32BIT_KERNEL
-+	select DMA_NONCOHERENT
-+	select IRQ_CPU
-+	select SWAP_IO_SPACE
-+	select WEAK_ORDERING
- 	help
--	  Broadcom BMIPS5000 processors.
-+	  Support for BMIPS3300/4350/4380 and BMIPS5000 processors.
- 
- config CPU_XLR
- 	bool "Netlogic XLR SoC"
-@@ -1568,14 +1548,25 @@ config CPU_LOONGSON1
- 	select CPU_SUPPORTS_32BIT_KERNEL
- 	select CPU_SUPPORTS_HIGHMEM
- 
--config CPU_BMIPS
-+config CPU_BMIPS3300
- 	bool
--	select CPU_MIPS32
--	select CPU_SUPPORTS_32BIT_KERNEL
--	select DMA_NONCOHERENT
--	select IRQ_CPU
--	select SWAP_IO_SPACE
--	select WEAK_ORDERING
-+
-+config CPU_BMIPS4350
-+	bool
-+	select SYS_SUPPORTS_SMP
-+	select SYS_SUPPORTS_HOTPLUG_CPU
-+
-+config CPU_BMIPS4380
-+	bool
-+	select SYS_SUPPORTS_SMP
-+	select SYS_SUPPORTS_HOTPLUG_CPU
-+
-+config CPU_BMIPS5000
-+	bool
-+	select CPU_SUPPORTS_HIGHMEM
-+	select MIPS_CPU_SCACHE
-+	select SYS_SUPPORTS_SMP
-+	select SYS_SUPPORTS_HOTPLUG_CPU
- 
- config SYS_HAS_CPU_LOONGSON2E
- 	bool
-@@ -1649,17 +1640,24 @@ config SYS_HAS_CPU_SB1
- config SYS_HAS_CPU_CAVIUM_OCTEON
- 	bool
- 
-+config SYS_HAS_CPU_BMIPS
-+	bool
-+
- config SYS_HAS_CPU_BMIPS3300
- 	bool
-+	select SYS_HAS_CPU_BMIPS
- 
- config SYS_HAS_CPU_BMIPS4350
- 	bool
-+	select SYS_HAS_CPU_BMIPS
- 
- config SYS_HAS_CPU_BMIPS4380
- 	bool
-+	select SYS_HAS_CPU_BMIPS
- 
- config SYS_HAS_CPU_BMIPS5000
- 	bool
-+	select SYS_HAS_CPU_BMIPS
- 
- config SYS_HAS_CPU_XLR
- 	bool

target/linux/brcm63xx/patches-3.10/064-MIPS-BMIPS-select-CPU_SUPPORTS_HIGHMEM.patch

@@ -1,30 +0,0 @@
-From 89d4a38dde99a6b141e90860fca594a9ac66336b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Tue, 16 Jul 2013 14:02:57 +0200
-Subject: [PATCH V2 05/13] MIPS: BMIPS: select CPU_SUPPORTS_HIGHMEM
-
-All BMIPS CPUs support HIGHMEM, so it should be selected by CPU_BMIPS.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -1466,6 +1466,7 @@ config CPU_BMIPS
- 	select IRQ_CPU
- 	select SWAP_IO_SPACE
- 	select WEAK_ORDERING
-+	select CPU_SUPPORTS_HIGHMEM
- 	help
- 	  Support for BMIPS3300/4350/4380 and BMIPS5000 processors.
- 
-@@ -1563,7 +1564,6 @@ config CPU_BMIPS4380
- 
- config CPU_BMIPS5000
- 	bool
--	select CPU_SUPPORTS_HIGHMEM
- 	select MIPS_CPU_SCACHE
- 	select SYS_SUPPORTS_SMP
- 	select SYS_SUPPORTS_HOTPLUG_CPU

target/linux/brcm63xx/patches-3.10/065-MIPS-BMIPS-select-CPU_HAS_PREFETCH.patch

@@ -1,22 +0,0 @@
-From 58827e709eb7a2e0899260893a5c9c58eb0c5db1 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Tue, 16 Jul 2013 14:04:40 +0200
-Subject: [PATCH V2 06/13] MIPS: BMIPS: select CPU_HAS_PREFETCH
-
-As they are MIPS32 CPUs they do support the prefetch opcode.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -1467,6 +1467,7 @@ config CPU_BMIPS
- 	select SWAP_IO_SPACE
- 	select WEAK_ORDERING
- 	select CPU_SUPPORTS_HIGHMEM
-+	select CPU_HAS_PREFETCH
- 	help
- 	  Support for BMIPS3300/4350/4380 and BMIPS5000 processors.
- 

target/linux/brcm63xx/patches-3.10/066-MIPS-BMIPS-extend-BMIPS3300-to-include-BMIPS32.patch

@@ -1,52 +0,0 @@
-From e742d5b77ec18926293ec5d101470522f67ee159 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Thu, 15 Aug 2013 12:10:11 +0200
-Subject: [PATCH V2 07/13] MIPS: BMIPS: extend BMIPS3300 to include BMIPS32
-
-Codewise there is no difference between these two, so it does not make
-sense to treat them differently. Also chip families having one of these
-tend to have the other.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/Kconfig | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -1457,7 +1457,7 @@ config CPU_BMIPS
- 	bool "Broadcom BMIPS"
- 	depends on SYS_HAS_CPU_BMIPS
- 	select CPU_MIPS32
--	select CPU_BMIPS3300 if SYS_HAS_CPU_BMIPS3300
-+	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
- 	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
- 	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
- 	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
-@@ -1469,7 +1469,7 @@ config CPU_BMIPS
- 	select CPU_SUPPORTS_HIGHMEM
- 	select CPU_HAS_PREFETCH
- 	help
--	  Support for BMIPS3300/4350/4380 and BMIPS5000 processors.
-+	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
- 
- config CPU_XLR
- 	bool "Netlogic XLR SoC"
-@@ -1550,7 +1550,7 @@ config CPU_LOONGSON1
- 	select CPU_SUPPORTS_32BIT_KERNEL
- 	select CPU_SUPPORTS_HIGHMEM
- 
--config CPU_BMIPS3300
-+config CPU_BMIPS32_3300
- 	bool
- 
- config CPU_BMIPS4350
-@@ -1644,7 +1644,7 @@ config SYS_HAS_CPU_CAVIUM_OCTEON
- config SYS_HAS_CPU_BMIPS
- 	bool
- 
--config SYS_HAS_CPU_BMIPS3300
-+config SYS_HAS_CPU_BMIPS32_3300
- 	bool
- 	select SYS_HAS_CPU_BMIPS
- 

target/linux/brcm63xx/patches-3.10/067-MIPS-BMIPS-add-a-smp-ops-registration-helper.patch

@@ -1,77 +0,0 @@
-From 0b135a3e8f344061ed0aa66e2514627dd7aa946f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 23 Jun 2013 14:04:51 +0200
-Subject: [PATCH V2 08/13] MIPS: BMIPS: add a smp ops registration helper
-
-Add a helper similar to the generic register_XXX_smp_ops() for bmips.
-Register SMP UP ops in case of BMIPS32/3300.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
-V1 -> V2:
- * use SMP_UP (ops) in case of BMIPS32_3300
-
- arch/mips/Kconfig             |  1 +
- arch/mips/bcm63xx/prom.c      |  2 +-
- arch/mips/include/asm/bmips.h | 26 ++++++++++++++++++++++++++
- 3 files changed, 28 insertions(+), 1 deletion(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -1551,6 +1551,7 @@ config CPU_LOONGSON1
- 	select CPU_SUPPORTS_HIGHMEM
- 
- config CPU_BMIPS32_3300
-+	select SMP_UP if SMP
- 	bool
- 
- config CPU_BMIPS4350
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -61,7 +61,7 @@ void __init prom_init(void)
- 
- 	if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) {
- 		/* set up SMP */
--		register_smp_ops(&bmips43xx_smp_ops);
-+		register_bmips_smp_ops();
- 
- 		/*
- 		 * BCM6328 might not have its second CPU enabled, while BCM3368
---- a/arch/mips/include/asm/bmips.h
-+++ b/arch/mips/include/asm/bmips.h
-@@ -46,9 +46,35 @@
- 
- #include <linux/cpumask.h>
- #include <asm/r4kcache.h>
-+#include <asm/smp-ops.h>
- 
- extern struct plat_smp_ops bmips43xx_smp_ops;
- extern struct plat_smp_ops bmips5000_smp_ops;
-+
-+static inline int register_bmips_smp_ops(void)
-+{
-+#if IS_ENABLED(CONFIG_CPU_BMIPS) && IS_ENABLED(CONFIG_SMP)
-+	switch (current_cpu_type()) {
-+	case CPU_BMIPS32:
-+	case CPU_BMIPS3300:
-+		return register_up_smp_ops();
-+	case CPU_BMIPS4350:
-+	case CPU_BMIPS4380:
-+		register_smp_ops(&bmips43xx_smp_ops);
-+		break;
-+	case CPU_BMIPS5000:
-+		register_smp_ops(&bmips5000_smp_ops);
-+		break;
-+	default:
-+		return -ENODEV;
-+	}
-+
-+	return 0;
-+#else
-+	return -ENODEV;
-+#endif
-+}
-+
- extern char bmips_reset_nmi_vec;
- extern char bmips_reset_nmi_vec_end;
- extern char bmips_smp_movevec;

target/linux/brcm63xx/patches-3.10/068-MIPS-BCM63XX-always-register-bmips-smp-ops.patch

@@ -1,27 +0,0 @@
-From 08181bee8ee375225129d086656c567022becf41 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Fri, 28 Jun 2013 00:08:16 +0200
-Subject: [PATCH V2 09/13] MIPS: BCM63XX: always register bmips smp ops
-
-Use the return value for guarding further SMP setup.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/prom.c | 6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -59,10 +59,8 @@ void __init prom_init(void)
- 	/* do low level board init */
- 	board_prom_init();
- 
--	if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) {
--		/* set up SMP */
--		register_bmips_smp_ops();
--
-+	/* set up SMP */
-+	if (!register_bmips_smp_ops()) {
- 		/*
- 		 * BCM6328 might not have its second CPU enabled, while BCM3368
- 		 * and BCM6358 need special handling for their shared TLB, so

target/linux/brcm63xx/patches-3.10/069-MIPS-BCM63XX-let-the-individual-SoCs-select-the-appr.patch

@@ -1,70 +0,0 @@
-From 949b88531a779af4f6456ff43d3de2d4f74e44ee Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 23 Jun 2013 12:25:49 +0200
-Subject: [PATCH V2 10/13] MIPS: BCM63XX: let the individual SoCs select the
- appropriate CPUs
-
-Let each supported chip select the appropirate SYS_HAS_CPU_BMIPS*
-option for its embedded processor, so support will be conditionally
-included.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/Kconfig         | 1 -
- arch/mips/bcm63xx/Kconfig | 8 ++++++++
- 2 files changed, 8 insertions(+), 1 deletion(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -130,7 +130,6 @@ config BCM63XX
- 	select DMA_NONCOHERENT
- 	select IRQ_CPU
- 	select SYS_HAS_CPU_MIPS32_R1
--	select SYS_HAS_CPU_BMIPS4350 if !BCM63XX_CPU_6338 && !BCM63XX_CPU_6345 && !BCM63XX_CPU_6348
- 	select NR_CPUS_DEFAULT_2
- 	select SYS_SUPPORTS_32BIT_KERNEL
- 	select SYS_SUPPORTS_BIG_ENDIAN
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -3,33 +3,41 @@ menu "CPU support"
- 
- config BCM63XX_CPU_3368
- 	bool "support 3368 CPU"
-+	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
- 
- config BCM63XX_CPU_6328
- 	bool "support 6328 CPU"
-+	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
- 
- config BCM63XX_CPU_6338
- 	bool "support 6338 CPU"
-+	select SYS_HAS_CPU_BMIPS32_3300
- 	select HW_HAS_PCI
- 
- config BCM63XX_CPU_6345
- 	bool "support 6345 CPU"
-+	select SYS_HAS_CPU_BMIPS32_3300
- 
- config BCM63XX_CPU_6348
- 	bool "support 6348 CPU"
-+	select SYS_HAS_CPU_BMIPS32_3300
- 	select HW_HAS_PCI
- 
- config BCM63XX_CPU_6358
- 	bool "support 6358 CPU"
-+	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
- 
- config BCM63XX_CPU_6362
- 	bool "support 6362 CPU"
-+	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
- 
- config BCM63XX_CPU_6368
- 	bool "support 6368 CPU"
-+	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
- endmenu
- 

target/linux/brcm63xx/patches-3.10/071-MIPS-BCM63XX-drop-SYS_HAS_CPU_MIPS32R1.patch

@@ -1,24 +0,0 @@
-From c6c4897703d825c9efea6d9a708aaa080c8c3177 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Thu, 17 Oct 2013 13:16:08 +0200
-Subject: [PATCH V2 13/13] MIPS: BCM63XX: drop SYS_HAS_CPU_MIPS32R1
-
-All MIPS cores on BCM63XX identify as Broadcom, not MIPS, so no need
-to support non-broadcom MIPS CPUs. This also ensures that CPU_BMIPS
-is always selected.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/Kconfig | 1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -129,7 +129,6 @@ config BCM63XX
- 	select CSRC_R4K
- 	select DMA_NONCOHERENT
- 	select IRQ_CPU
--	select SYS_HAS_CPU_MIPS32_R1
- 	select NR_CPUS_DEFAULT_2
- 	select SYS_SUPPORTS_32BIT_KERNEL
- 	select SYS_SUPPORTS_BIG_ENDIAN

target/linux/brcm63xx/patches-3.10/100-MIPS-bmips-fix-compilation-for-BMIPS5000.patch

@@ -1,67 +0,0 @@
-From d55975b74389b2cf1a38732062ff89303940f6e1 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 29 Jun 2013 11:46:56 +0200
-Subject: [PATCH 01/10] MIPS: bmips: fix compilation for BMIPS5000
-
-Replace the macro names in strings with actual macro invocation.
-
-Fixes the following build error:
-
-  CC      arch/mips/kernel/smp-bmips.o
-{standard input}: Assembler messages:
-{standard input}:951: Error: Unrecognized opcode `_ssnop'
-{standard input}:952: Error: Unrecognized opcode `_ssnop'
-(...)
-make[6]: *** [arch/mips/kernel/smp-bmips.o] Error 1
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/include/asm/bmips.h |   28 ++++++++++++++--------------
- 1 file changed, 14 insertions(+), 14 deletions(-)
-
---- a/arch/mips/include/asm/bmips.h
-+++ b/arch/mips/include/asm/bmips.h
-@@ -97,15 +97,15 @@ static inline unsigned long bmips_read_z
- 		".set noreorder\n"
- 		"cache %1, 0(%2)\n"
- 		"sync\n"
--		"_ssnop\n"
--		"_ssnop\n"
--		"_ssnop\n"
--		"_ssnop\n"
--		"_ssnop\n"
--		"_ssnop\n"
--		"_ssnop\n"
-+		__stringify(___ssnop) "\n"
-+		__stringify(___ssnop) "\n"
-+		__stringify(___ssnop) "\n"
-+		__stringify(___ssnop) "\n"
-+		__stringify(___ssnop) "\n"
-+		__stringify(___ssnop) "\n"
-+		__stringify(___ssnop) "\n"
- 		"mfc0 %0, $28, 3\n"
--		"_ssnop\n"
-+		__stringify(___ssnop) "\n"
- 		".set pop\n"
- 		: "=&r" (ret)
- 		: "i" (Index_Load_Tag_S), "r" (ZSCM_REG_BASE + offset)
-@@ -119,13 +119,13 @@ static inline void bmips_write_zscm_reg(
- 		".set push\n"
- 		".set noreorder\n"
- 		"mtc0 %0, $28, 3\n"
--		"_ssnop\n"
--		"_ssnop\n"
--		"_ssnop\n"
-+		__stringify(___ssnop) "\n"
-+		__stringify(___ssnop) "\n"
-+		__stringify(___ssnop) "\n"
- 		"cache %1, 0(%2)\n"
--		"_ssnop\n"
--		"_ssnop\n"
--		"_ssnop\n"
-+		__stringify(___ssnop) "\n"
-+		__stringify(___ssnop) "\n"
-+		__stringify(___ssnop) "\n"
- 		: /* no outputs */
- 		: "r" (data),
- 		  "i" (Index_Store_Tag_S), "r" (ZSCM_REG_BASE + offset)

target/linux/brcm63xx/patches-3.10/101-MIPS-BCM63XX-sync-mips-counter-during-cpu-bringup.patch

@@ -1,27 +0,0 @@
-From 23c21090f49a64b532755542a71e9aa3e4fc84d9 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 5 Apr 2014 20:07:25 +0200
-Subject: [PATCH] MIPS: BCM63XX: sync mips counter during cpu bringup
-
-We are using the mips counters as the clock source, so we need to ensure
-they are synced, else e.g. gettimeofday will return different values
-depending on which core it was run.
-
-Observed difference was about 8 seconds, causing ~8 seconds ping or time
-running backwards for some programs.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -127,6 +127,7 @@ config BCM63XX
- 	select BOOT_RAW
- 	select CEVT_R4K
- 	select CSRC_R4K
-+	select SYNC_R4K
- 	select DMA_NONCOHERENT
- 	select IRQ_CPU
- 	select NR_CPUS_DEFAULT_2

target/linux/brcm63xx/patches-3.10/110-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch

@@ -1,28 +0,0 @@
-From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Mon, 28 Jan 2013 20:06:19 +0100
-Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay
-
-Knowledge of the clock setup delay should remain at the clock level (so
-it can be clock specific and CPU specific). Add the 100 milliseconds
-required clock delay for the USB host clock when it gets enabled.
-
-Signed-off-by: Florian Fainelli <[email protected]>
----
- arch/mips/bcm63xx/clk.c |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -177,6 +177,11 @@ static void usbh_set(struct clk *clk, in
- 		bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
- 	else if (BCMCPU_IS_6368())
- 		bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
-+	else
-+		return;
-+
-+	if (enable)
-+		msleep(100);
- }
- 
- static struct clk clk_usbh = {

target/linux/brcm63xx/patches-3.10/111-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch

@@ -1,41 +0,0 @@
-From 8e9bf528a122741f0171b89c297b63041116d704 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Mon, 28 Jan 2013 20:06:20 +0100
-Subject: [PATCH 02/11] MIPS: BCM63XX: add USB device clock enable delay to
- clock code
-
-This patch adds the required 10 micro seconds delay to the USB device
-clock enable operation. Put this where the correct clock knowledege is,
-which is in the clock code, and remove this delay from the bcm63xx_udc
-gadget driver where it was before.
-
-Signed-off-by: Florian Fainelli <[email protected]>
----
- arch/mips/bcm63xx/clk.c          |    5 +++++
- drivers/usb/gadget/bcm63xx_udc.c |    1 -
- 2 files changed, 5 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -199,6 +199,11 @@ static void usbd_set(struct clk *clk, in
- 		bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
- 	else if (BCMCPU_IS_6368())
- 		bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
-+	else
-+		return;
-+
-+	if (enable)
-+		udelay(10);
- }
- 
- static struct clk clk_usbd = {
---- a/drivers/usb/gadget/bcm63xx_udc.c
-+++ b/drivers/usb/gadget/bcm63xx_udc.c
-@@ -392,7 +392,6 @@ static inline void set_clocks(struct bcm
- 	if (is_enabled) {
- 		clk_enable(udc->usbh_clk);
- 		clk_enable(udc->usbd_clk);
--		udelay(10);
- 	} else {
- 		clk_disable(udc->usbd_clk);
- 		clk_disable(udc->usbh_clk);

target/linux/brcm63xx/patches-3.10/112-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch

@@ -1,151 +0,0 @@
-From ac9b0b574d54be28b300bf99ffe092a2c589484f Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Mon, 28 Jan 2013 20:06:21 +0100
-Subject: [PATCH 03/11] MIPS: BCM63XX: move code touching the USB private
- register
-
-This patch moves the code touching the USB private register in the
-bcm63xx USB gadget driver to arch/mips/bcm63xx/usb-common.c in
-preparation for adding support for OHCI and EHCI host controllers which
-will also touch the USB private register.
-
-Signed-off-by: Florian Fainelli <[email protected]>
----
- arch/mips/bcm63xx/Makefile                         |    2 +-
- arch/mips/bcm63xx/usb-common.c                     |   53 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h    |    9 ++++
- drivers/usb/gadget/bcm63xx_udc.c                   |   27 ++--------
- 4 files changed, 67 insertions(+), 24 deletions(-)
- create mode 100644 arch/mips/bcm63xx/usb-common.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,7 +1,7 @@
- obj-y		+= clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
- 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
--		   dev-wdt.o dev-usb-usbd.o
-+		   dev-wdt.o dev-usb-usbd.o usb-common.o
- obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
- 
- obj-y		+= boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -0,0 +1,53 @@
-+/*
-+ * Broadcom BCM63xx common USB device configuration code
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2012 Kevin Cernekee <[email protected]>
-+ * Copyright (C) 2012 Broadcom Corporation
-+ *
-+ */
-+#include <linux/export.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_usb_priv.h>
-+
-+void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
-+{
-+	u32 val;
-+
-+	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-+	if (is_device) {
-+		val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-+		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+	} else {
-+		val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-+		val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+	}
-+	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+
-+	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+	if (is_device)
-+		val |= USBH_PRIV_SWAP_USBD_MASK;
-+	else
-+		val &= ~USBH_PRIV_SWAP_USBD_MASK;
-+	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
-+}
-+EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
-+
-+void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
-+{
-+	u32 val;
-+
-+	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-+	if (is_on)
-+		val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+	else
-+		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+}
-+EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-@@ -0,0 +1,9 @@
-+#ifndef BCM63XX_USB_PRIV_H_
-+#define BCM63XX_USB_PRIV_H_
-+
-+#include <linux/types.h>
-+
-+void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
-+void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
-+
-+#endif /* BCM63XX_USB_PRIV_H_ */
---- a/drivers/usb/gadget/bcm63xx_udc.c
-+++ b/drivers/usb/gadget/bcm63xx_udc.c
-@@ -41,6 +41,7 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
-+#include <bcm63xx_usb_priv.h>
- 
- #define DRV_MODULE_NAME		"bcm63xx_udc"
- 
-@@ -869,22 +870,7 @@ static void bcm63xx_select_phy_mode(stru
- 		bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG);
- 	}
- 
--	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
--	if (is_device) {
--		val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
--		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
--	} else {
--		val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
--		val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
--	}
--	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
--
--	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
--	if (is_device)
--		val |= USBH_PRIV_SWAP_USBD_MASK;
--	else
--		val &= ~USBH_PRIV_SWAP_USBD_MASK;
--	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
-+	bcm63xx_usb_priv_select_phy_mode(portmask, is_device);
- }
- 
- /**
-@@ -898,14 +884,9 @@ static void bcm63xx_select_phy_mode(stru
-  */
- static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on)
- {
--	u32 val, portmask = BIT(udc->pd->port_no);
-+	u32 portmask = BIT(udc->pd->port_no);
- 
--	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
--	if (is_on)
--		val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
--	else
--		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
--	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+	bcm63xx_usb_priv_select_pullup(portmask, is_on);
- }
- 
- /**

target/linux/brcm63xx/patches-3.10/113-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch

@@ -1,169 +0,0 @@
-From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Mon, 28 Jan 2013 20:06:22 +0100
-Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to
- common USB code
-
-This patch updates the common USB code touching the USB private
-registers with the specific bits to properly enable OHCI and EHCI
-controllers on BCM63xx SoCs. As a result we now need to protect access
-to Read Modify Write sequences using a spinlock because we cannot
-guarantee that any of the exposed helper will not be called
-concurrently.
-
-Signed-off-by: Maxime Bizon <[email protected]>
-Signed-off-by: Florian Fainelli <[email protected]>
----
- arch/mips/bcm63xx/usb-common.c                     |   97 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h    |    2 +
- 2 files changed, 99 insertions(+)
-
---- a/arch/mips/bcm63xx/usb-common.c
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -5,10 +5,12 @@
-  * License.  See the file "COPYING" in the main directory of this archive
-  * for more details.
-  *
-+ * Copyright (C) 2008 Maxime Bizon <[email protected]>
-  * Copyright (C) 2012 Kevin Cernekee <[email protected]>
-  * Copyright (C) 2012 Broadcom Corporation
-  *
-  */
-+#include <linux/spinlock.h>
- #include <linux/export.h>
- 
- #include <bcm63xx_cpu.h>
-@@ -16,9 +18,14 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_usb_priv.h>
- 
-+static DEFINE_SPINLOCK(usb_priv_reg_lock);
-+
- void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
- {
- 	u32 val;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&usb_priv_reg_lock, flags);
- 
- 	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
- 	if (is_device) {
-@@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3
- 	else
- 		val &= ~USBH_PRIV_SWAP_USBD_MASK;
- 	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
-+
-+	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
- }
- EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
- 
- void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
- {
- 	u32 val;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&usb_priv_reg_lock, flags);
- 
- 	val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
- 	if (is_on)
-@@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32
- 	else
- 		val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
- 	bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+
-+	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
- }
- EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
-+
-+/* The following array represents the meaning of the DESC/DATA
-+ * endian swapping with respect to the CPU configured endianness
-+ *
-+ * DATA	ENDN	mmio	descriptor
-+ * 0	0	BE	invalid
-+ * 0	1	BE	LE
-+ * 1	0	BE	BE
-+ * 1	1	BE	invalid
-+ *
-+ * Since BCM63XX SoCs are configured to be in big-endian mode
-+ * we want configuration at line 3.
-+ */
-+void bcm63xx_usb_priv_ohci_cfg_set(void)
-+{
-+	u32 reg;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&usb_priv_reg_lock, flags);
-+
-+	if (BCMCPU_IS_6348())
-+		bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG);
-+	else if (BCMCPU_IS_6358()) {
-+		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
-+		reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+		reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
-+		/*
-+		 * The magic value comes for the original vendor BSP
-+		 * and is needed for USB to work. Datasheet does not
-+		 * help, so the magic value is used as-is.
-+		 */
-+		bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
-+				USBH_PRIV_TEST_6358_REG);
-+
-+	} else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
-+		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+		reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+		reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+		reg |= USBH_PRIV_SETUP_IOC_MASK;
-+		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+	}
-+
-+	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
-+}
-+
-+void bcm63xx_usb_priv_ehci_cfg_set(void)
-+{
-+	u32 reg;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&usb_priv_reg_lock, flags);
-+
-+	if (BCMCPU_IS_6358()) {
-+		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
-+		reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+		reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
-+
-+		/*
-+		 * The magic value comes for the original vendor BSP
-+		 * and is needed for USB to work. Datasheet does not
-+		 * help, so the magic value is used as-is.
-+		 */
-+		bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
-+				USBH_PRIV_TEST_6358_REG);
-+
-+	} else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
-+		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+		reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+		reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+		reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+		reg |= USBH_PRIV_SETUP_IOC_MASK;
-+		bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+	}
-+
-+	spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
-+}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-@@ -5,5 +5,7 @@
- 
- void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
- void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
-+void bcm63xx_usb_priv_ohci_cfg_set(void);
-+void bcm63xx_usb_priv_ehci_cfg_set(void);
- 
- #endif /* BCM63XX_USB_PRIV_H_ */

target/linux/brcm63xx/patches-3.10/114-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch

@@ -1,62 +0,0 @@
-From 94ec618bd1a6b07fafbbfc9bcc54e7f9360ff9a0 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Mon, 28 Jan 2013 20:06:23 +0100
-Subject: [PATCH 05/11] MIPS: BCM63XX: introduce BCM63XX_OHCI configuration
- symbol
-
-This configuration symbol can be used by CPUs supporting the on-chip
-OHCI controller, and ensures that all relevant OHCI-related
-configuration options are correctly selected. So far, OHCI support is
-available for the 6328, 6348, 6358 and 6358 SoCs.
-
-Signed-off-by: Florian Fainelli <[email protected]>
----
- arch/mips/bcm63xx/Kconfig |   15 ++++++++++-----
- 1 file changed, 10 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -6,10 +6,17 @@ config BCM63XX_CPU_3368
- 	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
- 
-+config BCM63XX_OHCI
-+	bool
-+	select USB_ARCH_HAS_OHCI
-+	select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
-+	select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
-+
- config BCM63XX_CPU_6328
- 	bool "support 6328 CPU"
- 	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
-+	select BCM63XX_OHCI
- 
- config BCM63XX_CPU_6338
- 	bool "support 6338 CPU"
-@@ -24,21 +31,25 @@ config BCM63XX_CPU_6348
- 	bool "support 6348 CPU"
- 	select SYS_HAS_CPU_BMIPS32_3300
- 	select HW_HAS_PCI
-+	select BCM63XX_OHCI
- 
- config BCM63XX_CPU_6358
- 	bool "support 6358 CPU"
- 	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
-+	select BCM63XX_OHCI
- 
- config BCM63XX_CPU_6362
- 	bool "support 6362 CPU"
- 	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
-+	select BCM63XX_OHCI
- 
- config BCM63XX_CPU_6368
- 	bool "support 6368 CPU"
- 	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
-+	select BCM63XX_OHCI
- endmenu
- 
- source "arch/mips/bcm63xx/boards/Kconfig"

target/linux/brcm63xx/patches-3.10/115-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch

@@ -1,138 +0,0 @@
-From 30d22baef255c99a12c4858ce4ab0d45f0d8c9ae Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Mon, 28 Jan 2013 20:06:24 +0100
-Subject: [PATCH 06/11] MIPS: BCM63XX: add support for the on-chip OHCI
- controller
-
-Broadcom BCM63XX SoCs include an on-chip OHCI controller which can be
-driven by the ohci-platform generic driver by using specific power
-on/off/suspend callback to manage clocks and hardware specific
-configuration.
-
-Signed-off-by: Maxime Bizon <[email protected]>
-Signed-off-by: Florian Fainelli <[email protected]>
----
- arch/mips/bcm63xx/Makefile                         |    2 +-
- arch/mips/bcm63xx/dev-usb-ohci.c                   |   94 ++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h        |    6 ++
- 3 files changed, 101 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,7 +1,7 @@
- obj-y		+= clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
- 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
--		   dev-wdt.o dev-usb-usbd.o usb-common.o
-+		   dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
- obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
- 
- obj-y		+= boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-usb-ohci.c
-@@ -0,0 +1,94 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <[email protected]>
-+ * Copyright (C) 2013 Florian Fainelli <[email protected]>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/usb/ohci_pdriver.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_usb_priv.h>
-+#include <bcm63xx_dev_usb_ohci.h>
-+
-+static struct resource ohci_resources[] = {
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.end		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_MEM,
-+	},
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static u64 ohci_dmamask = DMA_BIT_MASK(32);
-+
-+static struct clk *usb_host_clock;
-+
-+static int bcm63xx_ohci_power_on(struct platform_device *pdev)
-+{
-+	usb_host_clock = clk_get(&pdev->dev, "usbh");
-+	if (IS_ERR_OR_NULL(usb_host_clock))
-+		return -ENODEV;
-+
-+	clk_prepare_enable(usb_host_clock);
-+
-+	bcm63xx_usb_priv_ohci_cfg_set();
-+
-+	return 0;
-+}
-+
-+static void bcm63xx_ohci_power_off(struct platform_device *pdev)
-+{
-+	if (!IS_ERR_OR_NULL(usb_host_clock)) {
-+		clk_disable_unprepare(usb_host_clock);
-+		clk_put(usb_host_clock);
-+	}
-+}
-+
-+static struct usb_ohci_pdata bcm63xx_ohci_pdata = {
-+	.big_endian_desc	= 1,
-+	.big_endian_mmio	= 1,
-+	.no_big_frame_no	= 1,
-+	.num_ports		= 1,
-+	.power_on		= bcm63xx_ohci_power_on,
-+	.power_off		= bcm63xx_ohci_power_off,
-+	.power_suspend		= bcm63xx_ohci_power_off,
-+};
-+
-+static struct platform_device bcm63xx_ohci_device = {
-+	.name		= "ohci-platform",
-+	.id		= -1,
-+	.num_resources	= ARRAY_SIZE(ohci_resources),
-+	.resource	= ohci_resources,
-+	.dev		= {
-+		.platform_data		= &bcm63xx_ohci_pdata,
-+		.dma_mask		= &ohci_dmamask,
-+		.coherent_dma_mask	= DMA_BIT_MASK(32),
-+	},
-+};
-+
-+int __init bcm63xx_ohci_register(void)
-+{
-+	if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
-+		return -ENODEV;
-+
-+	ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
-+	ohci_resources[0].end = ohci_resources[0].start;
-+	ohci_resources[0].end += RSET_OHCI_SIZE - 1;
-+	ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0);
-+
-+	return platform_device_register(&bcm63xx_ohci_device);
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-@@ -0,0 +1,6 @@
-+#ifndef BCM63XX_DEV_USB_OHCI_H_
-+#define BCM63XX_DEV_USB_OHCI_H_
-+
-+int bcm63xx_ohci_register(void);
-+
-+#endif /* BCM63XX_DEV_USB_OHCI_H_ */

target/linux/brcm63xx/patches-3.10/116-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch

@@ -1,36 +0,0 @@
-From 33ef960aed15f9a98a2c51d8d794cd72418e0be4 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Mon, 28 Jan 2013 20:06:25 +0100
-Subject: [PATCH 07/11] MIPS: BCM63XX: register OHCI controller if board
- enables it
-
-BCM63XX-based boards can control the registration of the OHCI controller
-by setting their has_ohci0 flag to 1. Handle this in the generic
-code dealing with board registration and call the actual helper to
-register the OHCI controller.
-
-Signed-off-by: Florian Fainelli <[email protected]>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -26,6 +26,7 @@
- #include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_dev_pcmcia.h>
- #include <bcm63xx_dev_spi.h>
-+#include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
- 
-@@ -898,6 +899,9 @@ int __init board_register_devices(void)
- 	if (board.has_usbd)
- 		bcm63xx_usbd_register(&board.usbd);
- 
-+	if (board.has_ohci0)
-+		bcm63xx_ohci_register();
-+
- 	if (board.has_dsp)
- 		bcm63xx_dsp_register(&board.dsp);
- 

target/linux/brcm63xx/patches-3.10/117-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch

@@ -1,62 +0,0 @@
-From 00da1683364e58c6430a4577123d01037f8faddc Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Mon, 28 Jan 2013 20:06:26 +0100
-Subject: [PATCH 08/11] MIPS: BCM63XX: introduce BCM63XX_EHCI configuration
- symbol
-
-This configuration symbol can be used by CPUs supporting the on-chip
-EHCI controller, and ensures that all relevant EHCI-related
-configuration options are selected. So far BCM6328, BCM6358 and BCM6368
-have an EHCI controller and do select this symbol. Update
-drivers/usb/host/Kconfig with BCM63XX to update direct unmet
-dependencies.
-
-Signed-off-by: Florian Fainelli <[email protected]>
----
- arch/mips/bcm63xx/Kconfig |    9 +++++++++
- drivers/usb/host/Kconfig  |    5 +++--
- 2 files changed, 12 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -12,11 +12,18 @@ config BCM63XX_OHCI
- 	select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
- 	select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
- 
-+config BCM63XX_EHCI
-+	bool
-+	select USB_ARCH_HAS_EHCI
-+	select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
-+	select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
-+
- config BCM63XX_CPU_6328
- 	bool "support 6328 CPU"
- 	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
- 	select BCM63XX_OHCI
-+	select BCM63XX_EHCI
- 
- config BCM63XX_CPU_6338
- 	bool "support 6338 CPU"
-@@ -38,18 +45,21 @@ config BCM63XX_CPU_6358
- 	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
- 	select BCM63XX_OHCI
-+	select BCM63XX_EHCI
- 
- config BCM63XX_CPU_6362
- 	bool "support 6362 CPU"
- 	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
- 	select BCM63XX_OHCI
-+	select BCM63XX_EHCI
- 
- config BCM63XX_CPU_6368
- 	bool "support 6368 CPU"
- 	select SYS_HAS_CPU_BMIPS4350
- 	select HW_HAS_PCI
- 	select BCM63XX_OHCI
-+	select BCM63XX_EHCI
- endmenu
- 
- source "arch/mips/bcm63xx/boards/Kconfig"

target/linux/brcm63xx/patches-3.10/118-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch

@@ -1,137 +0,0 @@
-From e38f13bd6408769c0b565bb1079024f496eee121 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Mon, 28 Jan 2013 20:06:27 +0100
-Subject: [PATCH 09/11] MIPS: BCM63XX: add support for the on-chip EHCI
- controller
-
-Broadcom BCM63XX SoCs include an on-chip EHCI controller which can be
-driven by the generic ehci-platform driver by using specific power
-on/off/suspend callbacks to manage clocks and hardware specific
-configuration.
-
-Signed-off-by: Maxime Bizon <[email protected]>
-Signed-off-by: Florian Fainelli <[email protected]>
----
- arch/mips/bcm63xx/Makefile                         |    2 +-
- arch/mips/bcm63xx/dev-usb-ehci.c                   |   92 ++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h        |    6 ++
- 3 files changed, 99 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,7 +1,8 @@
- obj-y		+= clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- 		   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
- 		   dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
--		   dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
-+		   dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
-+		   usb-common.o
- obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
- 
- obj-y		+= boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -0,0 +1,92 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <[email protected]>
-+ * Copyright (C) 2013 Florian Fainelli <[email protected]>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/usb/ehci_pdriver.h>
-+#include <linux/dma-mapping.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_usb_priv.h>
-+#include <bcm63xx_dev_usb_ehci.h>
-+
-+static struct resource ehci_resources[] = {
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.end		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_MEM,
-+	},
-+	{
-+		.start		= -1, /* filled at runtime */
-+		.flags		= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static u64 ehci_dmamask = DMA_BIT_MASK(32);
-+
-+static struct clk *usb_host_clock;
-+
-+static int bcm63xx_ehci_power_on(struct platform_device *pdev)
-+{
-+	usb_host_clock = clk_get(&pdev->dev, "usbh");
-+	if (IS_ERR_OR_NULL(usb_host_clock))
-+		return -ENODEV;
-+
-+	clk_prepare_enable(usb_host_clock);
-+
-+	bcm63xx_usb_priv_ehci_cfg_set();
-+
-+	return 0;
-+}
-+
-+static void bcm63xx_ehci_power_off(struct platform_device *pdev)
-+{
-+	if (!IS_ERR_OR_NULL(usb_host_clock)) {
-+		clk_disable_unprepare(usb_host_clock);
-+		clk_put(usb_host_clock);
-+	}
-+}
-+
-+static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
-+	.big_endian_desc	= 1,
-+	.big_endian_mmio	= 1,
-+	.power_on		= bcm63xx_ehci_power_on,
-+	.power_off		= bcm63xx_ehci_power_off,
-+	.power_suspend		= bcm63xx_ehci_power_off,
-+};
-+
-+static struct platform_device bcm63xx_ehci_device = {
-+	.name		= "ehci-platform",
-+	.id		= -1,
-+	.num_resources	= ARRAY_SIZE(ehci_resources),
-+	.resource	= ehci_resources,
-+	.dev		= {
-+		.platform_data		= &bcm63xx_ehci_pdata,
-+		.dma_mask		= &ehci_dmamask,
-+		.coherent_dma_mask	= DMA_BIT_MASK(32),
-+	},
-+};
-+
-+int __init bcm63xx_ehci_register(void)
-+{
-+	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+		return 0;
-+
-+	ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
-+	ehci_resources[0].end = ehci_resources[0].start;
-+	ehci_resources[0].end += RSET_EHCI_SIZE - 1;
-+	ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0);
-+
-+	return platform_device_register(&bcm63xx_ehci_device);
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-@@ -0,0 +1,6 @@
-+#ifndef BCM63XX_DEV_USB_EHCI_H_
-+#define BCM63XX_DEV_USB_EHCI_H_
-+
-+int bcm63xx_ehci_register(void);
-+
-+#endif /* BCM63XX_DEV_USB_EHCI_H_ */

target/linux/brcm63xx/patches-3.10/119-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch

@@ -1,36 +0,0 @@
-From 709ef2034f5ba06da35f89856ad7baf2b7a41287 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Mon, 28 Jan 2013 20:06:28 +0100
-Subject: [PATCH 10/11] MIPS: BCM63XX: register EHCI controller if board
- enables it
-
-BCM63XX-based board can control the registration of the EHCI controller
-by setting their has_ehci0 flag to 1. Handle this in the generic
-code dealing with board registration and call the actual helper to register
-the EHCI controller.
-
-Signed-off-by: Florian Fainelli <[email protected]>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c |    4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -26,6 +26,7 @@
- #include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_dev_pcmcia.h>
- #include <bcm63xx_dev_spi.h>
-+#include <bcm63xx_dev_usb_ehci.h>
- #include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-@@ -899,6 +900,9 @@ int __init board_register_devices(void)
- 	if (board.has_usbd)
- 		bcm63xx_usbd_register(&board.usbd);
- 
-+	if (board.has_ehci0)
-+		bcm63xx_ehci_register();
-+
- 	if (board.has_ohci0)
- 		bcm63xx_ohci_register();
- 

target/linux/brcm63xx/patches-3.10/120-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch

@@ -1,24 +0,0 @@
-From 111bbd770441ab34f9da5bb1d85767a9b75227b4 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <[email protected]>
-Date: Mon, 28 Jan 2013 20:06:30 +0100
-Subject: [PATCH 12/12] MIPS: BCM63XX: EHCI controller does not support
- overcurrent
-
-This patch sets the ignore_oc flag for the BCM63XX EHCI controller as it
-does not support proper overcurrent reporting.
-
-Signed-off-by: Florian Fainelli <[email protected]>
----
- arch/mips/bcm63xx/dev-usb-ehci.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/mips/bcm63xx/dev-usb-ehci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -61,6 +61,7 @@ static void bcm63xx_ehci_power_off(struc
- static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
- 	.big_endian_desc	= 1,
- 	.big_endian_mmio	= 1,
-+	.ignore_oc		= 1,
- 	.power_on		= bcm63xx_ehci_power_on,
- 	.power_off		= bcm63xx_ehci_power_off,
- 	.power_suspend		= bcm63xx_ehci_power_off,

target/linux/brcm63xx/patches-3.10/201-SPI-Allow-specifying-the-parsers-for-SPI-flash.patch

@@ -1,38 +0,0 @@
-From 3f650fc30aa0badf9d02842ce396cea3eef2eeaa Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Fri, 1 Jul 2011 23:16:47 +0200
-Subject: [PATCH 49/79] SPI: Allow specifying the parsers for SPI flash
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- include/linux/spi/flash.h |    5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
---- a/include/linux/spi/flash.h
-+++ b/include/linux/spi/flash.h
-@@ -2,7 +2,7 @@
- #define LINUX_SPI_FLASH_H
- 
- struct mtd_partition;
--
-+struct mtd_part_parser_data;
- /**
-  * struct flash_platform_data: board-specific flash data
-  * @name: optional flash device name (eg, as used with mtdparts=)
-@@ -10,6 +10,8 @@ struct mtd_partition;
-  * @nr_parts: number of mtd_partitions for static partitoning
-  * @type: optional flash device type (e.g. m25p80 vs m25p64), for use
-  *	with chips that can't be queried for JEDEC or other IDs
-+ * @part_probe_types: optional list of MTD parser names to use for
-+ *	partitioning
-  *
-  * Board init code (in arch/.../mach-xxx/board-yyy.c files) can
-  * provide information about SPI flash parts (such as DataFlash) to
-@@ -25,6 +27,7 @@ struct flash_platform_data {
- 
- 	char		*type;
- 
-+	const char	**part_probe_types;
- 	/* we'll likely add more ... use JEDEC IDs, etc */
- };
- 

target/linux/brcm63xx/patches-3.10/202-MTD-DEVICES-m25p80-use-parsers-if-provided-in-flash-.patch

@@ -1,23 +0,0 @@
-From c7c3c338cb25d7f55ddb3f6bfbf3572758ca3896 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Thu, 10 Nov 2011 16:53:08 +0100
-Subject: [PATCH 50/79] MTD: DEVICES: m25p80: use parsers if provided in flash
- platform data
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- drivers/mtd/devices/m25p80.c |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -1093,7 +1093,8 @@ static int m25p_probe(struct spi_device
- 	/* partitions should match sector boundaries; and it may be good to
- 	 * use readonly partitions for writeprotected sectors (BP2..BP0).
- 	 */
--	return mtd_device_parse_register(&flash->mtd, NULL, &ppdata,
-+	return mtd_device_parse_register(&flash->mtd,
-+			data ? data->part_probe_types : NULL, &ppdata,
- 			data ? data->parts : NULL,
- 			data ? data->nr_parts : 0);
- }

target/linux/brcm63xx/patches-3.10/203-MTD-DEVICES-m25p80-add-support-for-limiting-reads.patch

@@ -1,92 +0,0 @@
-From 5fb4e8d7287ac8fcb33aae8b1e9e22c5a3c392bd Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Thu, 10 Nov 2011 17:33:40 +0100
-Subject: [PATCH 51/79] MTD: DEVICES: m25p80: add support for limiting reads
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- drivers/mtd/devices/m25p80.c |   29 +++++++++++++++++++++++++++--
- include/linux/spi/flash.h    |    4 ++++
- 2 files changed, 31 insertions(+), 2 deletions(-)
-
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -93,6 +93,7 @@ struct m25p {
- 	u8			erase_opcode;
- 	u8			*command;
- 	bool			fast_read;
-+	int			max_transfer_len;
- };
- 
- static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
-@@ -337,10 +338,9 @@ static int m25p80_erase(struct mtd_info
-  * Read an address range from the flash chip.  The address range
-  * may be any size provided it is within the physical boundaries.
-  */
--static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
-+static int __m25p80_read(struct m25p *flash, loff_t from, size_t len,
- 	size_t *retlen, u_char *buf)
- {
--	struct m25p *flash = mtd_to_m25p(mtd);
- 	struct spi_transfer t[2];
- 	struct spi_message m;
- 	uint8_t opcode;
-@@ -392,6 +392,28 @@ static int m25p80_read(struct mtd_info *
- 	return 0;
- }
- 
-+static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
-+	size_t *retlen, u_char *buf)
-+{
-+	struct m25p *flash = mtd_to_m25p(mtd);
-+	size_t off;
-+	size_t read_len = flash->max_transfer_len;
-+	size_t part_len;
-+	int ret = 0;
-+
-+	if (!read_len)
-+		return __m25p80_read(flash, from, len, retlen, buf);
-+
-+	*retlen = 0;
-+
-+	for (off = 0; off < len && !ret; off += read_len) {
-+		ret = __m25p80_read(flash, from + off, min(len - off, read_len),
-+				    &part_len, buf + off);
-+			*retlen += part_len;
-+	}
-+
-+	return ret;
-+}
- /*
-  * Write an address range to the flash chip.  Data must be written in
-  * FLASH_PAGESIZE chunks.  The address range may be any size provided
-@@ -988,6 +1010,9 @@ static int m25p_probe(struct spi_device
- 		return -ENOMEM;
- 	}
- 
-+	if (data)
-+		flash->max_transfer_len = data->max_transfer_len;
-+
- 	flash->spi = spi;
- 	mutex_init(&flash->lock);
- 	dev_set_drvdata(&spi->dev, flash);
---- a/include/linux/spi/flash.h
-+++ b/include/linux/spi/flash.h
-@@ -13,6 +13,8 @@ struct mtd_part_parser_data;
-  * @part_probe_types: optional list of MTD parser names to use for
-  *	partitioning
-  *
-+ * @max_transfer_len: option maximum read/write length limitation for
-+ *	SPI controllers not able to transfer any length commands.
-  * Board init code (in arch/.../mach-xxx/board-yyy.c files) can
-  * provide information about SPI flash parts (such as DataFlash) to
-  * help set up the device and its appropriate default partitioning.
-@@ -28,6 +30,8 @@ struct flash_platform_data {
- 	char		*type;
- 
- 	const char	**part_probe_types;
-+
-+	unsigned int	max_transfer_len;
- 	/* we'll likely add more ... use JEDEC IDs, etc */
- };
- 

target/linux/brcm63xx/patches-3.10/204-USB-OHCI-allow-other-arches-to-use-the-BE-frame-numb.patch

@@ -1,31 +0,0 @@
-From b2f399dcd674a692a64bb3b300b77b78ae57b530 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 12 Jan 2014 16:47:35 +0100
-Subject: [PATCH] USB: OHCI: allow other arches to use the BE frame number
- quirk
-
-Intead of guarding it with a certain PPC SoC and expanding the list
-for each SoC requiring it, just guard it with USB_OHCI_BIG_ENDIAN_DESC.
-
-This makes it less suprising that passing no_big_frame_no = 1 for the
-platform data does not do what expected (or
-
-Checking it for all big endian descriptor setups should not impact
-performance much as USB1.1 is rather slow anyway.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- drivers/usb/host/ohci.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/usb/host/ohci.h
-+++ b/drivers/usb/host/ohci.h
-@@ -649,7 +649,7 @@ static inline u32 hc32_to_cpup (const st
-  * some big-endian SOC implementations.  Same thing happens with PSW access.
-  */
- 
--#ifdef CONFIG_PPC_MPC52xx
-+#ifdef CONFIG_USB_OHCI_BIG_ENDIAN_DESC
- #define big_endian_frame_no_quirk(ohci)	(ohci->flags & OHCI_QUIRK_FRAME_NO)
- #else
- #define big_endian_frame_no_quirk(ohci)	0

target/linux/brcm63xx/patches-3.10/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch

@@ -1,65 +0,0 @@
-From 6ac09efa8f0e189ffe7dd7b0889289de56ee44cc Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 19 Jan 2014 12:18:03 +0100
-Subject: [PATCH] USB: EHCI: allow limiting ports for ehci-platform
-
-In the same way as the ohci platform driver allows limiting ports,
-enable the same for ehci. This prevents a mismatch in the available
-ports between ehci/ohci on USB 2.0 controllers.
-
-This is needed if the USB host controller always reports the maximum
-number of ports regardless of the number of available ports (because
-one might be set to be usb device).
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- drivers/usb/host/ehci-hcd.c      | 4 ++++
- drivers/usb/host/ehci-platform.c | 2 ++
- drivers/usb/host/ehci.h          | 1 +
- include/linux/usb/ehci_pdriver.h | 1 +
- 4 files changed, 8 insertions(+)
-
---- a/drivers/usb/host/ehci-hcd.c
-+++ b/drivers/usb/host/ehci-hcd.c
-@@ -661,6 +661,10 @@ int ehci_setup(struct usb_hcd *hcd)
- 
- 	/* cache this readonly data; minimize chip reads */
- 	ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
-+	if (ehci->num_ports) {
-+		ehci->hcs_params &= ~0xf; /* bits 3:0, ports on HC */
-+		ehci->hcs_params |= ehci->num_ports;
-+	}
- 
- 	ehci->sbrn = HCD_USB2;
- 
---- a/drivers/usb/host/ehci-platform.c
-+++ b/drivers/usb/host/ehci-platform.c
-@@ -48,6 +48,8 @@ static int ehci_platform_reset(struct us
- 	ehci->big_endian_desc = pdata->big_endian_desc;
- 	ehci->big_endian_mmio = pdata->big_endian_mmio;
- 	ehci->ignore_oc = pdata->ignore_oc;
-+	if (pdata->num_ports && pdata->num_ports <= 15)
-+		ehci->num_ports = pdata->num_ports;
- 
- 	ehci->caps = hcd->regs + pdata->caps_offset;
- 	retval = ehci_setup(hcd);
---- a/drivers/usb/host/ehci.h
-+++ b/drivers/usb/host/ehci.h
-@@ -188,6 +188,7 @@ struct ehci_hcd {			/* one per controlle
- 	u32			command;
- 
- 	/* SILICON QUIRKS */
-+	unsigned int		num_ports;
- 	unsigned		no_selective_suspend:1;
- 	unsigned		has_fsl_port_bug:1; /* FreeScale */
- 	unsigned		big_endian_mmio:1;
---- a/include/linux/usb/ehci_pdriver.h
-+++ b/include/linux/usb/ehci_pdriver.h
-@@ -37,6 +37,7 @@
-  */
- struct usb_ehci_pdata {
- 	int		caps_offset;
-+	unsigned int	num_ports;
- 	unsigned	has_tt:1;
- 	unsigned	has_synopsys_hc_bug:1;
- 	unsigned	big_endian_desc:1;

target/linux/brcm63xx/patches-3.10/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch

@@ -1,493 +0,0 @@
-From 5a50cb0d53344a2429831b00925d6183d4d332e1 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 9 Mar 2014 03:54:05 +0100
-Subject: [PATCH 40/44] MIPS: BCM63XX: move device registration code into its
- own file
-
-Move device registration code into its own file to allow sharing it
-between board implementations.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/boards/Makefile         |   1 +
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 188 +-------------------------
- arch/mips/bcm63xx/boards/board_common.c   | 215 ++++++++++++++++++++++++++++++
- arch/mips/bcm63xx/boards/board_common.h   |   8 ++
- 4 files changed, 223 insertions(+), 183 deletions(-)
- create mode 100644 arch/mips/bcm63xx/boards/board_common.c
- create mode 100644 arch/mips/bcm63xx/boards/board_common.h
-
---- a/arch/mips/bcm63xx/boards/Makefile
-+++ b/arch/mips/bcm63xx/boards/Makefile
-@@ -1 +1,2 @@
-+obj-y					+= board_common.o
- obj-$(CONFIG_BOARD_BCM963XX)		+= board_bcm963xx.o
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -10,35 +10,22 @@
- #include <linux/init.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
--#include <linux/platform_device.h>
--#include <linux/ssb/ssb.h>
- #include <asm/addrspace.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
--#include <bcm63xx_dev_uart.h>
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_nvram.h>
--#include <bcm63xx_dev_pci.h>
--#include <bcm63xx_dev_enet.h>
--#include <bcm63xx_dev_dsp.h>
--#include <bcm63xx_dev_flash.h>
--#include <bcm63xx_dev_hsspi.h>
--#include <bcm63xx_dev_pcmcia.h>
--#include <bcm63xx_dev_spi.h>
--#include <bcm63xx_dev_usb_ehci.h>
--#include <bcm63xx_dev_usb_ohci.h>
--#include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
- 
-+#include "board_common.h"
-+
- #include <uapi/linux/bcm933xx_hcs.h>
- 
- #define PFX	"board_bcm963xx: "
- 
- #define HCS_OFFSET_128K			0x20000
- 
--static struct board_info board;
--
- /*
-  * known 3368 boards
-  */
-@@ -711,52 +698,6 @@ static const struct board_info __initcon
- };
- 
- /*
-- * Register a sane SPROMv2 to make the on-board
-- * bcm4318 WLAN work
-- */
--#ifdef CONFIG_SSB_PCIHOST
--static struct ssb_sprom bcm63xx_sprom = {
--	.revision		= 0x02,
--	.board_rev		= 0x17,
--	.country_code		= 0x0,
--	.ant_available_bg	= 0x3,
--	.pa0b0			= 0x15ae,
--	.pa0b1			= 0xfa85,
--	.pa0b2			= 0xfe8d,
--	.pa1b0			= 0xffff,
--	.pa1b1			= 0xffff,
--	.pa1b2			= 0xffff,
--	.gpio0			= 0xff,
--	.gpio1			= 0xff,
--	.gpio2			= 0xff,
--	.gpio3			= 0xff,
--	.maxpwr_bg		= 0x004c,
--	.itssi_bg		= 0x00,
--	.boardflags_lo		= 0x2848,
--	.boardflags_hi		= 0x0000,
--};
--
--int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
--{
--	if (bus->bustype == SSB_BUSTYPE_PCI) {
--		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
--		return 0;
--	} else {
--		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
--		return -EINVAL;
--	}
--}
--#endif
--
--/*
-- * return board name for /proc/cpuinfo
-- */
--const char *board_get_name(void)
--{
--	return board.name;
--}
--
--/*
-  * early init callback, read nvram data from flash and checksum it
-  */
- void __init board_prom_init(void)
-@@ -801,141 +742,16 @@ void __init board_prom_init(void)
- 		if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
- 			continue;
- 		/* copy, board desc array is marked initdata */
--		memcpy(&board, bcm963xx_boards[i], sizeof(board));
-+		board_early_setup(bcm963xx_boards[i]);
- 		break;
- 	}
- 
--	/* bail out if board is not found, will complain later */
--	if (!board.name[0]) {
-+	/* warn if board is not found, will complain later */
-+	if (i == ARRAY_SIZE(bcm963xx_boards)) {
- 		char name[17];
- 		memcpy(name, board_name, 16);
- 		name[16] = 0;
- 		printk(KERN_ERR PFX "unknown bcm963xx board: %s\n",
- 		       name);
--		return;
--	}
--
--	/* setup pin multiplexing depending on board enabled device,
--	 * this has to be done this early since PCI init is done
--	 * inside arch_initcall */
--	val = 0;
--
--#ifdef CONFIG_PCI
--	if (board.has_pci) {
--		bcm63xx_pci_enabled = 1;
--		if (BCMCPU_IS_6348())
--			val |= GPIO_MODE_6348_G2_PCI;
--	}
--#endif
--
--	if (board.has_pccard) {
--		if (BCMCPU_IS_6348())
--			val |= GPIO_MODE_6348_G1_MII_PCCARD;
--	}
--
--	if (board.has_enet0 && !board.enet0.use_internal_phy) {
--		if (BCMCPU_IS_6348())
--			val |= GPIO_MODE_6348_G3_EXT_MII |
--				GPIO_MODE_6348_G0_EXT_MII;
--	}
--
--	if (board.has_enet1 && !board.enet1.use_internal_phy) {
--		if (BCMCPU_IS_6348())
--			val |= GPIO_MODE_6348_G3_EXT_MII |
--				GPIO_MODE_6348_G0_EXT_MII;
--	}
--
--	bcm_gpio_writel(val, GPIO_MODE_REG);
--}
--
--/*
-- * second stage init callback, good time to panic if we couldn't
-- * identify on which board we're running since early printk is working
-- */
--void __init board_setup(void)
--{
--	if (!board.name[0])
--		panic("unable to detect bcm963xx board");
--	printk(KERN_INFO PFX "board name: %s\n", board.name);
--
--	/* make sure we're running on expected cpu */
--	if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
--		panic("unexpected CPU for bcm963xx board");
--}
--
--static struct gpio_led_platform_data bcm63xx_led_data;
--
--static struct platform_device bcm63xx_gpio_leds = {
--	.name			= "leds-gpio",
--	.id			= 0,
--	.dev.platform_data	= &bcm63xx_led_data,
--};
--
--/*
-- * third stage init callback, register all board devices.
-- */
--int __init board_register_devices(void)
--{
--	if (board.has_uart0)
--		bcm63xx_uart_register(0);
--
--	if (board.has_uart1)
--		bcm63xx_uart_register(1);
--
--	if (board.has_pccard)
--		bcm63xx_pcmcia_register();
--
--	if (board.has_enet0 &&
--	    !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
--		bcm63xx_enet_register(0, &board.enet0);
--
--	if (board.has_enet1 &&
--	    !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
--		bcm63xx_enet_register(1, &board.enet1);
--
--	if (board.has_enetsw &&
--	    !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
--		bcm63xx_enetsw_register(&board.enetsw);
--
--	if (board.has_usbd)
--		bcm63xx_usbd_register(&board.usbd);
--
--	if (board.has_ehci0)
--		bcm63xx_ehci_register();
--
--	if (board.has_ohci0)
--		bcm63xx_ohci_register();
--
--	if (board.has_dsp)
--		bcm63xx_dsp_register(&board.dsp);
--
--	/* Generate MAC address for WLAN and register our SPROM,
--	 * do this after registering enet devices
--	 */
--#ifdef CONFIG_SSB_PCIHOST
--	if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
--		memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
--		memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
--		if (ssb_arch_register_fallback_sprom(
--				&bcm63xx_get_fallback_sprom) < 0)
--			pr_err(PFX "failed to register fallback SPROM\n");
- 	}
--#endif
--
--	bcm63xx_spi_register();
--
--	bcm63xx_hsspi_register();
--
--	bcm63xx_flash_register();
--
--	bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
--	bcm63xx_led_data.leds = board.leds;
--
--	platform_device_register(&bcm63xx_gpio_leds);
--
--	if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
--		gpio_request_one(board.ephy_reset_gpio,
--				board.ephy_reset_gpio_flags, "ephy-reset");
--
--	return 0;
- }
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -0,0 +1,217 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <[email protected]>
-+ * Copyright (C) 2008 Florian Fainelli <[email protected]>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/platform_device.h>
-+#include <linux/ssb/ssb.h>
-+#include <asm/addrspace.h>
-+#include <bcm63xx_board.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_dev_uart.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_nvram.h>
-+#include <bcm63xx_dev_pci.h>
-+#include <bcm63xx_dev_enet.h>
-+#include <bcm63xx_dev_dsp.h>
-+#include <bcm63xx_dev_flash.h>
-+#include <bcm63xx_dev_hsspi.h>
-+#include <bcm63xx_dev_pcmcia.h>
-+#include <bcm63xx_dev_spi.h>
-+#include <bcm63xx_dev_usb_ehci.h>
-+#include <bcm63xx_dev_usb_ohci.h>
-+#include <bcm63xx_dev_usb_usbd.h>
-+#include <board_bcm963xx.h>
-+
-+#define PFX	"board: "
-+
-+static struct board_info board;
-+
-+/*
-+ * Register a sane SPROMv2 to make the on-board
-+ * bcm4318 WLAN work
-+ */
-+#ifdef CONFIG_SSB_PCIHOST
-+static struct ssb_sprom bcm63xx_sprom = {
-+	.revision		= 0x02,
-+	.board_rev		= 0x17,
-+	.country_code		= 0x0,
-+	.ant_available_bg	= 0x3,
-+	.pa0b0			= 0x15ae,
-+	.pa0b1			= 0xfa85,
-+	.pa0b2			= 0xfe8d,
-+	.pa1b0			= 0xffff,
-+	.pa1b1			= 0xffff,
-+	.pa1b2			= 0xffff,
-+	.gpio0			= 0xff,
-+	.gpio1			= 0xff,
-+	.gpio2			= 0xff,
-+	.gpio3			= 0xff,
-+	.maxpwr_bg		= 0x004c,
-+	.itssi_bg		= 0x00,
-+	.boardflags_lo		= 0x2848,
-+	.boardflags_hi		= 0x0000,
-+};
-+
-+int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
-+{
-+	if (bus->bustype == SSB_BUSTYPE_PCI) {
-+		memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+		return 0;
-+	} else {
-+		printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-+		return -EINVAL;
-+	}
-+}
-+#endif
-+
-+/*
-+ * return board name for /proc/cpuinfo
-+ */
-+const char *board_get_name(void)
-+{
-+	return board.name;
-+}
-+
-+/*
-+ * setup board for device registration
-+ */
-+void __init board_early_setup(const struct board_info *target)
-+{
-+	u32 val;
-+
-+	memcpy(&board, target, sizeof(board));
-+
-+	/* setup pin multiplexing depending on board enabled device,
-+	 * this has to be done this early since PCI init is done
-+	 * inside arch_initcall */
-+	val = 0;
-+
-+#ifdef CONFIG_PCI
-+	if (board.has_pci) {
-+		bcm63xx_pci_enabled = 1;
-+		if (BCMCPU_IS_6348())
-+			val |= GPIO_MODE_6348_G2_PCI;
-+	}
-+#endif
-+
-+	if (board.has_pccard) {
-+		if (BCMCPU_IS_6348())
-+			val |= GPIO_MODE_6348_G1_MII_PCCARD;
-+	}
-+
-+	if (board.has_enet0 && !board.enet0.use_internal_phy) {
-+		if (BCMCPU_IS_6348())
-+			val |= GPIO_MODE_6348_G3_EXT_MII |
-+				GPIO_MODE_6348_G0_EXT_MII;
-+	}
-+
-+	if (board.has_enet1 && !board.enet1.use_internal_phy) {
-+		if (BCMCPU_IS_6348())
-+			val |= GPIO_MODE_6348_G3_EXT_MII |
-+				GPIO_MODE_6348_G0_EXT_MII;
-+	}
-+
-+	bcm_gpio_writel(val, GPIO_MODE_REG);
-+}
-+
-+
-+/*
-+ * second stage init callback, good time to panic if we couldn't
-+ * identify on which board we're running since early printk is working
-+ */
-+void __init board_setup(void)
-+{
-+	if (!board.name[0])
-+		panic("unable to detect bcm963xx board");
-+	printk(KERN_INFO PFX "board name: %s\n", board.name);
-+
-+	/* make sure we're running on expected cpu */
-+	if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
-+		panic("unexpected CPU for bcm963xx board");
-+}
-+
-+static struct gpio_led_platform_data bcm63xx_led_data;
-+
-+static struct platform_device bcm63xx_gpio_leds = {
-+	.name			= "leds-gpio",
-+	.id			= 0,
-+	.dev.platform_data	= &bcm63xx_led_data,
-+};
-+
-+/*
-+ * third stage init callback, register all board devices.
-+ */
-+int __init board_register_devices(void)
-+{
-+	if (board.has_uart0)
-+		bcm63xx_uart_register(0);
-+
-+	if (board.has_uart1)
-+		bcm63xx_uart_register(1);
-+
-+	if (board.has_pccard)
-+		bcm63xx_pcmcia_register();
-+
-+	if (board.has_enet0 &&
-+	    !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
-+		bcm63xx_enet_register(0, &board.enet0);
-+
-+	if (board.has_enet1 &&
-+	    !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
-+		bcm63xx_enet_register(1, &board.enet1);
-+
-+	if (board.has_enetsw &&
-+	    !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
-+		bcm63xx_enetsw_register(&board.enetsw);
-+
-+	if (board.has_usbd)
-+		bcm63xx_usbd_register(&board.usbd);
-+
-+	if (board.has_ehci0)
-+		bcm63xx_ehci_register();
-+
-+	if (board.has_ohci0)
-+		bcm63xx_ohci_register();
-+
-+	if (board.has_dsp)
-+		bcm63xx_dsp_register(&board.dsp);
-+
-+	/* Generate MAC address for WLAN and register our SPROM,
-+	 * do this after registering enet devices
-+	 */
-+#ifdef CONFIG_SSB_PCIHOST
-+	if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
-+		memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-+		memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-+		if (ssb_arch_register_fallback_sprom(
-+				&bcm63xx_get_fallback_sprom) < 0)
-+			pr_err(PFX "failed to register fallback SPROM\n");
-+	}
-+#endif
-+
-+	bcm63xx_spi_register();
-+
-+	bcm63xx_hsspi_register();
-+
-+	bcm63xx_flash_register();
-+
-+	bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
-+	bcm63xx_led_data.leds = board.leds;
-+
-+	platform_device_register(&bcm63xx_gpio_leds);
-+
-+	if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
-+		gpio_request_one(board.ephy_reset_gpio,
-+				board.ephy_reset_gpio_flags, "ephy-reset");
-+
-+	return 0;
-+}
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -0,0 +1,8 @@
-+#ifndef __BOARD_COMMON_H
-+#define __BOARD_COMMON_H
-+
-+#include <board_bcm963xx.h>
-+
-+void board_early_setup(const struct board_info *board);
-+
-+#endif /* __BOARD_COMMON_H */

target/linux/brcm63xx/patches-3.10/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch

@@ -1,100 +0,0 @@
-From 4e9c34a37bd3442b286ba55441bfe22c1ac5b65f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 9 Mar 2014 04:08:06 +0100
-Subject: [PATCH 41/44] MIPS: BCM63XX: pass a mac addresss allocator to board
- setup
-
-Pass a mac address allocator to board setup code to allow board
-implementations to work with third party bootloaders not using nvram
-for configuration storage.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c |  3 ++-
- arch/mips/bcm63xx/boards/board_common.c   | 16 ++++++++++------
- arch/mips/bcm63xx/boards/board_common.h   |  3 ++-
- 3 files changed, 14 insertions(+), 8 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -742,7 +742,8 @@ void __init board_prom_init(void)
- 		if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
- 			continue;
- 		/* copy, board desc array is marked initdata */
--		board_early_setup(bcm963xx_boards[i]);
-+		board_early_setup(bcm963xx_boards[i],
-+				  bcm63xx_nvram_get_mac_address);
- 		break;
- 	}
- 
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -18,7 +18,6 @@
- #include <bcm63xx_dev_uart.h>
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
--#include <bcm63xx_nvram.h>
- #include <bcm63xx_dev_pci.h>
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_dsp.h>
-@@ -81,15 +80,20 @@ const char *board_get_name(void)
- 	return board.name;
- }
- 
-+static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
-+
- /*
-  * setup board for device registration
-  */
--void __init board_early_setup(const struct board_info *target)
-+void __init board_early_setup(const struct board_info *target,
-+			      int (*get_mac_address)(u8 mac[ETH_ALEN]))
- {
- 	u32 val;
- 
- 	memcpy(&board, target, sizeof(board));
- 
-+	board_get_mac_address = get_mac_address;
-+
- 	/* setup pin multiplexing depending on board enabled device,
- 	 * this has to be done this early since PCI init is done
- 	 * inside arch_initcall */
-@@ -162,15 +166,15 @@ int __init board_register_devices(void)
- 		bcm63xx_pcmcia_register();
- 
- 	if (board.has_enet0 &&
--	    !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
-+	    !board_get_mac_address(board.enet0.mac_addr))
- 		bcm63xx_enet_register(0, &board.enet0);
- 
- 	if (board.has_enet1 &&
--	    !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
-+	    !board_get_mac_address(board.enet1.mac_addr))
- 		bcm63xx_enet_register(1, &board.enet1);
- 
- 	if (board.has_enetsw &&
--	    !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
-+	    !board_get_mac_address(board.enetsw.mac_addr))
- 		bcm63xx_enetsw_register(&board.enetsw);
- 
- 	if (board.has_usbd)
-@@ -189,7 +193,7 @@ int __init board_register_devices(void)
- 	 * do this after registering enet devices
- 	 */
- #ifdef CONFIG_SSB_PCIHOST
--	if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
-+	if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
- 		memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
- 		memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
- 		if (ssb_arch_register_fallback_sprom(
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -3,6 +3,7 @@
- 
- #include <board_bcm963xx.h>
- 
--void board_early_setup(const struct board_info *board);
-+void board_early_setup(const struct board_info *board,
-+		       int (*get_mac_address)(u8 mac[ETH_ALEN]));
- 
- #endif /* __BOARD_COMMON_H */

target/linux/brcm63xx/patches-3.10/300-reset_buttons.patch

@@ -1,135 +0,0 @@
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -10,6 +10,8 @@
- #include <linux/init.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
-+#include <linux/gpio_keys.h>
-+#include <linux/input.h>
- #include <asm/addrspace.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
-@@ -26,6 +28,9 @@
- 
- #define HCS_OFFSET_128K			0x20000
- 
-+#define BCM963XX_KEYS_POLL_INTERVAL	20
-+#define BCM963XX_KEYS_DEBOUNCE_INTERVAL	(BCM963XX_KEYS_POLL_INTERVAL * 3)
-+
- /*
-  * known 3368 boards
-  */
-@@ -367,6 +372,16 @@ static struct board_info __initdata boar
- 			.active_low	= 1,
- 		},
- 	},
-+	.buttons = {
-+		{
-+			.desc		= "reset",
-+			.gpio		= 33,
-+			.active_low	= 1,
-+			.type		= EV_KEY,
-+			.code		= KEY_RESTART,
-+			.debounce_interval = BCM963XX_KEYS_DEBOUNCE_INTERVAL,
-+		},
-+	},
- };
- 
- static struct board_info __initdata board_96348gw = {
-@@ -425,6 +440,16 @@ static struct board_info __initdata boar
- 			.active_low	= 1,
- 		},
- 	},
-+	.buttons = {
-+		{
-+			.desc		= "reset",
-+			.gpio		= 36,
-+			.active_low	= 1,
-+			.type		= EV_KEY,
-+			.code		= KEY_RESTART,
-+			.debounce_interval = BCM963XX_KEYS_DEBOUNCE_INTERVAL,
-+		},
-+	},
- };
- 
- static struct board_info __initdata board_FAST2404 = {
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -12,6 +12,7 @@
- #include <linux/string.h>
- #include <linux/platform_device.h>
- #include <linux/ssb/ssb.h>
-+#include <linux/gpio_keys.h>
- #include <asm/addrspace.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
-@@ -32,6 +33,8 @@
- 
- #define PFX	"board: "
- 
-+#define BCM963XX_KEYS_POLL_INTERVAL	20
-+
- static struct board_info board;
- 
- /*
-@@ -151,11 +154,23 @@ static struct platform_device bcm63xx_gp
- 	.dev.platform_data	= &bcm63xx_led_data,
- };
- 
-+static struct gpio_keys_platform_data bcm63xx_gpio_keys_data = {
-+	.poll_interval  = BCM963XX_KEYS_POLL_INTERVAL,
-+};
-+
-+static struct platform_device bcm63xx_gpio_keys_device = {
-+	.name		= "gpio-keys-polled",
-+	.id		= 0,
-+	.dev.platform_data = &bcm63xx_gpio_keys_data,
-+};
-+
- /*
-  * third stage init callback, register all board devices.
-  */
- int __init board_register_devices(void)
- {
-+	int button_count = 0;
-+
- 	if (board.has_uart0)
- 		bcm63xx_uart_register(0);
- 
-@@ -217,5 +232,16 @@ int __init board_register_devices(void)
- 		gpio_request_one(board.ephy_reset_gpio,
- 				board.ephy_reset_gpio_flags, "ephy-reset");
- 
-+	/* count number of BUTTONs defined by this device */
-+	while (button_count < ARRAY_SIZE(board.buttons) && board.buttons[button_count].desc)
-+		button_count++;
-+
-+	if (button_count) {
-+		bcm63xx_gpio_keys_data.nbuttons = button_count;
-+		bcm63xx_gpio_keys_data.buttons = board.buttons;
-+
-+		platform_device_register(&bcm63xx_gpio_keys_device);
-+	}
-+
- 	return 0;
- }
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -3,6 +3,7 @@
- 
- #include <linux/types.h>
- #include <linux/gpio.h>
-+#include <linux/gpio_keys.h>
- #include <linux/leds.h>
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_usb_usbd.h>
-@@ -48,6 +49,9 @@ struct board_info {
- 	/* GPIO LEDs */
- 	struct gpio_led leds[5];
- 
-+	/* Buttons */
-+	struct gpio_keys_button buttons[4];
-+
- 	/* External PHY reset GPIO */
- 	unsigned int ephy_reset_gpio;
- 

target/linux/brcm63xx/patches-3.10/301-led_count.patch

@@ -1,41 +0,0 @@
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -170,6 +170,7 @@ static struct platform_device bcm63xx_gp
- int __init board_register_devices(void)
- {
- 	int button_count = 0;
-+	int led_count = 0;
- 
- 	if (board.has_uart0)
- 		bcm63xx_uart_register(0);
-@@ -223,10 +224,16 @@ int __init board_register_devices(void)
- 
- 	bcm63xx_flash_register();
- 
--	bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
--	bcm63xx_led_data.leds = board.leds;
-+	/* count number of LEDs defined by this device */
-+	while (led_count < ARRAY_SIZE(board.leds) && board.leds[led_count].name)
-+		led_count++;
-+
-+	if (led_count) {
-+		bcm63xx_led_data.num_leds = led_count;
-+		bcm63xx_led_data.leds = board.leds;
- 
--	platform_device_register(&bcm63xx_gpio_leds);
-+		platform_device_register(&bcm63xx_gpio_leds);
-+	}
- 
- 	if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
- 		gpio_request_one(board.ephy_reset_gpio,
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -47,7 +47,7 @@ struct board_info {
- 	struct bcm63xx_dsp_platform_data dsp;
- 
- 	/* GPIO LEDs */
--	struct gpio_led leds[5];
-+	struct gpio_led leds[14];
- 
- 	/* Buttons */
- 	struct gpio_keys_button buttons[4];

target/linux/brcm63xx/patches-3.10/302-extended-platform-devices.patch

@@ -1,25 +0,0 @@
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -222,6 +222,9 @@ int __init board_register_devices(void)
- 
- 	bcm63xx_hsspi_register();
- 
-+	if (board.num_devs)
-+		platform_add_devices(board.devs, board.num_devs);
-+
- 	bcm63xx_flash_register();
- 
- 	/* count number of LEDs defined by this device */
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -57,6 +57,10 @@ struct board_info {
- 
- 	/* External PHY reset GPIO flags from gpio.h */
- 	unsigned long ephy_reset_gpio_flags;
-+
-+	/* Additional platform devices */
-+	struct platform_device **devs;
-+	unsigned int	num_devs;
- };
- 
- #endif /* ! BOARD_BCM963XX_H_ */

target/linux/brcm63xx/patches-3.10/303-spi-board-info.patch

@@ -1,33 +0,0 @@
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -13,6 +13,7 @@
- #include <linux/platform_device.h>
- #include <linux/ssb/ssb.h>
- #include <linux/gpio_keys.h>
-+#include <linux/spi/spi.h>
- #include <asm/addrspace.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
-@@ -225,6 +226,9 @@ int __init board_register_devices(void)
- 	if (board.num_devs)
- 		platform_add_devices(board.devs, board.num_devs);
- 
-+	if (board.num_spis)
-+		spi_register_board_info(board.spis, board.num_spis);
-+
- 	bcm63xx_flash_register();
- 
- 	/* count number of LEDs defined by this device */
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -61,6 +61,10 @@ struct board_info {
- 	/* Additional platform devices */
- 	struct platform_device **devs;
- 	unsigned int	num_devs;
-+
-+	/* Additional platform devices */
-+	struct spi_board_info *spis;
-+	unsigned int	num_spis;
- };
- 
- #endif /* ! BOARD_BCM963XX_H_ */

target/linux/brcm63xx/patches-3.10/304-boardid_fixup.patch

@@ -1,62 +0,0 @@
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -23,6 +23,7 @@
- #include "board_common.h"
- 
- #include <uapi/linux/bcm933xx_hcs.h>
-+#include <uapi/linux/bcm963xx_tag.h>
- 
- #define PFX	"board_bcm963xx: "
- 
-@@ -31,6 +32,9 @@
- #define BCM963XX_KEYS_POLL_INTERVAL	20
- #define BCM963XX_KEYS_DEBOUNCE_INTERVAL	(BCM963XX_KEYS_POLL_INTERVAL * 3)
- 
-+#define CFE_OFFSET_64K			0x10000
-+#define CFE_OFFSET_128K			0x20000
-+
- /*
-  * known 3368 boards
-  */
-@@ -722,6 +726,30 @@ static const struct board_info __initcon
- #endif
- };
- 
-+static void __init boardid_fixup(u8 *boot_addr)
-+{
-+	struct bcm_tag *tag = (struct bcm_tag *)(boot_addr + CFE_OFFSET_64K);
-+	char *board_name = (char *)bcm63xx_nvram_get_name();
-+
-+	/* check if bcm_tag is at 64k offset */
-+	if (strncmp(board_name, tag->board_id, BOARDID_LEN) != 0) {
-+		/* else try 128k */
-+		tag = (struct bcm_tag *)(boot_addr + CFE_OFFSET_128K);
-+		if (strncmp(board_name, tag->board_id, BOARDID_LEN) != 0) {
-+			/* No tag found */
-+			printk(KERN_DEBUG "No bcm_tag found!\n");
-+			return;
-+		}
-+	}
-+	/* check if we should override the boardid */
-+	if (tag->information1[0] != '+')
-+		return;
-+
-+	strncpy(board_name, &tag->information1[1], BOARDID_LEN);
-+
-+	printk(KERN_INFO "Overriding boardid with '%s'\n", board_name);
-+}
-+
- /*
-  * early init callback, read nvram data from flash and checksum it
-  */
-@@ -760,6 +788,10 @@ void __init board_prom_init(void)
- 		hcs = (struct bcm_hcs *)boot_addr;
- 		board_name = hcs->filename;
- 	} else {
-+		if (strcmp(cfe_version, "unknown") != 0) {
-+			/* cfe present */
-+			boardid_fixup(boot_addr);
-+		}
- 		board_name = bcm63xx_nvram_get_name();
- 	}
- 	/* find board by name */

target/linux/brcm63xx/patches-3.10/308-board_leds_naming.patch

@@ -1,267 +0,0 @@
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -134,28 +134,28 @@ static struct board_info __initdata boar
- 
- 	.leds = {
- 		{
--			.name		= "adsl",
-+			.name		= "96338GW:green:adsl",
- 			.gpio		= 3,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ses",
-+			.name		= "96338GW:green:ses",
- 			.gpio		= 5,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ppp-fail",
-+			.name		= "96338GW:green:ppp-fail",
- 			.gpio		= 4,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "power",
-+			.name		= "96338GW:green:power",
- 			.gpio		= 0,
- 			.active_low	= 1,
- 			.default_trigger = "default-on",
- 		},
- 		{
--			.name		= "stop",
-+			.name		= "96338GW:green:stop",
- 			.gpio		= 1,
- 			.active_low	= 1,
- 		}
-@@ -175,28 +175,28 @@ static struct board_info __initdata boar
- 
- 	.leds = {
- 		{
--			.name		= "adsl",
-+			.name		= "96338W:green:adsl",
- 			.gpio		= 3,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ses",
-+			.name		= "96338W:green:ses",
- 			.gpio		= 5,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ppp-fail",
-+			.name		= "96338W:green:ppp-fail",
- 			.gpio		= 4,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "power",
-+			.name		= "96338W:green:power",
- 			.gpio		= 0,
- 			.active_low	= 1,
- 			.default_trigger = "default-on",
- 		},
- 		{
--			.name		= "stop",
-+			.name		= "96338W:green:stop",
- 			.gpio		= 1,
- 			.active_low	= 1,
- 		},
-@@ -235,29 +235,29 @@ static struct board_info __initdata boar
- 
- 	.leds = {
- 		{
--			.name		= "adsl-fail",
-+			.name		= "96348R:green:adsl-fail",
- 			.gpio		= 2,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ppp",
-+			.name		= "96348R:green:ppp",
- 			.gpio		= 3,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ppp-fail",
-+			.name		= "96348R:green:ppp-fail",
- 			.gpio		= 4,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "power",
-+			.name		= "96348R:green:power",
- 			.gpio		= 0,
- 			.active_low	= 1,
- 			.default_trigger = "default-on",
- 
- 		},
- 		{
--			.name		= "stop",
-+			.name		= "96348R:green:stop",
- 			.gpio		= 1,
- 			.active_low	= 1,
- 		},
-@@ -296,28 +296,28 @@ static struct board_info __initdata boar
- 
- 	.leds = {
- 		{
--			.name		= "adsl-fail",
-+			.name		= "96348GW-10:green:adsl-fail",
- 			.gpio		= 2,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ppp",
-+			.name		= "96348GW-10:green:ppp",
- 			.gpio		= 3,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ppp-fail",
-+			.name		= "96348GW-10:green:ppp-fail",
- 			.gpio		= 4,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "power",
-+			.name		= "96348GW-10:green:power",
- 			.gpio		= 0,
- 			.active_low	= 1,
- 			.default_trigger = "default-on",
- 		},
- 		{
--			.name		= "stop",
-+			.name		= "96348GW-10:green:stop",
- 			.gpio		= 1,
- 			.active_low	= 1,
- 		},
-@@ -350,28 +350,28 @@ static struct board_info __initdata boar
- 
- 	.leds = {
- 		{
--			.name		= "adsl-fail",
-+			.name		= "96348GW-11:green:adsl-fail",
- 			.gpio		= 2,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ppp",
-+			.name		= "96348GW-11:green:ppp",
- 			.gpio		= 3,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ppp-fail",
-+			.name		= "96348GW-11:green:ppp-fail",
- 			.gpio		= 4,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "power",
-+			.name		= "96348GW-11:green:power",
- 			.gpio		= 0,
- 			.active_low	= 1,
- 			.default_trigger = "default-on",
- 		},
- 		{
--			.name		= "stop",
-+			.name		= "96348GW-11:green:stop",
- 			.gpio		= 1,
- 			.active_low	= 1,
- 		},
-@@ -418,28 +418,28 @@ static struct board_info __initdata boar
- 
- 	.leds = {
- 		{
--			.name		= "adsl-fail",
-+			.name		= "96348GW:green:adsl-fail",
- 			.gpio		= 2,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ppp",
-+			.name		= "96348GW:green:ppp",
- 			.gpio		= 3,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ppp-fail",
-+			.name		= "96348GW:green:ppp-fail",
- 			.gpio		= 4,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "power",
-+			.name		= "96348GW:green:power",
- 			.gpio		= 0,
- 			.active_low	= 1,
- 			.default_trigger = "default-on",
- 		},
- 		{
--			.name		= "stop",
-+			.name		= "96348GW:green:stop",
- 			.gpio		= 1,
- 			.active_low	= 1,
- 		},
-@@ -571,27 +571,27 @@ static struct board_info __initdata boar
- 
- 	.leds = {
- 		{
--			.name		= "adsl-fail",
-+			.name		= "96358VW:green:adsl-fail",
- 			.gpio		= 15,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ppp",
-+			.name		= "96358VW:green:ppp",
- 			.gpio		= 22,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ppp-fail",
-+			.name		= "96358VW:green:ppp-fail",
- 			.gpio		= 23,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "power",
-+			.name		= "96358VW:green:power",
- 			.gpio		= 4,
- 			.default_trigger = "default-on",
- 		},
- 		{
--			.name		= "stop",
-+			.name		= "96358VW:green:stop",
- 			.gpio		= 5,
- 		},
- 	},
-@@ -623,22 +623,22 @@ static struct board_info __initdata boar
- 
- 	.leds = {
- 		{
--			.name		= "adsl",
-+			.name		= "96358VW2:green:adsl",
- 			.gpio		= 22,
- 			.active_low	= 1,
- 		},
- 		{
--			.name		= "ppp-fail",
-+			.name		= "96358VW2:green:ppp-fail",
- 			.gpio		= 23,
- 		},
- 		{
--			.name		= "power",
-+			.name		= "96358VW2:green:power",
- 			.gpio		= 5,
- 			.active_low	= 1,
- 			.default_trigger = "default-on",
- 		},
- 		{
--			.name		= "stop",
-+			.name		= "96358VW2:green:stop",
- 			.gpio		= 4,
- 			.active_low	= 1,
- 		},

target/linux/brcm63xx/patches-3.10/309-cfe_version_mod.patch

@@ -1,27 +0,0 @@
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -775,10 +775,20 @@ void __init board_prom_init(void)
- 
- 	/* dump cfe version */
- 	cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
--	if (!memcmp(cfe, "cfe-v", 5))
--		snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
--			 cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
--	else
-+	if (strstarts(cfe, "cfe-")) {
-+		if(cfe[4] == 'v') {
-+			if(cfe[5] == 'd')
-+				snprintf(cfe_version, 11, "%s", (char *) &cfe[5]);
-+			else if (cfe[10] > 0)
-+				snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u-%u",
-+					 cfe[5], cfe[6], cfe[7], cfe[8], cfe[9], cfe[10]);
-+			else
-+				snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
-+					 cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
-+		} else {
-+			snprintf(cfe_version, 12, "%s", (char *) &cfe[4]);
-+		}
-+	} else
- 		strcpy(cfe_version, "unknown");
- 	printk(KERN_INFO PFX "CFE version: %s\n", cfe_version);
- 

target/linux/brcm63xx/patches-3.10/310-MIPS-BCM63XX-remove-RUNTIME_DETECT-code-from-registe.patch

@@ -1,61 +0,0 @@
-From 082a49f0490008b999db80e3ccf1521c7dd21cec Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Mon, 2 Dec 2013 12:32:44 +0100
-Subject: [PATCH 1/8] MIPS: BCM63XX: remove !RUNTIME_DETECT code from register
- sets
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 33 ------------------------
- 1 file changed, 33 deletions(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -598,10 +598,6 @@ enum bcm63xx_regs_set {
- 
- extern const unsigned long *bcm63xx_regs_base;
- 
--#define __GEN_RSET_BASE(__cpu, __rset)					\
--	case RSET_## __rset :						\
--		return BCM_## __cpu ##_## __rset ##_BASE;
--
- #define __GEN_RSET(__cpu)						\
- 	switch (set) {							\
- 	__GEN_RSET_BASE(__cpu, DSL_LMEM)				\
-@@ -693,36 +689,7 @@ extern const unsigned long *bcm63xx_regs
- 
- static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
- {
--#ifdef BCMCPU_RUNTIME_DETECT
- 	return bcm63xx_regs_base[set];
--#else
--#ifdef CONFIG_BCM63XX_CPU_3368
--	__GEN_RSET(3368)
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6328
--	__GEN_RSET(6328)
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6338
--	__GEN_RSET(6338)
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6345
--	__GEN_RSET(6345)
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6348
--	__GEN_RSET(6348)
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6358
--	__GEN_RSET(6358)
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6362
--	__GEN_RSET(6362)
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6368
--	__GEN_RSET(6368)
--#endif
--#endif
--	/* unreached */
--	return 0;
- }
- 
- /*

target/linux/brcm63xx/patches-3.10/311-MIPS-BCM63XX-remove-RUNTIME_DETECT-from-irq-setup-co.patch

@@ -1,135 +0,0 @@
-From 07d0224576cbb2e6ac680b4ade4bba7a49bd0a07 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Mon, 2 Dec 2013 12:34:11 +0100
-Subject: [PATCH 2/8] MIPS: BCM63XX: remove !RUNTIME_DETECT from irq setup code
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/irq.c | 109 ------------------------------------------------
- 1 file changed, 109 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -26,114 +26,6 @@ static void __internal_irq_mask_64(unsig
- static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
- static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
- 
--#ifndef BCMCPU_RUNTIME_DETECT
--#ifdef CONFIG_BCM63XX_CPU_3368
--#define irq_stat_reg		PERF_IRQSTAT_3368_REG
--#define irq_mask_reg		PERF_IRQMASK_3368_REG
--#define irq_bits		32
--#define is_ext_irq_cascaded	0
--#define ext_irq_start		0
--#define ext_irq_end		0
--#define ext_irq_count		4
--#define ext_irq_cfg_reg1	PERF_EXTIRQ_CFG_REG_3368
--#define ext_irq_cfg_reg2	0
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6328
--#define irq_stat_reg		PERF_IRQSTAT_6328_REG
--#define irq_mask_reg		PERF_IRQMASK_6328_REG
--#define irq_bits		64
--#define is_ext_irq_cascaded	1
--#define ext_irq_start		(BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE)
--#define ext_irq_end		(BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE)
--#define ext_irq_count		4
--#define ext_irq_cfg_reg1	PERF_EXTIRQ_CFG_REG_6328
--#define ext_irq_cfg_reg2	0
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6338
--#define irq_stat_reg		PERF_IRQSTAT_6338_REG
--#define irq_mask_reg		PERF_IRQMASK_6338_REG
--#define irq_bits		32
--#define is_ext_irq_cascaded	0
--#define ext_irq_start		0
--#define ext_irq_end		0
--#define ext_irq_count		4
--#define ext_irq_cfg_reg1	PERF_EXTIRQ_CFG_REG_6338
--#define ext_irq_cfg_reg2	0
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6345
--#define irq_stat_reg		PERF_IRQSTAT_6345_REG
--#define irq_mask_reg		PERF_IRQMASK_6345_REG
--#define irq_bits		32
--#define is_ext_irq_cascaded	0
--#define ext_irq_start		0
--#define ext_irq_end		0
--#define ext_irq_count		4
--#define ext_irq_cfg_reg1	PERF_EXTIRQ_CFG_REG_6345
--#define ext_irq_cfg_reg2	0
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6348
--#define irq_stat_reg		PERF_IRQSTAT_6348_REG
--#define irq_mask_reg		PERF_IRQMASK_6348_REG
--#define irq_bits		32
--#define is_ext_irq_cascaded	0
--#define ext_irq_start		0
--#define ext_irq_end		0
--#define ext_irq_count		4
--#define ext_irq_cfg_reg1	PERF_EXTIRQ_CFG_REG_6348
--#define ext_irq_cfg_reg2	0
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6358
--#define irq_stat_reg		PERF_IRQSTAT_6358_REG
--#define irq_mask_reg		PERF_IRQMASK_6358_REG
--#define irq_bits		32
--#define is_ext_irq_cascaded	1
--#define ext_irq_start		(BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE)
--#define ext_irq_end		(BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE)
--#define ext_irq_count		4
--#define ext_irq_cfg_reg1	PERF_EXTIRQ_CFG_REG_6358
--#define ext_irq_cfg_reg2	0
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6362
--#define irq_stat_reg		PERF_IRQSTAT_6362_REG
--#define irq_mask_reg		PERF_IRQMASK_6362_REG
--#define irq_bits		64
--#define is_ext_irq_cascaded	1
--#define ext_irq_start		(BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE)
--#define ext_irq_end		(BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE)
--#define ext_irq_count		4
--#define ext_irq_cfg_reg1	PERF_EXTIRQ_CFG_REG_6362
--#define ext_irq_cfg_reg2	0
--#endif
--#ifdef CONFIG_BCM63XX_CPU_6368
--#define irq_stat_reg		PERF_IRQSTAT_6368_REG
--#define irq_mask_reg		PERF_IRQMASK_6368_REG
--#define irq_bits		64
--#define is_ext_irq_cascaded	1
--#define ext_irq_start		(BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE)
--#define ext_irq_end		(BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE)
--#define ext_irq_count		6
--#define ext_irq_cfg_reg1	PERF_EXTIRQ_CFG_REG_6368
--#define ext_irq_cfg_reg2	PERF_EXTIRQ_CFG_REG2_6368
--#endif
--
--#if irq_bits == 32
--#define dispatch_internal			__dispatch_internal
--#define internal_irq_mask			__internal_irq_mask_32
--#define internal_irq_unmask			__internal_irq_unmask_32
--#else
--#define dispatch_internal			__dispatch_internal_64
--#define internal_irq_mask			__internal_irq_mask_64
--#define internal_irq_unmask			__internal_irq_unmask_64
--#endif
--
--#define irq_stat_addr	(bcm63xx_regset_address(RSET_PERF) + irq_stat_reg)
--#define irq_mask_addr	(bcm63xx_regset_address(RSET_PERF) + irq_mask_reg)
--
--static inline void bcm63xx_init_irq(void)
--{
--}
--#else /* ! BCMCPU_RUNTIME_DETECT */
--
- static u32 irq_stat_addr, irq_mask_addr;
- static void (*dispatch_internal)(void);
- static int is_ext_irq_cascaded;
-@@ -234,7 +126,6 @@ static void bcm63xx_init_irq(void)
- 		internal_irq_unmask = __internal_irq_unmask_64;
- 	}
- }
--#endif /* ! BCMCPU_RUNTIME_DETECT */
- 
- static inline u32 get_ext_irq_perf_reg(int irq)
- {

target/linux/brcm63xx/patches-3.10/312-MIPS-BCM63XX-remove-RUNTIME_DETECT-from-reset-code.patch

@@ -1,85 +0,0 @@
-From 72578a46543821c5b9544842e45fcbed0c1b7eb8 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Tue, 3 Dec 2013 13:35:12 +0100
-Subject: [PATCH 3/8] MIPS: BCM63XX: remove !RUNTIME_DETECT from reset code
-
----
- arch/mips/bcm63xx/reset.c | 60 -----------------------------------------------
- 1 file changed, 60 deletions(-)
-
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -125,8 +125,6 @@
- #define BCM6368_RESET_PCIE	0
- #define BCM6368_RESET_PCIE_EXT	0
- 
--#ifdef BCMCPU_RUNTIME_DETECT
--
- /*
-  * core reset bits
-  */
-@@ -188,64 +186,6 @@ static int __init bcm63xx_reset_bits_ini
- 
- 	return 0;
- }
--#else
--
--#ifdef CONFIG_BCM63XX_CPU_3368
--static const u32 bcm63xx_reset_bits[] = {
--	__GEN_RESET_BITS_TABLE(3368)
--};
--#define reset_reg PERF_SOFTRESET_6358_REG
--#endif
--
--#ifdef CONFIG_BCM63XX_CPU_6328
--static const u32 bcm63xx_reset_bits[] = {
--	__GEN_RESET_BITS_TABLE(6328)
--};
--#define reset_reg PERF_SOFTRESET_6328_REG
--#endif
--
--#ifdef CONFIG_BCM63XX_CPU_6338
--static const u32 bcm63xx_reset_bits[] = {
--	__GEN_RESET_BITS_TABLE(6338)
--};
--#define reset_reg PERF_SOFTRESET_REG
--#endif
--
--#ifdef CONFIG_BCM63XX_CPU_6345
--static const u32 bcm63xx_reset_bits[] = { };
--#define reset_reg 0
--#endif
--
--#ifdef CONFIG_BCM63XX_CPU_6348
--static const u32 bcm63xx_reset_bits[] = {
--	__GEN_RESET_BITS_TABLE(6348)
--};
--#define reset_reg PERF_SOFTRESET_REG
--#endif
--
--#ifdef CONFIG_BCM63XX_CPU_6358
--static const u32 bcm63xx_reset_bits[] = {
--	__GEN_RESET_BITS_TABLE(6358)
--};
--#define reset_reg PERF_SOFTRESET_6358_REG
--#endif
--
--#ifdef CONFIG_BCM63XX_CPU_6362
--static const u32 bcm63xx_reset_bits[] = {
--	__GEN_RESET_BITS_TABLE(6362)
--};
--#define reset_reg PERF_SOFTRESET_6362_REG
--#endif
--
--#ifdef CONFIG_BCM63XX_CPU_6368
--static const u32 bcm63xx_reset_bits[] = {
--	__GEN_RESET_BITS_TABLE(6368)
--};
--#define reset_reg PERF_SOFTRESET_6368_REG
--#endif
--
--static int __init bcm63xx_reset_bits_init(void) { return 0; }
--#endif
- 
- static DEFINE_SPINLOCK(reset_mutex);
- 

target/linux/brcm63xx/patches-3.10/313-MIPS-BCM63XX-remove-RUNTIME_DETECT-code-from-gpio.patch

@@ -1,39 +0,0 @@
-From 1aab93c5c97c55fef130726a6f58c9a1fd5b6240 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Tue, 3 Dec 2013 13:36:45 +0100
-Subject: [PATCH 4/8] MIPS: BCM63XX: remove !RUNTIME_DETECT code from gpio
-
----
- arch/mips/bcm63xx/gpio.c | 14 --------------
- 1 file changed, 14 deletions(-)
-
---- a/arch/mips/bcm63xx/gpio.c
-+++ b/arch/mips/bcm63xx/gpio.c
-@@ -18,19 +18,6 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
- 
--#ifndef BCMCPU_RUNTIME_DETECT
--#define gpio_out_low_reg	GPIO_DATA_LO_REG
--#ifdef CONFIG_BCM63XX_CPU_6345
--#ifdef gpio_out_low_reg
--#undef gpio_out_low_reg
--#define gpio_out_low_reg	GPIO_DATA_LO_REG_6345
--#endif /* gpio_out_low_reg */
--#endif /* CONFIG_BCM63XX_CPU_6345 */
--
--static inline void bcm63xx_gpio_out_low_reg_init(void)
--{
--}
--#else /* ! BCMCPU_RUNTIME_DETECT */
- static u32 gpio_out_low_reg;
- 
- static void bcm63xx_gpio_out_low_reg_init(void)
-@@ -44,7 +31,6 @@ static void bcm63xx_gpio_out_low_reg_ini
- 		break;
- 	}
- }
--#endif /* ! BCMCPU_RUNTIME_DETECT */
- 
- static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
- static u32 gpio_out_low, gpio_out_high;

target/linux/brcm63xx/patches-3.10/314-MIPS-BCM63XX-remove-RUNTIME_DETECT-from-spi-code.patch

@@ -1,80 +0,0 @@
-From 94f819bc230bb61a9ff21da6c860a40ca68c2805 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Tue, 3 Dec 2013 13:43:35 +0100
-Subject: [PATCH 5/8] MIPS: BCM63XX: remove !RUNTIME_DETECT from spi code
-
----
- arch/mips/bcm63xx/dev-spi.c                        |  4 ---
- .../include/asm/mach-bcm63xx/bcm63xx_dev_spi.h     | 31 ----------------------
- 2 files changed, 35 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-spi.c
-+++ b/arch/mips/bcm63xx/dev-spi.c
-@@ -18,7 +18,6 @@
- #include <bcm63xx_dev_spi.h>
- #include <bcm63xx_regs.h>
- 
--#ifdef BCMCPU_RUNTIME_DETECT
- /*
-  * register offsets
-  */
-@@ -41,9 +40,6 @@ static __init void bcm63xx_spi_regs_init
- 		BCMCPU_IS_6362() || BCMCPU_IS_6368())
- 		bcm63xx_regs_spi = bcm6358_regs_spi;
- }
--#else
--static __init void bcm63xx_spi_regs_init(void) { }
--#endif
- 
- static struct resource spi_resources[] = {
- 	{
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
-@@ -30,26 +30,6 @@ enum bcm63xx_regs_spi {
- 	SPI_RX_DATA,
- };
- 
--#define __GEN_SPI_RSET_BASE(__cpu, __rset)				\
--	case SPI_## __rset:						\
--		return SPI_## __cpu ##_## __rset;
--
--#define __GEN_SPI_RSET(__cpu)						\
--	switch (reg) {							\
--	__GEN_SPI_RSET_BASE(__cpu, CMD)					\
--	__GEN_SPI_RSET_BASE(__cpu, INT_STATUS)				\
--	__GEN_SPI_RSET_BASE(__cpu, INT_MASK_ST)				\
--	__GEN_SPI_RSET_BASE(__cpu, INT_MASK)				\
--	__GEN_SPI_RSET_BASE(__cpu, ST)					\
--	__GEN_SPI_RSET_BASE(__cpu, CLK_CFG)				\
--	__GEN_SPI_RSET_BASE(__cpu, FILL_BYTE)				\
--	__GEN_SPI_RSET_BASE(__cpu, MSG_TAIL)				\
--	__GEN_SPI_RSET_BASE(__cpu, RX_TAIL)				\
--	__GEN_SPI_RSET_BASE(__cpu, MSG_CTL)				\
--	__GEN_SPI_RSET_BASE(__cpu, MSG_DATA)				\
--	__GEN_SPI_RSET_BASE(__cpu, RX_DATA)				\
--	}
--
- #define __GEN_SPI_REGS_TABLE(__cpu)					\
- 	[SPI_CMD]		= SPI_## __cpu ##_CMD,			\
- 	[SPI_INT_STATUS]	= SPI_## __cpu ##_INT_STATUS,		\
-@@ -66,20 +46,9 @@ enum bcm63xx_regs_spi {
- 
- static inline unsigned long bcm63xx_spireg(enum bcm63xx_regs_spi reg)
- {
--#ifdef BCMCPU_RUNTIME_DETECT
- 	extern const unsigned long *bcm63xx_regs_spi;
- 
- 	return bcm63xx_regs_spi[reg];
--#else
--#if defined(CONFIG_BCM63XX_CPU_6338) || defined(CONFIG_BCM63XX_CPU_6348)
--	__GEN_SPI_RSET(6348)
--#endif
--#if defined(CONFIG_BCM63XX_CPU_6358) || defined(CONFIG_BCM63XX_CPU_6362) || \
--	defined(CONFIG_BCM63XX_CPU_6368)
--	__GEN_SPI_RSET(6358)
--#endif
--#endif
--	return 0;
- }
- 
- #endif /* BCM63XX_DEV_SPI_H */

target/linux/brcm63xx/patches-3.10/315-MIPS-BCM63XX-remove-RUNTIME_DETECT-usage-from-enet-c.patch

@@ -1,89 +0,0 @@
-From ed6c71de07ad042691ec02e9eb97375ddc91ed01 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Tue, 3 Dec 2013 13:45:22 +0100
-Subject: [PATCH 6/8] MIPS: BCM63XX: remove !RUNTIME_DETECT usage from enet
- code
-
----
- arch/mips/bcm63xx/dev-enet.c                       |  4 --
- .../include/asm/mach-bcm63xx/bcm63xx_dev_enet.h    | 46 ----------------------
- 2 files changed, 50 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-enet.c
-+++ b/arch/mips/bcm63xx/dev-enet.c
-@@ -14,7 +14,6 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
- 
--#ifdef BCMCPU_RUNTIME_DETECT
- static const unsigned long bcm6348_regs_enetdmac[] = {
- 	[ENETDMAC_CHANCFG]	= ENETDMAC_CHANCFG_REG,
- 	[ENETDMAC_IR]		= ENETDMAC_IR_REG,
-@@ -43,9 +42,6 @@ static __init void bcm63xx_enetdmac_regs
- 	else
- 		bcm63xx_regs_enetdmac = bcm6348_regs_enetdmac;
- }
--#else
--static __init void bcm63xx_enetdmac_regs_init(void) { }
--#endif
- 
- static struct resource shared_res[] = {
- 	{
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-@@ -112,55 +112,9 @@ enum bcm63xx_regs_enetdmac {
- 
- static inline unsigned long bcm63xx_enetdmacreg(enum bcm63xx_regs_enetdmac reg)
- {
--#ifdef BCMCPU_RUNTIME_DETECT
- 	extern const unsigned long *bcm63xx_regs_enetdmac;
- 
- 	return bcm63xx_regs_enetdmac[reg];
--#else
--#ifdef CONFIG_BCM63XX_CPU_6345
--	switch (reg) {
--	case ENETDMAC_CHANCFG:
--		return ENETDMA_6345_CHANCFG_REG;
--	case ENETDMAC_IR:
--		return ENETDMA_6345_IR_REG;
--	case ENETDMAC_IRMASK:
--		return ENETDMA_6345_IRMASK_REG;
--	case ENETDMAC_MAXBURST:
--		return ENETDMA_6345_MAXBURST_REG;
--	case ENETDMAC_BUFALLOC:
--		return ENETDMA_6345_BUFALLOC_REG;
--	case ENETDMAC_RSTART:
--		return ENETDMA_6345_RSTART_REG;
--	case ENETDMAC_FC:
--		return ENETDMA_6345_FC_REG;
--	case ENETDMAC_LEN:
--		return ENETDMA_6345_LEN_REG;
--	}
--#endif
--#if defined(CONFIG_BCM63XX_CPU_6328) || \
--	defined(CONFIG_BCM63XX_CPU_6338) || \
--	defined(CONFIG_BCM63XX_CPU_6348) || \
--	defined(CONFIG_BCM63XX_CPU_6358) || \
--	defined(CONFIG_BCM63XX_CPU_6362) || \
--	defined(CONFIG_BCM63XX_CPU_6368)
--	switch (reg) {
--	case ENETDMAC_CHANCFG:
--		return ENETDMAC_CHANCFG_REG;
--	case ENETDMAC_IR:
--		return ENETDMAC_IR_REG;
--	case ENETDMAC_IRMASK:
--		return ENETDMAC_IRMASK_REG;
--	case ENETDMAC_MAXBURST:
--		return ENETDMAC_MAXBURST_REG;
--	case ENETDMAC_BUFALLOC:
--	case ENETDMAC_RSTART:
--	case ENETDMAC_FC:
--	case ENETDMAC_LEN:
--		return 0;
--	}
--#endif
--#endif
--	return 0;
- }
- 
- 

target/linux/brcm63xx/patches-3.10/316-MIPS-BCM63XX-remove-RUNTIME_DETECT-in-cpu-feature-ov.patch

@@ -1,23 +0,0 @@
-From 12c6957004d6770f4b34d59d8a3cafd5d8bfce15 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Tue, 3 Dec 2013 14:06:12 +0100
-Subject: [PATCH 7/8] MIPS: BCM63XX: remove !RUNTIME_DETECT in
- cpu-feature-overrides
-
-All three SoCs have in common they have a BMIPS32/BMIPS3300 CPU, so
-we can replace this as no SoC with BMIPS4350 support enabled.
----
- arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
-@@ -24,7 +24,7 @@
- #define cpu_has_smartmips		0
- #define cpu_has_vtag_icache		0
- 
--#if !defined(BCMCPU_RUNTIME_DETECT) && (defined(CONFIG_BCM63XX_CPU_6348) || defined(CONFIG_BCM63XX_CPU_6345) || defined(CONFIG_BCM63XX_CPU_6338))
-+#if !defined(CONFIG_SYS_HAS_CPU_BMIPS4350)
- #define cpu_has_dc_aliases		0
- #endif
- 

target/linux/brcm63xx/patches-3.10/317-MIPS-BCM63XX-remove-RUNTIME_DETECT-code-for-bcmcpu_g.patch

@@ -1,199 +0,0 @@
-From 78c3d2e796a28ad55f6c2310a11ab22e91bb52fc Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Mon, 2 Dec 2013 12:30:44 +0100
-Subject: [PATCH 8/8] MIPS: BCM63XX: remove !RUNTIME_DETECT code for
- bcmcpu_get_id
-
-Use the same pattern as with get_*_cpu_type() to allow the compiler
-to remove code for non enabled devices.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/cpu.c                          |  11 +--
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 120 +++++++----------------
- 2 files changed, 38 insertions(+), 93 deletions(-)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -24,7 +24,9 @@ EXPORT_SYMBOL(bcm63xx_regs_base);
- const int *bcm63xx_irqs;
- EXPORT_SYMBOL(bcm63xx_irqs);
- 
--static u16 bcm63xx_cpu_id;
-+u16 bcm63xx_cpu_id __read_mostly;
-+EXPORT_SYMBOL(bcm63xx_cpu_id);
-+
- static u8 bcm63xx_cpu_rev;
- static unsigned int bcm63xx_cpu_freq;
- static unsigned int bcm63xx_memory_size;
-@@ -97,13 +99,6 @@ static const int bcm6368_irqs[] = {
- 
- };
- 
--u16 __bcm63xx_get_cpu_id(void)
--{
--	return bcm63xx_cpu_id;
--}
--
--EXPORT_SYMBOL(__bcm63xx_get_cpu_id);
--
- u8 bcm63xx_get_cpu_rev(void)
- {
- 	return bcm63xx_cpu_rev;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -19,118 +19,68 @@
- #define BCM6368_CPU_ID		0x6368
- 
- void __init bcm63xx_cpu_init(void);
--u16 __bcm63xx_get_cpu_id(void);
- u8 bcm63xx_get_cpu_rev(void);
- unsigned int bcm63xx_get_cpu_freq(void);
- 
-+static inline u16 __pure __bcm63xx_get_cpu_id(const u16 cpu_id)
-+{
-+	switch (cpu_id) {
- #ifdef CONFIG_BCM63XX_CPU_3368
--# ifdef bcm63xx_get_cpu_id
--#  undef bcm63xx_get_cpu_id
--#  define bcm63xx_get_cpu_id()	__bcm63xx_get_cpu_id()
--#  define BCMCPU_RUNTIME_DETECT
--# else
--#  define bcm63xx_get_cpu_id()	BCM3368_CPU_ID
--# endif
--# define BCMCPU_IS_3368()	(bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
--#else
--# define BCMCPU_IS_3368()	(0)
-+		case BCM3368_CPU_ID:
- #endif
- 
- #ifdef CONFIG_BCM63XX_CPU_6328
--# ifdef bcm63xx_get_cpu_id
--#  undef bcm63xx_get_cpu_id
--#  define bcm63xx_get_cpu_id()	__bcm63xx_get_cpu_id()
--#  define BCMCPU_RUNTIME_DETECT
--# else
--#  define bcm63xx_get_cpu_id()	BCM6328_CPU_ID
--# endif
--# define BCMCPU_IS_6328()	(bcm63xx_get_cpu_id() == BCM6328_CPU_ID)
--#else
--# define BCMCPU_IS_6328()	(0)
-+		case BCM6328_CPU_ID:
- #endif
- 
- #ifdef CONFIG_BCM63XX_CPU_6338
--# ifdef bcm63xx_get_cpu_id
--#  undef bcm63xx_get_cpu_id
--#  define bcm63xx_get_cpu_id()	__bcm63xx_get_cpu_id()
--#  define BCMCPU_RUNTIME_DETECT
--# else
--#  define bcm63xx_get_cpu_id()	BCM6338_CPU_ID
--# endif
--# define BCMCPU_IS_6338()	(bcm63xx_get_cpu_id() == BCM6338_CPU_ID)
--#else
--# define BCMCPU_IS_6338()	(0)
-+		case BCM6338_CPU_ID:
- #endif
- 
- #ifdef CONFIG_BCM63XX_CPU_6345
--# ifdef bcm63xx_get_cpu_id
--#  undef bcm63xx_get_cpu_id
--#  define bcm63xx_get_cpu_id()	__bcm63xx_get_cpu_id()
--#  define BCMCPU_RUNTIME_DETECT
--# else
--#  define bcm63xx_get_cpu_id()	BCM6345_CPU_ID
--# endif
--# define BCMCPU_IS_6345()	(bcm63xx_get_cpu_id() == BCM6345_CPU_ID)
--#else
--# define BCMCPU_IS_6345()	(0)
-+		case BCM6345_CPU_ID:
- #endif
- 
- #ifdef CONFIG_BCM63XX_CPU_6348
--# ifdef bcm63xx_get_cpu_id
--#  undef bcm63xx_get_cpu_id
--#  define bcm63xx_get_cpu_id()	__bcm63xx_get_cpu_id()
--#  define BCMCPU_RUNTIME_DETECT
--# else
--#  define bcm63xx_get_cpu_id()	BCM6348_CPU_ID
--# endif
--# define BCMCPU_IS_6348()	(bcm63xx_get_cpu_id() == BCM6348_CPU_ID)
--#else
--# define BCMCPU_IS_6348()	(0)
-+		case BCM6348_CPU_ID:
- #endif
- 
- #ifdef CONFIG_BCM63XX_CPU_6358
--# ifdef bcm63xx_get_cpu_id
--#  undef bcm63xx_get_cpu_id
--#  define bcm63xx_get_cpu_id()	__bcm63xx_get_cpu_id()
--#  define BCMCPU_RUNTIME_DETECT
--# else
--#  define bcm63xx_get_cpu_id()	BCM6358_CPU_ID
--# endif
--# define BCMCPU_IS_6358()	(bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
--#else
--# define BCMCPU_IS_6358()	(0)
-+		case BCM6358_CPU_ID:
- #endif
- 
- #ifdef CONFIG_BCM63XX_CPU_6362
--# ifdef bcm63xx_get_cpu_id
--#  undef bcm63xx_get_cpu_id
--#  define bcm63xx_get_cpu_id()	__bcm63xx_get_cpu_id()
--#  define BCMCPU_RUNTIME_DETECT
--# else
--#  define bcm63xx_get_cpu_id()	BCM6362_CPU_ID
--# endif
--# define BCMCPU_IS_6362()	(bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
--#else
--# define BCMCPU_IS_6362()	(0)
-+		case BCM6362_CPU_ID:
- #endif
- 
--
- #ifdef CONFIG_BCM63XX_CPU_6368
--# ifdef bcm63xx_get_cpu_id
--#  undef bcm63xx_get_cpu_id
--#  define bcm63xx_get_cpu_id()	__bcm63xx_get_cpu_id()
--#  define BCMCPU_RUNTIME_DETECT
--# else
--#  define bcm63xx_get_cpu_id()	BCM6368_CPU_ID
--# endif
--# define BCMCPU_IS_6368()	(bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
--#else
--# define BCMCPU_IS_6368()	(0)
--#endif
--
--#ifndef bcm63xx_get_cpu_id
--#error "No CPU support configured"
-+		case BCM6368_CPU_ID:
- #endif
-+		break;
-+	default:
-+		unreachable();
-+	}
-+
-+	return cpu_id;
-+}
-+
-+extern u16 bcm63xx_cpu_id;
-+
-+static inline u16 __pure bcm63xx_get_cpu_id(void)
-+{
-+	const u16 cpu_id = bcm63xx_cpu_id;
-+
-+	return __bcm63xx_get_cpu_id(cpu_id);
-+}
-+
-+#define BCMCPU_IS_3368()	(bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
-+#define BCMCPU_IS_6328()	(bcm63xx_get_cpu_id() == BCM6328_CPU_ID)
-+#define BCMCPU_IS_6338()	(bcm63xx_get_cpu_id() == BCM6338_CPU_ID)
-+#define BCMCPU_IS_6345()	(bcm63xx_get_cpu_id() == BCM6345_CPU_ID)
-+#define BCMCPU_IS_6348()	(bcm63xx_get_cpu_id() == BCM6348_CPU_ID)
-+#define BCMCPU_IS_6358()	(bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
-+#define BCMCPU_IS_6362()	(bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
-+#define BCMCPU_IS_6368()	(bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
- 
- /*
-  * While registers sets are (mostly) the same across 63xx CPU, base

target/linux/brcm63xx/patches-3.10/318-MIPS-BCM63XX-add-width-to-__dispatch_internal.patch

@@ -1,41 +0,0 @@
-From a2015bfad293a7eb79519beb60381cb996c6e298 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Thu, 21 Mar 2013 17:05:15 +0100
-Subject: [PATCH 01/10] MIPS: BCM63XX: add width to __dispatch_internal
-
-Make it follow the same naming convention as the other functions.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/irq.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -19,7 +19,7 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
- 
--static void __dispatch_internal(void) __maybe_unused;
-+static void __dispatch_internal_32(void) __maybe_unused;
- static void __dispatch_internal_64(void) __maybe_unused;
- static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
- static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
-@@ -117,7 +117,7 @@ static void bcm63xx_init_irq(void)
- 	}
- 
- 	if (irq_bits == 32) {
--		dispatch_internal = __dispatch_internal;
-+		dispatch_internal = __dispatch_internal_32;
- 		internal_irq_mask = __internal_irq_mask_32;
- 		internal_irq_unmask = __internal_irq_unmask_32;
- 	} else {
-@@ -149,7 +149,7 @@ static inline void handle_internal(int i
-  * will resume the loop where it ended the last time we left this
-  * function.
-  */
--static void __dispatch_internal(void)
-+static void __dispatch_internal_32(void)
- {
- 	u32 pending;
- 	static int i;

target/linux/brcm63xx/patches-3.10/319-MIPS-BCM63XX-move-bcm63xx_init_irq-down.patch

@@ -1,225 +0,0 @@
-From 6e79c6dd02aa56e37eb071797f0eb5e3fb588cba Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 15 Dec 2013 20:52:53 +0100
-Subject: [PATCH 02/10] MIPS: BCM63XX: move bcm63xx_init_irq down
-
-Allows up to drop the prototypes from the top.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/irq.c | 190 +++++++++++++++++++++++-------------------------
- 1 file changed, 92 insertions(+), 98 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -19,13 +19,6 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
- 
--static void __dispatch_internal_32(void) __maybe_unused;
--static void __dispatch_internal_64(void) __maybe_unused;
--static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
--static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
--static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
--static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
--
- static u32 irq_stat_addr, irq_mask_addr;
- static void (*dispatch_internal)(void);
- static int is_ext_irq_cascaded;
-@@ -35,97 +28,6 @@ static unsigned int ext_irq_cfg_reg1, ex
- static void (*internal_irq_mask)(unsigned int irq);
- static void (*internal_irq_unmask)(unsigned int irq);
- 
--static void bcm63xx_init_irq(void)
--{
--	int irq_bits;
--
--	irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
--	irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
--
--	switch (bcm63xx_get_cpu_id()) {
--	case BCM3368_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_3368_REG;
--		irq_mask_addr += PERF_IRQMASK_3368_REG;
--		irq_bits = 32;
--		ext_irq_count = 4;
--		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
--		break;
--	case BCM6328_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6328_REG;
--		irq_mask_addr += PERF_IRQMASK_6328_REG;
--		irq_bits = 64;
--		ext_irq_count = 4;
--		is_ext_irq_cascaded = 1;
--		ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
--		ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
--		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
--		break;
--	case BCM6338_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6338_REG;
--		irq_mask_addr += PERF_IRQMASK_6338_REG;
--		irq_bits = 32;
--		ext_irq_count = 4;
--		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
--		break;
--	case BCM6345_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6345_REG;
--		irq_mask_addr += PERF_IRQMASK_6345_REG;
--		irq_bits = 32;
--		ext_irq_count = 4;
--		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
--		break;
--	case BCM6348_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6348_REG;
--		irq_mask_addr += PERF_IRQMASK_6348_REG;
--		irq_bits = 32;
--		ext_irq_count = 4;
--		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
--		break;
--	case BCM6358_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6358_REG;
--		irq_mask_addr += PERF_IRQMASK_6358_REG;
--		irq_bits = 32;
--		ext_irq_count = 4;
--		is_ext_irq_cascaded = 1;
--		ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
--		ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
--		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
--		break;
--	case BCM6362_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6362_REG;
--		irq_mask_addr += PERF_IRQMASK_6362_REG;
--		irq_bits = 64;
--		ext_irq_count = 4;
--		is_ext_irq_cascaded = 1;
--		ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
--		ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
--		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
--		break;
--	case BCM6368_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6368_REG;
--		irq_mask_addr += PERF_IRQMASK_6368_REG;
--		irq_bits = 64;
--		ext_irq_count = 6;
--		is_ext_irq_cascaded = 1;
--		ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
--		ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
--		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
--		ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
--		break;
--	default:
--		BUG();
--	}
--
--	if (irq_bits == 32) {
--		dispatch_internal = __dispatch_internal_32;
--		internal_irq_mask = __internal_irq_mask_32;
--		internal_irq_unmask = __internal_irq_unmask_32;
--	} else {
--		dispatch_internal = __dispatch_internal_64;
--		internal_irq_mask = __internal_irq_mask_64;
--		internal_irq_unmask = __internal_irq_unmask_64;
--	}
--}
- 
- static inline u32 get_ext_irq_perf_reg(int irq)
- {
-@@ -451,6 +353,98 @@ static struct irqaction cpu_ext_cascade_
- 	.flags		= IRQF_NO_THREAD,
- };
- 
-+static void bcm63xx_init_irq(void)
-+{
-+	int irq_bits;
-+
-+	irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
-+	irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
-+
-+	switch (bcm63xx_get_cpu_id()) {
-+	case BCM3368_CPU_ID:
-+		irq_stat_addr += PERF_IRQSTAT_3368_REG;
-+		irq_mask_addr += PERF_IRQMASK_3368_REG;
-+		irq_bits = 32;
-+		ext_irq_count = 4;
-+		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
-+		break;
-+	case BCM6328_CPU_ID:
-+		irq_stat_addr += PERF_IRQSTAT_6328_REG;
-+		irq_mask_addr += PERF_IRQMASK_6328_REG;
-+		irq_bits = 64;
-+		ext_irq_count = 4;
-+		is_ext_irq_cascaded = 1;
-+		ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-+		ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
-+		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
-+		break;
-+	case BCM6338_CPU_ID:
-+		irq_stat_addr += PERF_IRQSTAT_6338_REG;
-+		irq_mask_addr += PERF_IRQMASK_6338_REG;
-+		irq_bits = 32;
-+		ext_irq_count = 4;
-+		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
-+		break;
-+	case BCM6345_CPU_ID:
-+		irq_stat_addr += PERF_IRQSTAT_6345_REG;
-+		irq_mask_addr += PERF_IRQMASK_6345_REG;
-+		irq_bits = 32;
-+		ext_irq_count = 4;
-+		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
-+		break;
-+	case BCM6348_CPU_ID:
-+		irq_stat_addr += PERF_IRQSTAT_6348_REG;
-+		irq_mask_addr += PERF_IRQMASK_6348_REG;
-+		irq_bits = 32;
-+		ext_irq_count = 4;
-+		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
-+		break;
-+	case BCM6358_CPU_ID:
-+		irq_stat_addr += PERF_IRQSTAT_6358_REG;
-+		irq_mask_addr += PERF_IRQMASK_6358_REG;
-+		irq_bits = 32;
-+		ext_irq_count = 4;
-+		is_ext_irq_cascaded = 1;
-+		ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-+		ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
-+		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
-+		break;
-+	case BCM6362_CPU_ID:
-+		irq_stat_addr += PERF_IRQSTAT_6362_REG;
-+		irq_mask_addr += PERF_IRQMASK_6362_REG;
-+		irq_bits = 64;
-+		ext_irq_count = 4;
-+		is_ext_irq_cascaded = 1;
-+		ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-+		ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
-+		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
-+		break;
-+	case BCM6368_CPU_ID:
-+		irq_stat_addr += PERF_IRQSTAT_6368_REG;
-+		irq_mask_addr += PERF_IRQMASK_6368_REG;
-+		irq_bits = 64;
-+		ext_irq_count = 6;
-+		is_ext_irq_cascaded = 1;
-+		ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-+		ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
-+		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
-+		ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
-+		break;
-+	default:
-+		BUG();
-+	}
-+
-+	if (irq_bits == 32) {
-+		dispatch_internal = __dispatch_internal_32;
-+		internal_irq_mask = __internal_irq_mask_32;
-+		internal_irq_unmask = __internal_irq_unmask_32;
-+	} else {
-+		dispatch_internal = __dispatch_internal_64;
-+		internal_irq_mask = __internal_irq_mask_64;
-+		internal_irq_unmask = __internal_irq_unmask_64;
-+	}
-+}
-+
- void __init arch_init_irq(void)
- {
- 	int i;

target/linux/brcm63xx/patches-3.10/320-MIPS-BCM63XX-replace-irq-dispatch-code-with-a-generi.patch

@@ -1,174 +0,0 @@
-From 39b46ed1c9fe71890566e129d9ac5feb8421b3b4 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Thu, 18 Apr 2013 21:14:49 +0200
-Subject: [PATCH 03/10] MIPS: BCM63XX: replace irq dispatch code with a generic
- version
-
-The generic version uses a variable length of u32 registers instead of u32/u64.
-This allows easier support for "wider" registers without having to rewrite
-everything.
-
-This "generic" version is as fast as the old version in the best case
-(i == next set bit), and twice as fast in the worst case in 64 bits.
-
-Using a macro was chosen over a (forced) inline version because gcc generated
-more compact code with the macro.
-
-The change from (signed) int to unsigned int for i and to_call was intentional
-as the value can be only between 0 and (width - 1) anyway, and allowed gcc to
-optimise the code a bit further.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/irq.c | 130 +++++++++++++++++++++---------------------------
- 1 file changed, 56 insertions(+), 74 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -51,47 +51,65 @@ static inline void handle_internal(int i
-  * will resume the loop where it ended the last time we left this
-  * function.
-  */
--static void __dispatch_internal_32(void)
--{
--	u32 pending;
--	static int i;
--
--	pending = bcm_readl(irq_stat_addr) & bcm_readl(irq_mask_addr);
--
--	if (!pending)
--		return ;
--
--	while (1) {
--		int to_call = i;
- 
--		i = (i + 1) & 0x1f;
--		if (pending & (1 << to_call)) {
--			handle_internal(to_call);
--			break;
--		}
--	}
-+#define BUILD_IPIC_INTERNAL(width)					\
-+void __dispatch_internal_##width(void)					\
-+{									\
-+	u32 pending[width / 32];					\
-+	unsigned int src, tgt;						\
-+	bool irqs_pending = false;					\
-+	static unsigned int i;						\
-+									\
-+	/* read registers in reverse order */				\
-+	for (src = 0, tgt = (width / 32); src < (width / 32); src++) {	\
-+		u32 val;						\
-+									\
-+		val = bcm_readl(irq_stat_addr + src * sizeof(u32));	\
-+		val &= bcm_readl(irq_mask_addr + src * sizeof(u32));	\
-+		pending[--tgt] = val;					\
-+									\
-+		if (val)						\
-+			irqs_pending = true;				\
-+	}								\
-+									\
-+	if (!irqs_pending)						\
-+		return;							\
-+									\
-+	while (1) {							\
-+		unsigned int to_call = i;				\
-+									\
-+		i = (i + 1) & (width - 1);				\
-+		if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {	\
-+			handle_internal(to_call);			\
-+			break;						\
-+		}							\
-+	}								\
-+}									\
-+									\
-+static void __internal_irq_mask_##width(unsigned int irq)		\
-+{									\
-+	u32 val;							\
-+	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
-+	unsigned bit = irq & 0x1f;					\
-+									\
-+	val = bcm_readl(irq_mask_addr + reg * sizeof(u32));		\
-+	val &= ~(1 << bit);						\
-+	bcm_writel(val, irq_mask_addr + reg * sizeof(u32));		\
-+}									\
-+									\
-+static void __internal_irq_unmask_##width(unsigned int irq)		\
-+{									\
-+	u32 val;							\
-+	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
-+	unsigned bit = irq & 0x1f;					\
-+									\
-+	val = bcm_readl(irq_mask_addr + reg * sizeof(u32));		\
-+	val |= (1 << bit);						\
-+	bcm_writel(val, irq_mask_addr + reg * sizeof(u32));		\
- }
- 
--static void __dispatch_internal_64(void)
--{
--	u64 pending;
--	static int i;
--
--	pending = bcm_readq(irq_stat_addr) & bcm_readq(irq_mask_addr);
--
--	if (!pending)
--		return ;
--
--	while (1) {
--		int to_call = i;
--
--		i = (i + 1) & 0x3f;
--		if (pending & (1ull << to_call)) {
--			handle_internal(to_call);
--			break;
--		}
--	}
--}
-+BUILD_IPIC_INTERNAL(32);
-+BUILD_IPIC_INTERNAL(64);
- 
- asmlinkage void plat_irq_dispatch(void)
- {
-@@ -128,42 +146,6 @@ asmlinkage void plat_irq_dispatch(void)
-  * internal IRQs operations: only mask/unmask on PERF irq mask
-  * register.
-  */
--static void __internal_irq_mask_32(unsigned int irq)
--{
--	u32 mask;
--
--	mask = bcm_readl(irq_mask_addr);
--	mask &= ~(1 << irq);
--	bcm_writel(mask, irq_mask_addr);
--}
--
--static void __internal_irq_mask_64(unsigned int irq)
--{
--	u64 mask;
--
--	mask = bcm_readq(irq_mask_addr);
--	mask &= ~(1ull << irq);
--	bcm_writeq(mask, irq_mask_addr);
--}
--
--static void __internal_irq_unmask_32(unsigned int irq)
--{
--	u32 mask;
--
--	mask = bcm_readl(irq_mask_addr);
--	mask |= (1 << irq);
--	bcm_writel(mask, irq_mask_addr);
--}
--
--static void __internal_irq_unmask_64(unsigned int irq)
--{
--	u64 mask;
--
--	mask = bcm_readq(irq_mask_addr);
--	mask |= (1ull << irq);
--	bcm_writeq(mask, irq_mask_addr);
--}
--
- static void bcm63xx_internal_irq_mask(struct irq_data *d)
- {
- 	internal_irq_mask(d->irq - IRQ_INTERNAL_BASE);

target/linux/brcm63xx/patches-3.10/321-MIPS-BCM63XX-append-irq-line-to-irq_-stat-mask.patch

@@ -1,182 +0,0 @@
-From 96ce0a9d195b2781d6f8d919dea8056b1c409703 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Thu, 25 Apr 2013 00:24:06 +0200
-Subject: [PATCH 04/10] MIPS: BCM63XX: append irq line to irq_{stat,mask}*
-
-The SMP capable irq controllers have two interrupt output pins which are
-controlled through separate registers, so make the variables arrays.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/irq.c                           | 51 ++++++++++++-----------
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 16 +++----
- 2 files changed, 34 insertions(+), 33 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -19,7 +19,8 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
- 
--static u32 irq_stat_addr, irq_mask_addr;
-+static u32 irq_stat_addr[2];
-+static u32 irq_mask_addr[2];
- static void (*dispatch_internal)(void);
- static int is_ext_irq_cascaded;
- static unsigned int ext_irq_count;
-@@ -64,8 +65,8 @@ void __dispatch_internal_##width(void)
- 	for (src = 0, tgt = (width / 32); src < (width / 32); src++) {	\
- 		u32 val;						\
- 									\
--		val = bcm_readl(irq_stat_addr + src * sizeof(u32));	\
--		val &= bcm_readl(irq_mask_addr + src * sizeof(u32));	\
-+		val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32));	\
-+		val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32));	\
- 		pending[--tgt] = val;					\
- 									\
- 		if (val)						\
-@@ -92,9 +93,9 @@ static void __internal_irq_mask_##width(
- 	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
- 	unsigned bit = irq & 0x1f;					\
- 									\
--	val = bcm_readl(irq_mask_addr + reg * sizeof(u32));		\
-+	val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));		\
- 	val &= ~(1 << bit);						\
--	bcm_writel(val, irq_mask_addr + reg * sizeof(u32));		\
-+	bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));		\
- }									\
- 									\
- static void __internal_irq_unmask_##width(unsigned int irq)		\
-@@ -103,9 +104,9 @@ static void __internal_irq_unmask_##widt
- 	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
- 	unsigned bit = irq & 0x1f;					\
- 									\
--	val = bcm_readl(irq_mask_addr + reg * sizeof(u32));		\
-+	val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));		\
- 	val |= (1 << bit);						\
--	bcm_writel(val, irq_mask_addr + reg * sizeof(u32));		\
-+	bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));		\
- }
- 
- BUILD_IPIC_INTERNAL(32);
-@@ -339,20 +340,20 @@ static void bcm63xx_init_irq(void)
- {
- 	int irq_bits;
- 
--	irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
--	irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
-+	irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
-+	irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
- 
- 	switch (bcm63xx_get_cpu_id()) {
- 	case BCM3368_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_3368_REG;
--		irq_mask_addr += PERF_IRQMASK_3368_REG;
-+		irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
-+		irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
- 		irq_bits = 32;
- 		ext_irq_count = 4;
- 		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
- 		break;
- 	case BCM6328_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6328_REG;
--		irq_mask_addr += PERF_IRQMASK_6328_REG;
-+		irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
-+		irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
- 		irq_bits = 64;
- 		ext_irq_count = 4;
- 		is_ext_irq_cascaded = 1;
-@@ -361,29 +362,29 @@ static void bcm63xx_init_irq(void)
- 		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
- 		break;
- 	case BCM6338_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6338_REG;
--		irq_mask_addr += PERF_IRQMASK_6338_REG;
-+		irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
-+		irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
- 		irq_bits = 32;
- 		ext_irq_count = 4;
- 		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
- 		break;
- 	case BCM6345_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6345_REG;
--		irq_mask_addr += PERF_IRQMASK_6345_REG;
-+		irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
-+		irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
- 		irq_bits = 32;
- 		ext_irq_count = 4;
- 		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
- 		break;
- 	case BCM6348_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6348_REG;
--		irq_mask_addr += PERF_IRQMASK_6348_REG;
-+		irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
-+		irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
- 		irq_bits = 32;
- 		ext_irq_count = 4;
- 		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
- 		break;
- 	case BCM6358_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6358_REG;
--		irq_mask_addr += PERF_IRQMASK_6358_REG;
-+		irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
-+		irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
- 		irq_bits = 32;
- 		ext_irq_count = 4;
- 		is_ext_irq_cascaded = 1;
-@@ -392,8 +393,8 @@ static void bcm63xx_init_irq(void)
- 		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
- 		break;
- 	case BCM6362_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6362_REG;
--		irq_mask_addr += PERF_IRQMASK_6362_REG;
-+		irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
-+		irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
- 		irq_bits = 64;
- 		ext_irq_count = 4;
- 		is_ext_irq_cascaded = 1;
-@@ -402,8 +403,8 @@ static void bcm63xx_init_irq(void)
- 		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
- 		break;
- 	case BCM6368_CPU_ID:
--		irq_stat_addr += PERF_IRQSTAT_6368_REG;
--		irq_mask_addr += PERF_IRQMASK_6368_REG;
-+		irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
-+		irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
- 		irq_bits = 64;
- 		ext_irq_count = 6;
- 		is_ext_irq_cascaded = 1;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -215,23 +215,23 @@
- 
- /* Interrupt Mask register */
- #define PERF_IRQMASK_3368_REG		0xc
--#define PERF_IRQMASK_6328_REG		0x20
-+#define PERF_IRQMASK_6328_REG(x)	(0x20 + (x) * 0x10)
- #define PERF_IRQMASK_6338_REG		0xc
- #define PERF_IRQMASK_6345_REG		0xc
- #define PERF_IRQMASK_6348_REG		0xc
--#define PERF_IRQMASK_6358_REG		0xc
--#define PERF_IRQMASK_6362_REG		0x20
--#define PERF_IRQMASK_6368_REG		0x20
-+#define PERF_IRQMASK_6358_REG(x)	(0xc + (x) * 0x2c)
-+#define PERF_IRQMASK_6362_REG(x)	(0x20 + (x) * 0x10)
-+#define PERF_IRQMASK_6368_REG(x)	(0x20 + (x) * 0x10)
- 
- /* Interrupt Status register */
- #define PERF_IRQSTAT_3368_REG		0x10
--#define PERF_IRQSTAT_6328_REG		0x28
-+#define PERF_IRQSTAT_6328_REG(x)	(0x28 + (x) * 0x10)
- #define PERF_IRQSTAT_6338_REG		0x10
- #define PERF_IRQSTAT_6345_REG		0x10
- #define PERF_IRQSTAT_6348_REG		0x10
--#define PERF_IRQSTAT_6358_REG		0x10
--#define PERF_IRQSTAT_6362_REG		0x28
--#define PERF_IRQSTAT_6368_REG		0x28
-+#define PERF_IRQSTAT_6358_REG(x)	(0x10 + (x) * 0x2c)
-+#define PERF_IRQSTAT_6362_REG(x)	(0x28 + (x) * 0x10)
-+#define PERF_IRQSTAT_6368_REG(x)	(0x28 + (x) * 0x10)
- 
- /* External Interrupt Configuration register */
- #define PERF_EXTIRQ_CFG_REG_3368	0x14

target/linux/brcm63xx/patches-3.10/322-MIPS-BCM63XX-populate-irq_-stat-mask-_addr-for-secon.patch

@@ -1,94 +0,0 @@
-From ff61c72a7a260ab4c4abbddb72c3cd2aea5e0687 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Thu, 25 Apr 2013 00:31:29 +0200
-Subject: [PATCH 05/10] MIPS: BCM63XX: populate irq_{stat,mask}_addr for second
- cpu
-
-Set it to zero if there is no second set.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/irq.c | 18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -342,11 +342,15 @@ static void bcm63xx_init_irq(void)
- 
- 	irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
- 	irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
-+	irq_stat_addr[1] = bcm63xx_regset_address(RSET_PERF);
-+	irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF);
- 
- 	switch (bcm63xx_get_cpu_id()) {
- 	case BCM3368_CPU_ID:
- 		irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
- 		irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
-+		irq_stat_addr[1] = 0;
-+		irq_stat_addr[1] = 0;
- 		irq_bits = 32;
- 		ext_irq_count = 4;
- 		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
-@@ -354,6 +358,8 @@ static void bcm63xx_init_irq(void)
- 	case BCM6328_CPU_ID:
- 		irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
- 		irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
-+		irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1);
-+		irq_stat_addr[1] += PERF_IRQMASK_6328_REG(1);
- 		irq_bits = 64;
- 		ext_irq_count = 4;
- 		is_ext_irq_cascaded = 1;
-@@ -364,6 +370,8 @@ static void bcm63xx_init_irq(void)
- 	case BCM6338_CPU_ID:
- 		irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
- 		irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
-+		irq_stat_addr[1] = 0;
-+		irq_mask_addr[1] = 0;
- 		irq_bits = 32;
- 		ext_irq_count = 4;
- 		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
-@@ -371,6 +379,8 @@ static void bcm63xx_init_irq(void)
- 	case BCM6345_CPU_ID:
- 		irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
- 		irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
-+		irq_stat_addr[1] = 0;
-+		irq_mask_addr[1] = 0;
- 		irq_bits = 32;
- 		ext_irq_count = 4;
- 		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
-@@ -378,6 +388,8 @@ static void bcm63xx_init_irq(void)
- 	case BCM6348_CPU_ID:
- 		irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
- 		irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
-+		irq_stat_addr[1] = 0;
-+		irq_mask_addr[1] = 0;
- 		irq_bits = 32;
- 		ext_irq_count = 4;
- 		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
-@@ -385,6 +397,8 @@ static void bcm63xx_init_irq(void)
- 	case BCM6358_CPU_ID:
- 		irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
- 		irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
-+		irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1);
-+		irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1);
- 		irq_bits = 32;
- 		ext_irq_count = 4;
- 		is_ext_irq_cascaded = 1;
-@@ -395,6 +409,8 @@ static void bcm63xx_init_irq(void)
- 	case BCM6362_CPU_ID:
- 		irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
- 		irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
-+		irq_stat_addr[1] += PERF_IRQSTAT_6362_REG(1);
-+		irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1);
- 		irq_bits = 64;
- 		ext_irq_count = 4;
- 		is_ext_irq_cascaded = 1;
-@@ -405,6 +421,8 @@ static void bcm63xx_init_irq(void)
- 	case BCM6368_CPU_ID:
- 		irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
- 		irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
-+		irq_stat_addr[1] += PERF_IRQSTAT_6368_REG(1);
-+		irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1);
- 		irq_bits = 64;
- 		ext_irq_count = 6;
- 		is_ext_irq_cascaded = 1;

target/linux/brcm63xx/patches-3.10/323-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch

@@ -1,70 +0,0 @@
-From 43ebef8162adfa7789cb915e60e46103965d7efd Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Fri, 26 Apr 2013 11:21:16 +0200
-Subject: [PATCH 06/10] MIPS: BCM63XX: add cpu argument to dispatch internal
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/irq.c | 18 ++++++++++--------
- 1 file changed, 10 insertions(+), 8 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -19,9 +19,10 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
- 
-+
- static u32 irq_stat_addr[2];
- static u32 irq_mask_addr[2];
--static void (*dispatch_internal)(void);
-+static void (*dispatch_internal)(int cpu);
- static int is_ext_irq_cascaded;
- static unsigned int ext_irq_count;
- static unsigned int ext_irq_start, ext_irq_end;
-@@ -54,19 +55,20 @@ static inline void handle_internal(int i
-  */
- 
- #define BUILD_IPIC_INTERNAL(width)					\
--void __dispatch_internal_##width(void)					\
-+void __dispatch_internal_##width(int cpu)				\
- {									\
- 	u32 pending[width / 32];					\
- 	unsigned int src, tgt;						\
- 	bool irqs_pending = false;					\
--	static unsigned int i;						\
-+	static unsigned int i[2];					\
-+	unsigned int *next = &i[cpu];					\
- 									\
- 	/* read registers in reverse order */				\
- 	for (src = 0, tgt = (width / 32); src < (width / 32); src++) {	\
- 		u32 val;						\
- 									\
--		val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32));	\
--		val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32));	\
-+		val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \
-+		val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \
- 		pending[--tgt] = val;					\
- 									\
- 		if (val)						\
-@@ -77,9 +79,9 @@ void __dispatch_internal_##width(void)
- 		return;							\
- 									\
- 	while (1) {							\
--		unsigned int to_call = i;				\
-+		unsigned int to_call = *next;				\
- 									\
--		i = (i + 1) & (width - 1);				\
-+		*next = (*next + 1) & (width - 1);			\
- 		if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {	\
- 			handle_internal(to_call);			\
- 			break;						\
-@@ -129,7 +131,7 @@ asmlinkage void plat_irq_dispatch(void)
- 		if (cause & CAUSEF_IP1)
- 			do_IRQ(1);
- 		if (cause & CAUSEF_IP2)
--			dispatch_internal();
-+			dispatch_internal(0);
- 		if (!is_ext_irq_cascaded) {
- 			if (cause & CAUSEF_IP3)
- 				do_IRQ(IRQ_EXT_0);

target/linux/brcm63xx/patches-3.10/324-MIPS-BCM63XX-protect-irq-register-accesses.patch

@@ -1,162 +0,0 @@
-From 5e86f3988854c62c0788e4820caf722fec7c791b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 21 Apr 2013 15:38:56 +0200
-Subject: [PATCH 07/10] MIPS: BCM63XX: protect irq register accesses
-
-Since we will have the chance of accessing the registers concurrently,
-protect any accesses through a spinlock.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/irq.c | 26 ++++++++++++++++++++++++++
- 1 file changed, 26 insertions(+)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -12,6 +12,7 @@
- #include <linux/interrupt.h>
- #include <linux/module.h>
- #include <linux/irq.h>
-+#include <linux/spinlock.h>
- #include <asm/irq_cpu.h>
- #include <asm/mipsregs.h>
- #include <bcm63xx_cpu.h>
-@@ -20,6 +21,9 @@
- #include <bcm63xx_irq.h>
- 
- 
-+static DEFINE_SPINLOCK(ipic_lock);
-+static DEFINE_SPINLOCK(epic_lock);
-+
- static u32 irq_stat_addr[2];
- static u32 irq_mask_addr[2];
- static void (*dispatch_internal)(int cpu);
-@@ -62,8 +66,10 @@ void __dispatch_internal_##width(int cpu
- 	bool irqs_pending = false;					\
- 	static unsigned int i[2];					\
- 	unsigned int *next = &i[cpu];					\
-+	unsigned long flags;						\
- 									\
- 	/* read registers in reverse order */				\
-+	spin_lock_irqsave(&ipic_lock, flags);				\
- 	for (src = 0, tgt = (width / 32); src < (width / 32); src++) {	\
- 		u32 val;						\
- 									\
-@@ -74,6 +80,7 @@ void __dispatch_internal_##width(int cpu
- 		if (val)						\
- 			irqs_pending = true;				\
- 	}								\
-+	spin_unlock_irqrestore(&ipic_lock, flags);			\
- 									\
- 	if (!irqs_pending)						\
- 		return;							\
-@@ -94,10 +101,13 @@ static void __internal_irq_mask_##width(
- 	u32 val;							\
- 	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
- 	unsigned bit = irq & 0x1f;					\
-+	unsigned long flags;						\
- 									\
-+	spin_lock_irqsave(&ipic_lock, flags);				\
- 	val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));		\
- 	val &= ~(1 << bit);						\
- 	bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));		\
-+	spin_unlock_irqrestore(&ipic_lock, flags);			\
- }									\
- 									\
- static void __internal_irq_unmask_##width(unsigned int irq)		\
-@@ -105,10 +115,13 @@ static void __internal_irq_unmask_##widt
- 	u32 val;							\
- 	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
- 	unsigned bit = irq & 0x1f;					\
-+	unsigned long flags;						\
- 									\
-+	spin_lock_irqsave(&ipic_lock, flags);				\
- 	val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));		\
- 	val |= (1 << bit);						\
- 	bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));		\
-+	spin_unlock_irqrestore(&ipic_lock, flags);			\
- }
- 
- BUILD_IPIC_INTERNAL(32);
-@@ -167,8 +180,10 @@ static void bcm63xx_external_irq_mask(st
- {
- 	unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
- 	u32 reg, regaddr;
-+	unsigned long flags;
- 
- 	regaddr = get_ext_irq_perf_reg(irq);
-+	spin_lock_irqsave(&epic_lock, flags);
- 	reg = bcm_perf_readl(regaddr);
- 
- 	if (BCMCPU_IS_6348())
-@@ -177,6 +192,8 @@ static void bcm63xx_external_irq_mask(st
- 		reg &= ~EXTIRQ_CFG_MASK(irq % 4);
- 
- 	bcm_perf_writel(reg, regaddr);
-+	spin_unlock_irqrestore(&epic_lock, flags);
-+
- 	if (is_ext_irq_cascaded)
- 		internal_irq_mask(irq + ext_irq_start);
- }
-@@ -185,8 +202,10 @@ static void bcm63xx_external_irq_unmask(
- {
- 	unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
- 	u32 reg, regaddr;
-+	unsigned long flags;
- 
- 	regaddr = get_ext_irq_perf_reg(irq);
-+	spin_lock_irqsave(&epic_lock, flags);
- 	reg = bcm_perf_readl(regaddr);
- 
- 	if (BCMCPU_IS_6348())
-@@ -195,6 +214,7 @@ static void bcm63xx_external_irq_unmask(
- 		reg |= EXTIRQ_CFG_MASK(irq % 4);
- 
- 	bcm_perf_writel(reg, regaddr);
-+	spin_unlock_irqrestore(&epic_lock, flags);
- 
- 	if (is_ext_irq_cascaded)
- 		internal_irq_unmask(irq + ext_irq_start);
-@@ -204,8 +224,10 @@ static void bcm63xx_external_irq_clear(s
- {
- 	unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
- 	u32 reg, regaddr;
-+	unsigned long flags;
- 
- 	regaddr = get_ext_irq_perf_reg(irq);
-+	spin_lock_irqsave(&epic_lock, flags);
- 	reg = bcm_perf_readl(regaddr);
- 
- 	if (BCMCPU_IS_6348())
-@@ -214,6 +236,7 @@ static void bcm63xx_external_irq_clear(s
- 		reg |= EXTIRQ_CFG_CLEAR(irq % 4);
- 
- 	bcm_perf_writel(reg, regaddr);
-+	spin_unlock_irqrestore(&epic_lock, flags);
- }
- 
- static int bcm63xx_external_irq_set_type(struct irq_data *d,
-@@ -222,6 +245,7 @@ static int bcm63xx_external_irq_set_type
- 	unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
- 	u32 reg, regaddr;
- 	int levelsense, sense, bothedge;
-+	unsigned long flags;
- 
- 	flow_type &= IRQ_TYPE_SENSE_MASK;
- 
-@@ -256,6 +280,7 @@ static int bcm63xx_external_irq_set_type
- 	}
- 
- 	regaddr = get_ext_irq_perf_reg(irq);
-+	spin_lock_irqsave(&epic_lock, flags);
- 	reg = bcm_perf_readl(regaddr);
- 	irq %= 4;
- 
-@@ -300,6 +325,7 @@ static int bcm63xx_external_irq_set_type
- 	}
- 
- 	bcm_perf_writel(reg, regaddr);
-+	spin_unlock_irqrestore(&epic_lock, flags);
- 
- 	irqd_set_trigger_type(d, flow_type);
- 	if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))

target/linux/brcm63xx/patches-3.10/325-MIPS-BCM63XX-wire-up-the-second-cpu-s-irq-line.patch

@@ -1,93 +0,0 @@
-From 6e74b82aca08a5ecc4d2f0780254468659427e82 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Fri, 26 Apr 2013 12:03:15 +0200
-Subject: [PATCH 08/10] MIPS: BCM63XX: wire up the second cpu's irq line
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/irq.c | 44 +++++++++++++++++++++++++++++++++++++-------
- 1 file changed, 37 insertions(+), 7 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -102,11 +102,17 @@ static void __internal_irq_mask_##width(
- 	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
- 	unsigned bit = irq & 0x1f;					\
- 	unsigned long flags;						\
-+	int cpu;							\
- 									\
- 	spin_lock_irqsave(&ipic_lock, flags);				\
--	val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));		\
--	val &= ~(1 << bit);						\
--	bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));		\
-+	for_each_present_cpu(cpu) {					\
-+		if (!irq_mask_addr[cpu])				\
-+			break;						\
-+									\
-+		val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
-+		val &= ~(1 << bit);					\
-+		bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
-+	}								\
- 	spin_unlock_irqrestore(&ipic_lock, flags);			\
- }									\
- 									\
-@@ -116,11 +122,20 @@ static void __internal_irq_unmask_##widt
- 	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
- 	unsigned bit = irq & 0x1f;					\
- 	unsigned long flags;						\
-+	int cpu;							\
- 									\
- 	spin_lock_irqsave(&ipic_lock, flags);				\
--	val = bcm_readl(irq_mask_addr[0] + reg * sizeof(u32));		\
--	val |= (1 << bit);						\
--	bcm_writel(val, irq_mask_addr[0] + reg * sizeof(u32));		\
-+	for_each_present_cpu(cpu) {					\
-+		if (!irq_mask_addr[cpu])				\
-+			break;						\
-+									\
-+		val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
-+		if (cpu_online(cpu))					\
-+			val |= (1 << bit);				\
-+		else							\
-+			val &= ~(1 << bit);				\
-+		bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
-+	}								\
- 	spin_unlock_irqrestore(&ipic_lock, flags);			\
- }
- 
-@@ -145,7 +160,10 @@ asmlinkage void plat_irq_dispatch(void)
- 			do_IRQ(1);
- 		if (cause & CAUSEF_IP2)
- 			dispatch_internal(0);
--		if (!is_ext_irq_cascaded) {
-+		if (is_ext_irq_cascaded) {
-+			if (cause & CAUSEF_IP3)
-+				dispatch_internal(1);
-+		} else {
- 			if (cause & CAUSEF_IP3)
- 				do_IRQ(IRQ_EXT_0);
- 			if (cause & CAUSEF_IP4)
-@@ -358,6 +376,14 @@ static struct irqaction cpu_ip2_cascade_
- 	.flags		= IRQF_NO_THREAD,
- };
- 
-+#ifdef CONFIG_SMP
-+static struct irqaction cpu_ip3_cascade_action = {
-+	.handler	= no_action,
-+	.name		= "cascade_ip3",
-+	.flags		= IRQF_NO_THREAD,
-+};
-+#endif
-+
- static struct irqaction cpu_ext_cascade_action = {
- 	.handler	= no_action,
- 	.name		= "cascade_extirq",
-@@ -494,4 +520,8 @@ void __init arch_init_irq(void)
- 	}
- 
- 	setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
-+#ifdef CONFIG_SMP
-+	if (is_ext_irq_cascaded)
-+		setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
-+#endif
- }

target/linux/brcm63xx/patches-3.10/326-MIPS-BCM63XX-use-irq_desc-as-argument-for-un-mask.patch

@@ -1,83 +0,0 @@
-From e23dc903cd69d32d407ea1b7310bc9a71e00d359 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Tue, 30 Apr 2013 11:26:53 +0200
-Subject: [PATCH 09/10] MIPS: BCM63XX: use irq_desc as argument for (un)mask
-
-In preparation for applying affinity, use the irq descriptor as the
-argument for (un)mask.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/irq.c | 18 ++++++++++--------
- 1 file changed, 10 insertions(+), 8 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -31,8 +31,8 @@ static int is_ext_irq_cascaded;
- static unsigned int ext_irq_count;
- static unsigned int ext_irq_start, ext_irq_end;
- static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
--static void (*internal_irq_mask)(unsigned int irq);
--static void (*internal_irq_unmask)(unsigned int irq);
-+static void (*internal_irq_mask)(struct irq_data *d);
-+static void (*internal_irq_unmask)(struct irq_data *d);
- 
- 
- static inline u32 get_ext_irq_perf_reg(int irq)
-@@ -96,9 +96,10 @@ void __dispatch_internal_##width(int cpu
- 	}								\
- }									\
- 									\
--static void __internal_irq_mask_##width(unsigned int irq)		\
-+static void __internal_irq_mask_##width(struct irq_data *d)		\
- {									\
- 	u32 val;							\
-+	unsigned irq = d->irq - IRQ_INTERNAL_BASE;			\
- 	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
- 	unsigned bit = irq & 0x1f;					\
- 	unsigned long flags;						\
-@@ -116,9 +117,10 @@ static void __internal_irq_mask_##width(
- 	spin_unlock_irqrestore(&ipic_lock, flags);			\
- }									\
- 									\
--static void __internal_irq_unmask_##width(unsigned int irq)		\
-+static void __internal_irq_unmask_##width(struct irq_data *d)		\
- {									\
- 	u32 val;							\
-+	unsigned irq = d->irq - IRQ_INTERNAL_BASE;			\
- 	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
- 	unsigned bit = irq & 0x1f;					\
- 	unsigned long flags;						\
-@@ -182,12 +184,12 @@ asmlinkage void plat_irq_dispatch(void)
-  */
- static void bcm63xx_internal_irq_mask(struct irq_data *d)
- {
--	internal_irq_mask(d->irq - IRQ_INTERNAL_BASE);
-+	internal_irq_mask(d);
- }
- 
- static void bcm63xx_internal_irq_unmask(struct irq_data *d)
- {
--	internal_irq_unmask(d->irq - IRQ_INTERNAL_BASE);
-+	internal_irq_unmask(d);
- }
- 
- /*
-@@ -213,7 +215,7 @@ static void bcm63xx_external_irq_mask(st
- 	spin_unlock_irqrestore(&epic_lock, flags);
- 
- 	if (is_ext_irq_cascaded)
--		internal_irq_mask(irq + ext_irq_start);
-+		internal_irq_mask(irq_get_irq_data(irq + ext_irq_start));
- }
- 
- static void bcm63xx_external_irq_unmask(struct irq_data *d)
-@@ -235,7 +237,7 @@ static void bcm63xx_external_irq_unmask(
- 	spin_unlock_irqrestore(&epic_lock, flags);
- 
- 	if (is_ext_irq_cascaded)
--		internal_irq_unmask(irq + ext_irq_start);
-+		internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start));
- }
- 
- static void bcm63xx_external_irq_clear(struct irq_data *d)

target/linux/brcm63xx/patches-3.10/327-MIPS-BCM63XX-allow-setting-affinity-for-IPIC.patch

@@ -1,118 +0,0 @@
-From 23493b47d8caaa59b18627a01bf443c3b50bb530 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Fri, 26 Apr 2013 12:06:03 +0200
-Subject: [PATCH 10/10] MIPS: BCM63XX: allow setting affinity for IPIC
-
-Wire up the set_affinity call for the internal PIC if booting on
-a cpu supporting it.
-Affinity is kept to boot cpu as default.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/irq.c | 46 ++++++++++++++++++++++++++++++++++++++++------
- 1 file changed, 40 insertions(+), 6 deletions(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -32,7 +32,7 @@ static unsigned int ext_irq_count;
- static unsigned int ext_irq_start, ext_irq_end;
- static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
- static void (*internal_irq_mask)(struct irq_data *d);
--static void (*internal_irq_unmask)(struct irq_data *d);
-+static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m);
- 
- 
- static inline u32 get_ext_irq_perf_reg(int irq)
-@@ -51,6 +51,20 @@ static inline void handle_internal(int i
- 		do_IRQ(intbit + IRQ_INTERNAL_BASE);
- }
- 
-+static inline int enable_irq_for_cpu(int cpu, struct irq_data *d,
-+				     const struct cpumask *m)
-+{
-+	bool enable = cpu_online(cpu);
-+
-+#ifdef CONFIG_SMP
-+	if (m)
-+		enable &= cpu_isset(cpu, *m);
-+	else if (irqd_affinity_was_set(d))
-+		enable &= cpu_isset(cpu, *d->affinity);
-+#endif
-+	return enable;
-+}
-+
- /*
-  * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
-  * prioritize any interrupt relatively to another. the static counter
-@@ -117,7 +131,8 @@ static void __internal_irq_mask_##width(
- 	spin_unlock_irqrestore(&ipic_lock, flags);			\
- }									\
- 									\
--static void __internal_irq_unmask_##width(struct irq_data *d)		\
-+static void __internal_irq_unmask_##width(struct irq_data *d,		\
-+					  const struct cpumask *m)	\
- {									\
- 	u32 val;							\
- 	unsigned irq = d->irq - IRQ_INTERNAL_BASE;			\
-@@ -132,7 +147,7 @@ static void __internal_irq_unmask_##widt
- 			break;						\
- 									\
- 		val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
--		if (cpu_online(cpu))					\
-+		if (enable_irq_for_cpu(cpu, d, m))			\
- 			val |= (1 << bit);				\
- 		else							\
- 			val &= ~(1 << bit);				\
-@@ -189,7 +204,7 @@ static void bcm63xx_internal_irq_mask(st
- 
- static void bcm63xx_internal_irq_unmask(struct irq_data *d)
- {
--	internal_irq_unmask(d);
-+	internal_irq_unmask(d, NULL);
- }
- 
- /*
-@@ -237,7 +252,8 @@ static void bcm63xx_external_irq_unmask(
- 	spin_unlock_irqrestore(&epic_lock, flags);
- 
- 	if (is_ext_irq_cascaded)
--		internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start));
-+		internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start),
-+				    NULL);
- }
- 
- static void bcm63xx_external_irq_clear(struct irq_data *d)
-@@ -356,6 +372,18 @@ static int bcm63xx_external_irq_set_type
- 	return IRQ_SET_MASK_OK_NOCOPY;
- }
- 
-+#ifdef CONFIG_SMP
-+static int bcm63xx_internal_set_affinity(struct irq_data *data,
-+					 const struct cpumask *dest,
-+					 bool force)
-+{
-+	if (!irqd_irq_disabled(data))
-+		internal_irq_unmask(data, dest);
-+
-+	return 0;
-+}
-+#endif
-+
- static struct irq_chip bcm63xx_internal_irq_chip = {
- 	.name		= "bcm63xx_ipic",
- 	.irq_mask	= bcm63xx_internal_irq_mask,
-@@ -523,7 +551,13 @@ void __init arch_init_irq(void)
- 
- 	setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
- #ifdef CONFIG_SMP
--	if (is_ext_irq_cascaded)
-+	if (is_ext_irq_cascaded) {
- 		setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
-+		bcm63xx_internal_irq_chip.irq_set_affinity =
-+			bcm63xx_internal_set_affinity;
-+
-+		cpumask_clear(irq_default_affinity);
-+		cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
-+	}
- #endif
- }

target/linux/brcm63xx/patches-3.10/328-cfe_simplify_detection.patch

@@ -1,20 +0,0 @@
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
-@@ -1,6 +1,8 @@
- #ifndef BCM63XX_BOARD_H_
- #define BCM63XX_BOARD_H_
- 
-+#include <asm/bootinfo.h>
-+
- const char *board_get_name(void);
- 
- void board_prom_init(void);
-@@ -9,4 +11,8 @@ void board_setup(void);
- 
- int board_register_devices(void);
- 
-+static inline bool bcm63xx_is_cfe_present(void) {
-+	return fw_arg3 == 0x43464531;
-+}
-+
- #endif /* ! BCM63XX_BOARD_H_ */

target/linux/brcm63xx/patches-3.10/329-bcm63xxpart_use_cfedetection.patch

@@ -1,51 +0,0 @@
---- a/drivers/mtd/bcm63xxpart.c
-+++ b/drivers/mtd/bcm63xxpart.c
-@@ -35,7 +35,7 @@
- 
- #include <linux/bcm963xx_tag.h>
- #include <asm/mach-bcm63xx/bcm63xx_nvram.h>
--#include <asm/mach-bcm63xx/board_bcm963xx.h>
-+#include <asm/mach-bcm63xx/bcm63xx_board.h>
- 
- #define BCM63XX_EXTENDED_SIZE	0xBFC00000	/* Extended flash address */
- 
-@@ -43,30 +43,6 @@
- 
- #define BCM63XX_CFE_MAGIC_OFFSET 0x4e0
- 
--static int bcm63xx_detect_cfe(struct mtd_info *master)
--{
--	char buf[9];
--	int ret;
--	size_t retlen;
--
--	ret = mtd_read(master, BCM963XX_CFE_VERSION_OFFSET, 5, &retlen,
--		       (void *)buf);
--	buf[retlen] = 0;
--
--	if (ret)
--		return ret;
--
--	if (strncmp("cfe-v", buf, 5) == 0)
--		return 0;
--
--	/* very old CFE's do not have the cfe-v string, so check for magic */
--	ret = mtd_read(master, BCM63XX_CFE_MAGIC_OFFSET, 8, &retlen,
--		       (void *)buf);
--	buf[retlen] = 0;
--
--	return strncmp("CFE1CFE1", buf, 8);
--}
--
- static int bcm63xx_parse_cfe_partitions(struct mtd_info *master,
- 					struct mtd_partition **pparts,
- 					struct mtd_part_parser_data *data)
-@@ -85,7 +61,7 @@ static int bcm63xx_parse_cfe_partitions(
- 	u32 computed_crc;
- 	bool rootfs_first = false;
- 
--	if (bcm63xx_detect_cfe(master))
-+	if (!bcm63xx_is_cfe_present())
- 		return -EINVAL;
- 
- 	cfe_erasesize = max_t(uint32_t, master->erasesize,

target/linux/brcm63xx/patches-3.10/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch

@@ -1,77 +0,0 @@
-From 994ed2c168ce27483724cd0c387f752d1ccd30e7 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 7 Dec 2013 14:08:36 +0100
-Subject: [PATCH 20/45] MIPS: BCM63XX: add a new cpu variant helper
-
----
- arch/mips/bcm63xx/cpu.c                          | 10 ++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
- 2 files changed, 28 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs);
- u16 bcm63xx_cpu_id __read_mostly;
- EXPORT_SYMBOL(bcm63xx_cpu_id);
- 
-+static u32 bcm63xx_cpu_variant __read_mostly;
-+
- static u8 bcm63xx_cpu_rev;
- static unsigned int bcm63xx_cpu_freq;
- static unsigned int bcm63xx_memory_size;
-@@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = {
- 
- };
- 
-+u32 bcm63xx_get_cpu_variant(void)
-+{
-+	return bcm63xx_cpu_variant;
-+}
-+
-+EXPORT_SYMBOL(bcm63xx_get_cpu_variant);
-+
- u8 bcm63xx_get_cpu_rev(void)
- {
- 	return bcm63xx_cpu_rev;
-@@ -332,6 +341,7 @@ void __init bcm63xx_cpu_init(void)
- 	/* read out CPU type */
- 	tmp = bcm_readl(chipid_reg);
- 	bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
-+	bcm63xx_cpu_variant = bcm63xx_cpu_id;
- 	bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
- 
- 	switch (bcm63xx_cpu_id) {
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -19,6 +19,7 @@
- #define BCM6368_CPU_ID		0x6368
- 
- void __init bcm63xx_cpu_init(void);
-+u32 bcm63xx_get_cpu_variant(void);
- u8 bcm63xx_get_cpu_rev(void);
- unsigned int bcm63xx_get_cpu_freq(void);
- 
-@@ -82,6 +83,23 @@ static inline u16 __pure bcm63xx_get_cpu
- #define BCMCPU_IS_6362()	(bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
- #define BCMCPU_IS_6368()	(bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
- 
-+#define BCMCPU_VARIANT_IS_3368() \
-+	(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6328() \
-+	(bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6338() \
-+	(bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6345() \
-+	(bcm63xx_get_cpu_variant() == BCM6345_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6348() \
-+	(bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6358() \
-+	(bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6362() \
-+	(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6368() \
-+	(bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
-+
- /*
-  * While registers sets are (mostly) the same across 63xx CPU, base
-  * address of these sets do change.

target/linux/brcm63xx/patches-3.10/331-MIPS-BCM63XX-define-variant-id-field.patch

@@ -1,23 +0,0 @@
-From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 7 Dec 2013 14:22:41 +0100
-Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field
-
-Some SoC have a variant id field in the chip id register.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -9,6 +9,8 @@
- #define PERF_REV_REG			0x0
- #define REV_CHIPID_SHIFT		16
- #define REV_CHIPID_MASK			(0xffff << REV_CHIPID_SHIFT)
-+#define REV_VARID_SHIFT			12
-+#define REV_VARID_MASK			(0xf << REV_VARID_SHIFT)
- #define REV_REVID_SHIFT			0
- #define REV_REVID_MASK			(0xff << REV_REVID_SHIFT)
- 

target/linux/brcm63xx/patches-3.10/332-MIPS-BCM63XX-detect-BCM6328-variants.patch

@@ -1,68 +0,0 @@
-From d59120f23279ef62a48d9f94847254b061d0a8b6 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 7 Dec 2013 14:30:59 +0100
-Subject: [PATCH 22/45] MIPS: BCM63XX: detect BCM6328 variants
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/cpu.c                          | 10 ++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h |  8 ++++++--
- 2 files changed, 16 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -304,6 +304,7 @@ void __init bcm63xx_cpu_init(void)
- 	struct cpuinfo_mips *c = &current_cpu_data;
- 	unsigned int cpu = smp_processor_id();
- 	u32 chipid_reg;
-+	u8 __maybe_unused varid = 0;
- 
- 	/* soc registers location depends on cpu type */
- 	chipid_reg = 0;
-@@ -343,6 +344,7 @@ void __init bcm63xx_cpu_init(void)
- 	bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
- 	bcm63xx_cpu_variant = bcm63xx_cpu_id;
- 	bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-+	varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
- 
- 	switch (bcm63xx_cpu_id) {
- 	case BCM3368_CPU_ID:
-@@ -352,6 +354,14 @@ void __init bcm63xx_cpu_init(void)
- 	case BCM6328_CPU_ID:
- 		bcm63xx_regs_base = bcm6328_regs_base;
- 		bcm63xx_irqs = bcm6328_irqs;
-+
-+		if (varid == 1)
-+			bcm63xx_cpu_variant = BCM63281_CPU_ID;
-+		else if (varid == 3)
-+			bcm63xx_cpu_variant = BCM63283_CPU_ID;
-+		else
-+			pr_warn("unknown BCM6328 variant: %x\n", varid);
-+
- 		break;
- 	case BCM6338_CPU_ID:
- 		bcm63xx_regs_base = bcm6338_regs_base;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -11,6 +11,8 @@
-  */
- #define BCM3368_CPU_ID		0x3368
- #define BCM6328_CPU_ID		0x6328
-+#define BCM63281_CPU_ID		0x63281
-+#define BCM63283_CPU_ID		0x63283
- #define BCM6338_CPU_ID		0x6338
- #define BCM6345_CPU_ID		0x6345
- #define BCM6348_CPU_ID		0x6348
-@@ -85,8 +87,10 @@ static inline u16 __pure bcm63xx_get_cpu
- 
- #define BCMCPU_VARIANT_IS_3368() \
- 	(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
--#define BCMCPU_VARIANT_IS_6328() \
--	(bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63281() \
-+	(bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63283() \
-+	(bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
- #define BCMCPU_VARIANT_IS_6338() \
- 	(bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
- #define BCMCPU_VARIANT_IS_6345() \

target/linux/brcm63xx/patches-3.10/333-MIPS-BCM63XX-detect-BCM6362-variants.patch

@@ -1,46 +0,0 @@
-From 04458c3db8eb79da21ecde40ab36a1dde52bef06 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 7 Dec 2013 14:33:28 +0100
-Subject: [PATCH 23/45] MIPS: BCM63XX: detect BCM6362 variants
-
----
- arch/mips/bcm63xx/cpu.c                          | 8 ++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
- 2 files changed, 11 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -382,6 +382,14 @@ void __init bcm63xx_cpu_init(void)
- 	case BCM6362_CPU_ID:
- 		bcm63xx_regs_base = bcm6362_regs_base;
- 		bcm63xx_irqs = bcm6362_irqs;
-+
-+		if (varid == 1)
-+			bcm63xx_cpu_variant = BCM6362_CPU_ID;
-+		else if (varid == 2)
-+			bcm63xx_cpu_variant = BCM6361_CPU_ID;
-+		else
-+			pr_warn("unknown BCM6362 variant: %x\n", varid);
-+
- 		break;
- 	case BCM6368_CPU_ID:
- 		bcm63xx_regs_base = bcm6368_regs_base;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -17,6 +17,7 @@
- #define BCM6345_CPU_ID		0x6345
- #define BCM6348_CPU_ID		0x6348
- #define BCM6358_CPU_ID		0x6358
-+#define BCM6361_CPU_ID		0x6361
- #define BCM6362_CPU_ID		0x6362
- #define BCM6368_CPU_ID		0x6368
- 
-@@ -99,6 +100,8 @@ static inline u16 __pure bcm63xx_get_cpu
- 	(bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
- #define BCMCPU_VARIANT_IS_6358() \
- 	(bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6361() \
-+	(bcm63xx_get_cpu_variant() == BCM6361_CPU_ID)
- #define BCMCPU_VARIANT_IS_6362() \
- 	(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
- #define BCMCPU_VARIANT_IS_6368() \

target/linux/brcm63xx/patches-3.10/334-MIPS-BCM63XX-detect-BCM6368-variants.patch

@@ -1,48 +0,0 @@
-From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 7 Dec 2013 14:36:56 +0100
-Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants
-
-The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart
-from missing DSL, there is no difference to BCM6368, so treat it such.
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/cpu.c                          | 4 ++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
- 2 files changed, 7 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -392,8 +392,12 @@ void __init bcm63xx_cpu_init(void)
- 
- 		break;
- 	case BCM6368_CPU_ID:
-+	case BCM6369_CPU_ID:
- 		bcm63xx_regs_base = bcm6368_regs_base;
- 		bcm63xx_irqs = bcm6368_irqs;
-+
-+		/* BCM6369 is a BCM6368 without xDSL, so treat it the same */
-+		bcm63xx_cpu_id = BCM6368_CPU_ID;
- 		break;
- 	default:
- 		panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -20,6 +20,7 @@
- #define BCM6361_CPU_ID		0x6361
- #define BCM6362_CPU_ID		0x6362
- #define BCM6368_CPU_ID		0x6368
-+#define BCM6369_CPU_ID		0x6369
- 
- void __init bcm63xx_cpu_init(void);
- u32 bcm63xx_get_cpu_variant(void);
-@@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu
- 	(bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
- #define BCMCPU_VARIANT_IS_6368() \
- 	(bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6369() \
-+	(bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
- 
- /*
-  * While registers sets are (mostly) the same across 63xx CPU, base

target/linux/brcm63xx/patches-3.10/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch

@@ -1,20 +0,0 @@
-From f67f8134b4537c8bbafe7e1975edfe808b813997 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 8 Dec 2013 03:05:54 +0100
-Subject: [PATCH 45/53] MIPS: BCM63XX: fix PCIe memory window size
-
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -41,7 +41,7 @@
- 					BCM_CB_MEM_SIZE - 1)
- 
- #define BCM_PCIE_MEM_BASE_PA		0x10f00000
--#define BCM_PCIE_MEM_SIZE		(16 * 1024 * 1024)
-+#define BCM_PCIE_MEM_SIZE		(1 * 1024 * 1024)
- #define BCM_PCIE_MEM_END_PA		(BCM_PCIE_MEM_BASE_PA +		\
- 					BCM_PCIE_MEM_SIZE - 1)
- 

target/linux/brcm63xx/patches-3.10/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch

@@ -1,70 +0,0 @@
-From aa05464973bc176478af462ca7c53a9239c651d4 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 8 Dec 2013 03:13:06 +0100
-Subject: [PATCH 46/53] MIPS: BCM63XX: dynamically set the pcie memory windows
-
-Different SoCs use different memory windows (and sizes), so don't
-hardcode it.
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h |  8 ++++----
- arch/mips/pci/pci-bcm63xx.c                     | 15 ++++++++++-----
- 2 files changed, 14 insertions(+), 9 deletions(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -40,10 +40,10 @@
- #define BCM_CB_MEM_END_PA		(BCM_CB_MEM_BASE_PA +		\
- 					BCM_CB_MEM_SIZE - 1)
- 
--#define BCM_PCIE_MEM_BASE_PA		0x10f00000
--#define BCM_PCIE_MEM_SIZE		(1 * 1024 * 1024)
--#define BCM_PCIE_MEM_END_PA		(BCM_PCIE_MEM_BASE_PA +		\
--					BCM_PCIE_MEM_SIZE - 1)
-+#define BCM_PCIE_MEM_BASE_PA_6328	0x10f00000
-+#define BCM_PCIE_MEM_SIZE_6328		(1 * 1024 * 1024)
-+#define BCM_PCIE_MEM_END_PA_6328	(BCM_PCIE_MEM_BASE_PA_6328 +	\
-+					BCM_PCIE_MEM_SIZE_6328 - 1)
- 
- /*
-  * Internal registers are accessed through KSEG3
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -77,8 +77,8 @@ struct pci_controller bcm63xx_cb_control
- 
- static struct resource bcm_pcie_mem_resource = {
- 	.name	= "bcm63xx PCIe memory space",
--	.start	= BCM_PCIE_MEM_BASE_PA,
--	.end	= BCM_PCIE_MEM_END_PA,
-+	.start	= 0,
-+	.end	= 0,
- 	.flags	= IORESOURCE_MEM,
- };
- 
-@@ -195,12 +195,12 @@ static int __init bcm63xx_register_pcie(
- 	bcm_pcie_writel(val, PCIE_CONFIG2_REG);
- 
- 	/* set bar0 to little endian */
--	val = (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_BASE_SHIFT;
--	val |= (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_MASK_SHIFT;
-+	val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
-+	val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
- 	val |= BASEMASK_REMAP_EN;
- 	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
- 
--	val = (BCM_PCIE_MEM_BASE_PA >> 20) << REBASE_ADDR_BASE_SHIFT;
-+	val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
- 	bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
- 
- 	register_pci_controller(&bcm63xx_pcie_controller);
-@@ -334,6 +334,11 @@ static int __init bcm63xx_pci_init(void)
- 	if (!bcm63xx_pci_enabled)
- 		return -ENODEV;
- 
-+	if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
-+		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
-+		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
-+	}
-+
- 	switch (bcm63xx_get_cpu_id()) {
- 	case BCM6328_CPU_ID:
- 	case BCM6362_CPU_ID:

target/linux/brcm63xx/patches-3.10/337-MIPS-BCM63XX-widen-cpuid-field.patch

@@ -1,47 +0,0 @@
-From f1477f6e3551fd6beecfee5368fed1325dcd421f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 7 Dec 2013 14:54:51 +0100
-Subject: [PATCH 47/53] MIPS: BCM63XX: widen cpuid field
-
----
- arch/mips/bcm63xx/cpu.c                          | 2 +-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++----
- 2 files changed, 5 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -24,7 +24,7 @@ EXPORT_SYMBOL(bcm63xx_regs_base);
- const int *bcm63xx_irqs;
- EXPORT_SYMBOL(bcm63xx_irqs);
- 
--u16 bcm63xx_cpu_id __read_mostly;
-+u32 bcm63xx_cpu_id __read_mostly;
- EXPORT_SYMBOL(bcm63xx_cpu_id);
- 
- static u32 bcm63xx_cpu_variant __read_mostly;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -27,7 +27,7 @@ u32 bcm63xx_get_cpu_variant(void);
- u8 bcm63xx_get_cpu_rev(void);
- unsigned int bcm63xx_get_cpu_freq(void);
- 
--static inline u16 __pure __bcm63xx_get_cpu_id(const u16 cpu_id)
-+static inline u32 __pure __bcm63xx_get_cpu_id(const u32 cpu_id)
- {
- 	switch (cpu_id) {
- #ifdef CONFIG_BCM63XX_CPU_3368
-@@ -69,11 +69,11 @@ static inline u16 __pure __bcm63xx_get_c
- 	return cpu_id;
- }
- 
--extern u16 bcm63xx_cpu_id;
-+extern u32 bcm63xx_cpu_id;
- 
--static inline u16 __pure bcm63xx_get_cpu_id(void)
-+static inline u32 __pure bcm63xx_get_cpu_id(void)
- {
--	const u16 cpu_id = bcm63xx_cpu_id;
-+	const u32 cpu_id = bcm63xx_cpu_id;
- 
- 	return __bcm63xx_get_cpu_id(cpu_id);
- }

target/linux/brcm63xx/patches-3.10/338-MIPS-BCM63XX-increase-number-of-IRQs.patch

@@ -1,39 +0,0 @@
-From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 15 Dec 2013 20:46:26 +0100
-Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs
-
-Newer SoCs have 128 bit wide irq registers, thus 128 available internal
-interupts.
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++-
- arch/mips/include/asm/mach-bcm63xx/irq.h         | 2 +-
- 2 files changed, 4 insertions(+), 2 deletions(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
-@@ -1,10 +1,12 @@
- #ifndef BCM63XX_IRQ_H_
- #define BCM63XX_IRQ_H_
- 
-+#include <irq.h>
- #include <bcm63xx_cpu.h>
- 
- #define IRQ_INTERNAL_BASE		8
--#define IRQ_EXTERNAL_BASE		100
-+#define NR_INTERNAL_IRQS		128
-+#define IRQ_EXTERNAL_BASE		(IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS)
- #define IRQ_EXT_0			(IRQ_EXTERNAL_BASE + 0)
- #define IRQ_EXT_1			(IRQ_EXTERNAL_BASE + 1)
- #define IRQ_EXT_2			(IRQ_EXTERNAL_BASE + 2)
---- a/arch/mips/include/asm/mach-bcm63xx/irq.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/irq.h
-@@ -1,7 +1,7 @@
- #ifndef __ASM_MACH_BCM63XX_IRQ_H
- #define __ASM_MACH_BCM63XX_IRQ_H
- 
--#define NR_IRQS 128
-+#define NR_IRQS 256
- #define MIPS_CPU_IRQ_BASE 0
- 
- #endif

target/linux/brcm63xx/patches-3.10/339-MIPS-BCM63XX-add-support-for-BCM63268.patch

@@ -1,769 +0,0 @@
-From 98f63141190ac02c58b78d58f771bd263c61d756 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sat, 7 Dec 2013 17:14:17 +0100
-Subject: [PATCH 48/56] MIPS: BCM63XX: add support for BCM63268
-
-Signed-off-by: Jonas Gorski <[email protected]>
----
- arch/mips/bcm63xx/Kconfig                         |   5 +
- arch/mips/bcm63xx/boards/board_bcm963xx.c         |   2 +-
- arch/mips/bcm63xx/clk.c                           |  25 ++++-
- arch/mips/bcm63xx/cpu.c                           |  59 +++++++++-
- arch/mips/bcm63xx/dev-flash.c                     |   6 +
- arch/mips/bcm63xx/dev-spi.c                       |   4 +-
- arch/mips/bcm63xx/irq.c                           |  20 +++-
- arch/mips/bcm63xx/reset.c                         |  21 ++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h  | 130 ++++++++++++++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h |   2 +
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |  79 +++++++++++++
- arch/mips/include/asm/mach-bcm63xx/ioremap.h      |   1 +
- 12 files changed, 342 insertions(+), 12 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -60,6 +60,11 @@ config BCM63XX_CPU_6368
- 	select HW_HAS_PCI
- 	select BCM63XX_OHCI
- 	select BCM63XX_EHCI
-+
-+config BCM63XX_CPU_63268
-+	bool "support 63268 CPU"
-+	select SYS_HAS_CPU_BMIPS4350
-+	select HW_HAS_PCI
- endmenu
- 
- source "arch/mips/bcm63xx/boards/Kconfig"
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -765,7 +765,7 @@ void __init board_prom_init(void)
- 	/* read base address of boot chip select (0)
- 	 * 6328/6362 do not have MPI but boot from a fixed address
- 	 */
--	if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
-+	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
- 		val = 0x18000000;
- 	} else {
- 		val = bcm_mpi_readl(MPI_CSBASE_REG(0));
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -133,6 +133,8 @@ static void enetsw_set(struct clk *clk,
- 				CKCTL_6368_SWPKT_USB_EN |
- 				CKCTL_6368_SWPKT_SAR_EN,
- 				enable);
-+	else if (BCMCPU_IS_63268())
-+		bcm_hwclock_set(CKCTL_63268_ROBOSW_EN, enable);
- 	else
- 		return;
- 
-@@ -177,6 +179,8 @@ static void usbh_set(struct clk *clk, in
- 		bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
- 	else if (BCMCPU_IS_6368())
- 		bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
-+	else if (BCMCPU_IS_63268())
-+		bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
- 	else
- 		return;
- 
-@@ -199,6 +203,8 @@ static void usbd_set(struct clk *clk, in
- 		bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
- 	else if (BCMCPU_IS_6368())
- 		bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
-+	else if (BCMCPU_IS_63268())
-+		bcm_hwclock_set(CKCTL_63268_USBD_EN, enable);
- 	else
- 		return;
- 
-@@ -225,9 +231,13 @@ static void spi_set(struct clk *clk, int
- 		mask = CKCTL_6358_SPI_EN;
- 	else if (BCMCPU_IS_6362())
- 		mask = CKCTL_6362_SPI_EN;
--	else
--		/* BCMCPU_IS_6368 */
-+	else if (BCMCPU_IS_6368())
- 		mask = CKCTL_6368_SPI_EN;
-+	else if (BCMCPU_IS_63268())
-+		mask = CKCTL_63268_SPI_EN;
-+	else
-+		return;
-+
- 	bcm_hwclock_set(mask, enable);
- }
- 
-@@ -246,6 +256,8 @@ static void hsspi_set(struct clk *clk, i
- 		mask = CKCTL_6328_HSSPI_EN;
- 	else if (BCMCPU_IS_6362())
- 		mask = CKCTL_6362_HSSPI_EN;
-+	else if (BCMCPU_IS_63268())
-+		mask = CKCTL_63268_HSSPI_EN;
- 	else
- 		return;
- 
-@@ -307,6 +319,8 @@ static void pcie_set(struct clk *clk, in
- 		bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
- 	else if (BCMCPU_IS_6362())
- 		bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
-+	else if (BCMCPU_IS_63268())
-+		bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
- }
- 
- static struct clk clk_pcie = {
-@@ -374,9 +388,11 @@ struct clk *clk_get(struct device *dev,
- 		return &clk_periph;
- 	if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm"))
- 		return &clk_pcm;
--	if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec"))
-+	if ((BCMCPU_IS_6362() || BCMCPU_IS_6368() || BCMCPU_IS_63268()) &&
-+	    !strcmp(id, "ipsec"))
- 		return &clk_ipsec;
--	if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie"))
-+	if ((BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) &&
-+	    !strcmp(id, "pcie"))
- 		return &clk_pcie;
- 	return ERR_PTR(-ENOENT);
- }
-@@ -399,6 +415,7 @@ static int __init bcm63xx_clk_init(void)
- 		clk_hsspi.rate = HSSPI_PLL_HZ_6328;
- 		break;
- 	case BCM6362_CPU_ID:
-+	case BCM63268_CPU_ID:
- 		clk_hsspi.rate = HSSPI_PLL_HZ_6362;
- 		break;
- 	}
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -101,6 +101,15 @@ static const int bcm6368_irqs[] = {
- 
- };
- 
-+static const unsigned long bcm63268_regs_base[] = {
-+	__GEN_CPU_REGS_TABLE(63268)
-+};
-+
-+static const int bcm63268_irqs[] = {
-+	__GEN_CPU_IRQ_TABLE(63268)
-+
-+};
-+
- u32 bcm63xx_get_cpu_variant(void)
- {
- 	return bcm63xx_cpu_variant;
-@@ -251,6 +260,27 @@ static unsigned int detect_cpu_clock(voi
- 
- 		return (((64 * 1000000) / p1) * p2 * ndiv) / m1;
- 	}
-+	case BCM63268_CPU_ID:
-+	{
-+		unsigned int tmp, mips_pll_fcvo;
-+
-+		tmp = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
-+		mips_pll_fcvo = (tmp & STRAPBUS_63268_FCVO_MASK) >>
-+				STRAPBUS_63268_FCVO_SHIFT;
-+		switch (mips_pll_fcvo) {
-+		case 0x3:
-+		case 0xe:
-+			return 320000000;
-+		case 0xa:
-+			return 333000000;
-+		case 0x2:
-+		case 0xb:
-+		case 0xf:
-+			return 400000000;
-+		default:
-+			return 0;
-+		}
-+	}
- 
- 	default:
- 		BUG();
-@@ -265,7 +295,7 @@ static unsigned int detect_memory_size(v
- 	unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
- 	u32 val;
- 
--	if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
-+	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
- 		return bcm_ddr_readl(DDR_CSEND_REG) << 24;
- 
- 	if (BCMCPU_IS_6345()) {
-@@ -304,6 +334,7 @@ void __init bcm63xx_cpu_init(void)
- 	struct cpuinfo_mips *c = &current_cpu_data;
- 	unsigned int cpu = smp_processor_id();
- 	u32 chipid_reg;
-+	bool long_chipid = false;
- 	u8 __maybe_unused varid = 0;
- 
- 	/* soc registers location depends on cpu type */
-@@ -325,6 +356,9 @@ void __init bcm63xx_cpu_init(void)
- 		case 0x10:
- 			chipid_reg = BCM_6345_PERF_BASE;
- 			break;
-+		case 0x80:
-+			long_chipid = true;
-+			/* fall-through */
- 		default:
- 			chipid_reg = BCM_6368_PERF_BASE;
- 			break;
-@@ -332,6 +366,7 @@ void __init bcm63xx_cpu_init(void)
- 		break;
- 	}
- 
-+
- 	/*
- 	 * really early to panic, but delaying panic would not help since we
- 	 * will never get any working console
-@@ -341,10 +376,17 @@ void __init bcm63xx_cpu_init(void)
- 
- 	/* read out CPU type */
- 	tmp = bcm_readl(chipid_reg);
--	bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
--	bcm63xx_cpu_variant = bcm63xx_cpu_id;
-+
-+	if (long_chipid) {
-+		bcm63xx_cpu_id = tmp & REV_LONG_CHIPID_MASK;
-+		bcm63xx_cpu_id >>= REV_LONG_CHIPID_SHIFT;
-+	} else {
-+		bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
-+		varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
-+	}
-+
- 	bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
--	varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
-+	bcm63xx_cpu_variant = bcm63xx_cpu_id;
- 
- 	switch (bcm63xx_cpu_id) {
- 	case BCM3368_CPU_ID:
-@@ -399,6 +441,15 @@ void __init bcm63xx_cpu_init(void)
- 		/* BCM6369 is a BCM6368 without xDSL, so treat it the same */
- 		bcm63xx_cpu_id = BCM6368_CPU_ID;
- 		break;
-+	case BCM63168_CPU_ID:
-+	case BCM63169_CPU_ID:
-+	case BCM63268_CPU_ID:
-+	case BCM63269_CPU_ID:
-+		bcm63xx_regs_base = bcm63268_regs_base;
-+		bcm63xx_irqs = bcm63268_irqs;
-+
-+		bcm63xx_cpu_id = BCM63268_CPU_ID;
-+		break;
- 	default:
- 		panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
- 		break;
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -94,6 +94,12 @@ static int __init bcm63xx_detect_flash_t
- 		case STRAPBUS_6368_BOOT_SEL_PARALLEL:
- 			return BCM63XX_FLASH_TYPE_PARALLEL;
- 		}
-+	case BCM63268_CPU_ID:
-+		val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
-+		if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
-+			return BCM63XX_FLASH_TYPE_SERIAL;
-+		else
-+			return BCM63XX_FLASH_TYPE_NAND;
- 	default:
- 		return -EINVAL;
- 	}
---- a/arch/mips/bcm63xx/dev-spi.c
-+++ b/arch/mips/bcm63xx/dev-spi.c
-@@ -37,7 +37,7 @@ static __init void bcm63xx_spi_regs_init
- 	if (BCMCPU_IS_6338() || BCMCPU_IS_6348())
- 		bcm63xx_regs_spi = bcm6348_regs_spi;
- 	if (BCMCPU_IS_3368() || BCMCPU_IS_6358() ||
--		BCMCPU_IS_6362() || BCMCPU_IS_6368())
-+		BCMCPU_IS_6362() || BCMCPU_IS_6368() || BCMCPU_IS_63268())
- 		bcm63xx_regs_spi = bcm6358_regs_spi;
- }
- 
-@@ -85,7 +85,7 @@ int __init bcm63xx_spi_register(void)
- 	}
- 
- 	if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
--		BCMCPU_IS_6368()) {
-+		BCMCPU_IS_6368() || BCMCPU_IS_63268()) {
- 		spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
- 		spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
- 		spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT;
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -158,6 +158,7 @@ static void __internal_irq_unmask_##widt
- 
- BUILD_IPIC_INTERNAL(32);
- BUILD_IPIC_INTERNAL(64);
-+BUILD_IPIC_INTERNAL(128);
- 
- asmlinkage void plat_irq_dispatch(void)
- {
-@@ -343,6 +344,7 @@ static int bcm63xx_external_irq_set_type
- 	case BCM6358_CPU_ID:
- 	case BCM6362_CPU_ID:
- 	case BCM6368_CPU_ID:
-+	case BCM63268_CPU_ID:
- 		if (levelsense)
- 			reg |= EXTIRQ_CFG_LEVELSENSE(irq);
- 		else
-@@ -515,6 +517,18 @@ static void bcm63xx_init_irq(void)
- 		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
- 		ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
- 		break;
-+	case BCM63268_CPU_ID:
-+		irq_stat_addr[0] += PERF_IRQSTAT_63268_REG(0);
-+		irq_mask_addr[0] += PERF_IRQMASK_63268_REG(0);
-+		irq_stat_addr[1] += PERF_IRQSTAT_63268_REG(1);
-+		irq_mask_addr[1] += PERF_IRQMASK_63268_REG(1);
-+		irq_bits = 128;
-+		ext_irq_count = 4;
-+		is_ext_irq_cascaded = 1;
-+		ext_irq_start = BCM_63268_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-+		ext_irq_end = BCM_63268_EXT_IRQ3 - IRQ_INTERNAL_BASE;
-+		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_63268;
-+		break;
- 	default:
- 		BUG();
- 	}
-@@ -523,10 +537,14 @@ static void bcm63xx_init_irq(void)
- 		dispatch_internal = __dispatch_internal_32;
- 		internal_irq_mask = __internal_irq_mask_32;
- 		internal_irq_unmask = __internal_irq_unmask_32;
--	} else {
-+	} else if (irq_bits == 64) {
- 		dispatch_internal = __dispatch_internal_64;
- 		internal_irq_mask = __internal_irq_mask_64;
- 		internal_irq_unmask = __internal_irq_unmask_64;
-+	} else {
-+		dispatch_internal = __dispatch_internal_128;
-+		internal_irq_mask = __internal_irq_mask_128;
-+		internal_irq_unmask = __internal_irq_unmask_128;
- 	}
- }
- 
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -125,6 +125,20 @@
- #define BCM6368_RESET_PCIE	0
- #define BCM6368_RESET_PCIE_EXT	0
- 
-+#define BCM63268_RESET_SPI	SOFTRESET_63268_SPI_MASK
-+#define BCM63268_RESET_ENET	0
-+#define BCM63268_RESET_USBH	SOFTRESET_63268_USBH_MASK
-+#define BCM63268_RESET_USBD	SOFTRESET_63268_USBS_MASK
-+#define BCM63268_RESET_DSL	0
-+#define BCM63268_RESET_SAR	SOFTRESET_63268_SAR_MASK
-+#define BCM63268_RESET_EPHY	0
-+#define BCM63268_RESET_ENETSW	SOFTRESET_63268_ENETSW_MASK
-+#define BCM63268_RESET_PCM	SOFTRESET_63268_PCM_MASK
-+#define BCM63268_RESET_MPI	0
-+#define BCM63268_RESET_PCIE	(SOFTRESET_63268_PCIE_MASK | \
-+				 SOFTRESET_63268_PCIE_CORE_MASK)
-+#define BCM63268_RESET_PCIE_EXT	SOFTRESET_63268_PCIE_EXT_MASK
-+
- /*
-  * core reset bits
-  */
-@@ -156,6 +170,10 @@ static const u32 bcm6368_reset_bits[] =
- 	__GEN_RESET_BITS_TABLE(6368)
- };
- 
-+static const u32 bcm63268_reset_bits[] = {
-+	__GEN_RESET_BITS_TABLE(63268)
-+};
-+
- const u32 *bcm63xx_reset_bits;
- static int reset_reg;
- 
-@@ -182,6 +200,9 @@ static int __init bcm63xx_reset_bits_ini
- 	} else if (BCMCPU_IS_6368()) {
- 		reset_reg = PERF_SOFTRESET_6368_REG;
- 		bcm63xx_reset_bits = bcm6368_reset_bits;
-+	} else if (BCMCPU_IS_63268()) {
-+		reset_reg = PERF_SOFTRESET_63268_REG;
-+		bcm63xx_reset_bits = bcm63268_reset_bits;
- 	}
- 
- 	return 0;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -21,6 +21,10 @@
- #define BCM6362_CPU_ID		0x6362
- #define BCM6368_CPU_ID		0x6368
- #define BCM6369_CPU_ID		0x6369
-+#define BCM63168_CPU_ID		0x63168
-+#define BCM63169_CPU_ID		0x63169
-+#define BCM63268_CPU_ID		0x63268
-+#define BCM63269_CPU_ID		0x63269
- 
- void __init bcm63xx_cpu_init(void);
- u32 bcm63xx_get_cpu_variant(void);
-@@ -61,6 +65,10 @@ static inline u32 __pure __bcm63xx_get_c
- #ifdef CONFIG_BCM63XX_CPU_6368
- 		case BCM6368_CPU_ID:
- #endif
-+
-+#ifdef CONFIG_BCM63XX_CPU_63268
-+		case BCM63268_CPU_ID:
-+#endif
- 		break;
- 	default:
- 		unreachable();
-@@ -86,6 +94,7 @@ static inline u32 __pure bcm63xx_get_cpu
- #define BCMCPU_IS_6358()	(bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
- #define BCMCPU_IS_6362()	(bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
- #define BCMCPU_IS_6368()	(bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
-+#define BCMCPU_IS_63268()	(bcm63xx_get_cpu_id() == BCM63268_CPU_ID)
- 
- #define BCMCPU_VARIANT_IS_3368() \
- 	(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
-@@ -109,6 +118,14 @@ static inline u32 __pure bcm63xx_get_cpu
- 	(bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
- #define BCMCPU_VARIANT_IS_6369() \
- 	(bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63168() \
-+	(bcm63xx_get_cpu_variant() == BCM63168_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63169() \
-+	(bcm63xx_get_cpu_variant() == BCM63169_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63268() \
-+	(bcm63xx_get_cpu_variant() == BCM63268_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63269() \
-+	(bcm63xx_get_cpu_variant() == BCM63269_CPU_ID)
- 
- /*
-  * While registers sets are (mostly) the same across 63xx CPU, base
-@@ -573,6 +590,52 @@ enum bcm63xx_regs_set {
- #define BCM_6368_RNG_BASE		(0xb0004180)
- #define BCM_6368_MISC_BASE		(0xdeadbeef)
- 
-+/*
-+ * 63268 register sets base address
-+ */
-+#define BCM_63268_DSL_LMEM_BASE		(0xdeadbeef)
-+#define BCM_63268_PERF_BASE		(0xb0000000)
-+#define BCM_63268_TIMER_BASE		(0xb0000080)
-+#define BCM_63268_WDT_BASE		(0xb000009c)
-+#define BCM_63268_UART0_BASE		(0xb0000180)
-+#define BCM_63268_UART1_BASE		(0xb00001a0)
-+#define BCM_63268_GPIO_BASE		(0xb00000c0)
-+#define BCM_63268_SPI_BASE		(0xb0000800)
-+#define BCM_63268_HSSPI_BASE		(0xb0001000)
-+#define BCM_63268_UDC0_BASE		(0xdeadbeef)
-+#define BCM_63268_USBDMA_BASE		(0xb000c800)
-+#define BCM_63268_OHCI0_BASE		(0xb0002600)
-+#define BCM_63268_OHCI_PRIV_BASE	(0xdeadbeef)
-+#define BCM_63268_USBH_PRIV_BASE	(0xb0002700)
-+#define BCM_63268_USBD_BASE		(0xb0002400)
-+#define BCM_63268_MPI_BASE		(0xdeadbeef)
-+#define BCM_63268_PCMCIA_BASE		(0xdeadbeef)
-+#define BCM_63268_PCIE_BASE		(0xb06e0000)
-+#define BCM_63268_SDRAM_REGS_BASE	(0xdeadbeef)
-+#define BCM_63268_DSL_BASE		(0xdeadbeef)
-+#define BCM_63268_UBUS_BASE		(0xdeadbeef)
-+#define BCM_63268_ENET0_BASE		(0xdeadbeef)
-+#define BCM_63268_ENET1_BASE		(0xdeadbeef)
-+#define BCM_63268_ENETDMA_BASE		(0xb000d800)
-+#define BCM_63268_ENETDMAC_BASE		(0xb000da00)
-+#define BCM_63268_ENETDMAS_BASE		(0xb000dc00)
-+#define BCM_63268_ENETSW_BASE		(0xb0700000)
-+#define BCM_63268_EHCI0_BASE		(0xb0002500)
-+#define BCM_63268_SDRAM_BASE		(0xdeadbeef)
-+#define BCM_63268_MEMC_BASE		(0xdeadbeef)
-+#define BCM_63268_DDR_BASE		(0xb0003000)
-+#define BCM_63268_M2M_BASE		(0xdeadbeef)
-+#define BCM_63268_ATM_BASE		(0xdeadbeef)
-+#define BCM_63268_XTM_BASE		(0xb0007000)
-+#define BCM_63268_XTMDMA_BASE		(0xb000b800)
-+#define BCM_63268_XTMDMAC_BASE		(0xdeadbeef)
-+#define BCM_63268_XTMDMAS_BASE		(0xdeadbeef)
-+#define BCM_63268_PCM_BASE		(0xb000b000)
-+#define BCM_63268_PCMDMA_BASE		(0xb000b800)
-+#define BCM_63268_PCMDMAC_BASE		(0xdeadbeef)
-+#define BCM_63268_PCMDMAS_BASE		(0xdeadbeef)
-+#define BCM_63268_RNG_BASE		(0xdeadbeef)
-+#define BCM_63268_MISC_BASE		(0xb0001800)
- 
- extern const unsigned long *bcm63xx_regs_base;
- 
-@@ -1084,6 +1147,73 @@ enum bcm63xx_irq {
- #define BCM_6368_EXT_IRQ4		(IRQ_INTERNAL_BASE + 24)
- #define BCM_6368_EXT_IRQ5		(IRQ_INTERNAL_BASE + 25)
- 
-+/*
-+ * 63268 irqs
-+ */
-+#define BCM_63268_HIGH_IRQ_BASE		(IRQ_INTERNAL_BASE + 32)
-+#define BCM_63268_VERY_HIGH_IRQ_BASE	(BCM_63268_HIGH_IRQ_BASE + 32)
-+
-+#define BCM_63268_TIMER_IRQ		(IRQ_INTERNAL_BASE + 0)
-+#define BCM_63268_SPI_IRQ		(BCM_63268_VERY_HIGH_IRQ_BASE + 16)
-+#define BCM_63268_UART0_IRQ		(IRQ_INTERNAL_BASE + 5)
-+#define BCM_63268_UART1_IRQ		(BCM_63268_HIGH_IRQ_BASE + 2)
-+#define BCM_63268_DSL_IRQ		(IRQ_INTERNAL_BASE + 23)
-+#define BCM_63268_UDC0_IRQ		0
-+#define BCM_63268_ENET0_IRQ		0
-+#define BCM_63268_ENET1_IRQ		0
-+#define BCM_63268_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 13)
-+#define BCM_63268_HSSPI_IRQ		(IRQ_INTERNAL_BASE + 6)
-+#define BCM_63268_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 9)
-+#define BCM_63268_EHCI0_IRQ		(IRQ_INTERNAL_BASE + 10)
-+#define BCM_63268_USBD_IRQ		(IRQ_INTERNAL_BASE + 11)
-+#define BCM_63268_USBD_RXDMA0_IRQ	(IRQ_INTERNAL_BASE + 19)
-+#define BCM_63268_USBD_TXDMA0_IRQ	(BCM_63268_HIGH_IRQ_BASE + 4)
-+#define BCM_63268_USBD_RXDMA1_IRQ	(IRQ_INTERNAL_BASE + 20)
-+#define BCM_63268_USBD_TXDMA1_IRQ	(BCM_63268_HIGH_IRQ_BASE + 5)
-+#define BCM_63268_USBD_RXDMA2_IRQ	(IRQ_INTERNAL_BASE + 21)
-+#define BCM_63268_USBD_TXDMA2_IRQ	(BCM_63268_HIGH_IRQ_BASE + 6)
-+#define BCM_63268_PCMCIA_IRQ		0
-+#define BCM_63268_ENET0_RXDMA_IRQ	0
-+#define BCM_63268_ENET0_TXDMA_IRQ	0
-+#define BCM_63268_ENET1_RXDMA_IRQ	0
-+#define BCM_63268_ENET1_TXDMA_IRQ	0
-+#define BCM_63268_PCI_IRQ		(BCM_63268_HIGH_IRQ_BASE + 8)
-+#define BCM_63268_ATM_IRQ		0
-+#define BCM_63268_ENETSW_RXDMA0_IRQ	(IRQ_INTERNAL_BASE + 1)
-+#define BCM_63268_ENETSW_RXDMA1_IRQ	(IRQ_INTERNAL_BASE + 2)
-+#define BCM_63268_ENETSW_RXDMA2_IRQ	(IRQ_INTERNAL_BASE + 3)
-+#define BCM_63268_ENETSW_RXDMA3_IRQ	(IRQ_INTERNAL_BASE + 4)
-+#define BCM_63268_ENETSW_TXDMA0_IRQ	(BCM_63268_VERY_HIGH_IRQ_BASE + 0)
-+#define BCM_63268_ENETSW_TXDMA1_IRQ	(BCM_63268_VERY_HIGH_IRQ_BASE + 1)
-+#define BCM_63268_ENETSW_TXDMA2_IRQ	(BCM_63268_VERY_HIGH_IRQ_BASE + 2)
-+#define BCM_63268_ENETSW_TXDMA3_IRQ	(BCM_63268_VERY_HIGH_IRQ_BASE + 3)
-+#define BCM_63268_XTM_IRQ		(BCM_63268_HIGH_IRQ_BASE + 17)
-+#define BCM_63268_XTM_DMA0_IRQ		(IRQ_INTERNAL_BASE + 26)
-+
-+#define BCM_63268_RING_OSC_IRQ		(BCM_63268_HIGH_IRQ_BASE + 20)
-+#define BCM_63268_WLAN_GPIO_IRQ		(BCM_63268_HIGH_IRQ_BASE + 3)
-+#define BCM_63268_WLAN_IRQ		(IRQ_INTERNAL_BASE + 7)
-+#define BCM_63268_IPSEC_IRQ		(IRQ_INTERNAL_BASE + 8)
-+#define BCM_63268_NAND_IRQ		(BCM_63268_HIGH_IRQ_BASE + 18)
-+#define BCM_63268_PCM_IRQ		(IRQ_INTERNAL_BASE + 13)
-+#define BCM_63268_DG_IRQ		(IRQ_INTERNAL_BASE + 15)
-+#define BCM_63268_EPHY_ENERGY0_IRQ	(IRQ_INTERNAL_BASE + 16)
-+#define BCM_63268_EPHY_ENERGY1_IRQ	(IRQ_INTERNAL_BASE + 17)
-+#define BCM_63268_EPHY_ENERGY2_IRQ	(IRQ_INTERNAL_BASE + 18)
-+#define BCM_63268_EPHY_ENERGY3_IRQ	(IRQ_INTERNAL_BASE + 19)
-+#define BCM_63268_IPSEC_DMA0_IRQ	(IRQ_INTERNAL_BASE + 22)
-+#define BCM_63268_IPSEC_DMA1_IRQ	(BCM_63268_HIGH_IRQ_BASE + 7)
-+#define BCM_63268_FAP0_IRQ		(IRQ_INTERNAL_BASE + 24)
-+#define BCM_63268_FAP1_IRQ		(IRQ_INTERNAL_BASE + 25)
-+#define BCM_63268_PCM_DMA0_IRQ		(BCM_63268_HIGH_IRQ_BASE + 10)
-+#define BCM_63268_PCM_DMA1_IRQ		(BCM_63268_HIGH_IRQ_BASE + 11)
-+#define BCM_63268_DECT0_IRQ		(BCM_63268_HIGH_IRQ_BASE + 0)
-+#define BCM_63268_DECT1_IRQ		(BCM_63268_HIGH_IRQ_BASE + 1)
-+#define BCM_63268_EXT_IRQ0		(BCM_63268_HIGH_IRQ_BASE + 12)
-+#define BCM_63268_EXT_IRQ1		(BCM_63268_HIGH_IRQ_BASE + 13)
-+#define BCM_63268_EXT_IRQ2		(BCM_63268_HIGH_IRQ_BASE + 14)
-+#define BCM_63268_EXT_IRQ3		(BCM_63268_HIGH_IRQ_BASE + 15)
-+
- extern const int *bcm63xx_irqs;
- 
- #define __GEN_CPU_IRQ_TABLE(__cpu)					\
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-@@ -22,6 +22,8 @@ static inline unsigned long bcm63xx_gpio
- 		return 48;
- 	case BCM6368_CPU_ID:
- 		return 38;
-+	case BCM63268_CPU_ID:
-+		return 52;
- 	case BCM6348_CPU_ID:
- 	default:
- 		return 37;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -9,6 +9,8 @@
- #define PERF_REV_REG			0x0
- #define REV_CHIPID_SHIFT		16
- #define REV_CHIPID_MASK			(0xffff << REV_CHIPID_SHIFT)
-+#define REV_LONG_CHIPID_SHIFT		12
-+#define REV_LONG_CHIPID_MASK		(0xfffff << REV_LONG_CHIPID_SHIFT)
- #define REV_VARID_SHIFT			12
- #define REV_VARID_MASK			(0xf << REV_VARID_SHIFT)
- #define REV_REVID_SHIFT			0
-@@ -211,6 +213,52 @@
- 					CKCTL_6368_NAND_EN |		\
- 					CKCTL_6368_IPSEC_EN)
- 
-+#define CKCTL_63268_DISABLE_GLESS	(1 << 0)
-+#define CKCTL_63268_VDSL_QPROC_EN	(1 << 1)
-+#define CKCTL_63268_VDSL_AFE_EN		(1 << 2)
-+#define CKCTL_63268_VDSL_EN		(1 << 3)
-+#define CKCTL_63268_MIPS_EN		(1 << 4)
-+#define CKCTL_63268_WLAN_OCP_EN		(1 << 5)
-+#define CKCTL_63268_DECT_EN		(1 << 6)
-+#define CKCTL_63268_FAP0_EN		(1 << 7)
-+#define CKCTL_63268_FAP1_EN		(1 << 8)
-+#define CKCTL_63268_SAR_EN		(1 << 9)
-+#define CKCTL_63268_ROBOSW_EN		(1 << 10)
-+#define CKCTL_63268_PCM_EN		(1 << 11)
-+#define CKCTL_63268_USBD_EN		(1 << 12)
-+#define CKCTL_63268_USBH_EN		(1 << 13)
-+#define CKCTL_63268_IPSEC_EN		(1 << 14)
-+#define CKCTL_63268_SPI_EN		(1 << 15)
-+#define CKCTL_63268_HSSPI_EN		(1 << 16)
-+#define CKCTL_63268_PCIE_EN		(1 << 17)
-+#define CKCTL_63268_PHYMIPS_EN		(1 << 18)
-+#define CKCTL_63268_GMAC_EN		(1 << 19)
-+#define CKCTL_63268_NAND_EN		(1 << 20)
-+#define CKCTL_63268_TBUS_EN		(1 << 27)
-+#define CKCTL_63268_ROBOSW250_EN	(1 << 31)
-+
-+#define CKCTL_63268_ALL_SAFE_EN		(CKCTL_63268_VDSL_QPROC_EN |	\
-+					CKCTL_63268_VDSL_AFE_EN |	\
-+					CKCTL_63268_VDSL_EN |		\
-+					CKCTL_63268_WLAN_OCP_EN |	\
-+					CKCTL_63268_DECT_EN |		\
-+					CKCTL_63268_FAP0_EN |		\
-+					CKCTL_63268_FAP1_EN |		\
-+					CKCTL_63268_SAR_EN |		\
-+					CKCTL_63268_ROBOSW_EN |		\
-+					CKCTL_63268_PCM_EN |		\
-+					CKCTL_63268_USBD_EN |		\
-+					CKCTL_63268_USBH_EN |		\
-+					CKCTL_63268_IPSEC_EN |		\
-+					CKCTL_63268_SPI_EN |		\
-+					CKCTL_63268_HSSPI_EN |		\
-+					CKCTL_63268_PCIE_EN |		\
-+					CKCTL_63268_PHYMIPS_EN |	\
-+					CKCTL_63268_GMAC_EN |		\
-+					CKCTL_63268_NAND_EN |		\
-+					CKCTL_63268_TBUS_EN |		\
-+					CKCTL_63268_ROBOSW250_EN)
-+
- /* System PLL Control register	*/
- #define PERF_SYS_PLL_CTL_REG		0x8
- #define SYS_PLL_SOFT_RESET		0x1
-@@ -224,6 +272,7 @@
- #define PERF_IRQMASK_6358_REG(x)	(0xc + (x) * 0x2c)
- #define PERF_IRQMASK_6362_REG(x)	(0x20 + (x) * 0x10)
- #define PERF_IRQMASK_6368_REG(x)	(0x20 + (x) * 0x10)
-+#define PERF_IRQMASK_63268_REG(x)	(0x20 + (x) * 0x20)
- 
- /* Interrupt Status register */
- #define PERF_IRQSTAT_3368_REG		0x10
-@@ -234,6 +283,7 @@
- #define PERF_IRQSTAT_6358_REG(x)	(0x10 + (x) * 0x2c)
- #define PERF_IRQSTAT_6362_REG(x)	(0x28 + (x) * 0x10)
- #define PERF_IRQSTAT_6368_REG(x)	(0x28 + (x) * 0x10)
-+#define PERF_IRQSTAT_63268_REG(x)	(0x30 + (x) * 0x20)
- 
- /* External Interrupt Configuration register */
- #define PERF_EXTIRQ_CFG_REG_3368	0x14
-@@ -244,6 +294,7 @@
- #define PERF_EXTIRQ_CFG_REG_6358	0x14
- #define PERF_EXTIRQ_CFG_REG_6362	0x18
- #define PERF_EXTIRQ_CFG_REG_6368	0x18
-+#define PERF_EXTIRQ_CFG_REG_63268	0x18
- 
- #define PERF_EXTIRQ_CFG_REG2_6368	0x1c
- 
-@@ -273,6 +324,7 @@
- #define PERF_SOFTRESET_6358_REG		0x34
- #define PERF_SOFTRESET_6362_REG		0x10
- #define PERF_SOFTRESET_6368_REG		0x10
-+#define PERF_SOFTRESET_63268_REG	0x10
- 
- #define SOFTRESET_3368_SPI_MASK		(1 << 0)
- #define SOFTRESET_3368_ENET_MASK	(1 << 2)
-@@ -366,6 +418,26 @@
- #define SOFTRESET_6368_USBH_MASK	(1 << 12)
- #define SOFTRESET_6368_PCM_MASK		(1 << 13)
- 
-+#define SOFTRESET_63268_SPI_MASK	(1 << 0)
-+#define SOFTRESET_63268_IPSEC_MASK	(1 << 1)
-+#define SOFTRESET_63268_EPHY_MASK	(1 << 2)
-+#define SOFTRESET_63268_SAR_MASK	(1 << 3)
-+#define SOFTRESET_63268_ENETSW_MASK	(1 << 4)
-+#define SOFTRESET_63268_USBS_MASK	(1 << 5)
-+#define SOFTRESET_63268_USBH_MASK	(1 << 6)
-+#define SOFTRESET_63268_PCM_MASK	(1 << 7)
-+#define SOFTRESET_63268_PCIE_CORE_MASK	(1 << 8)
-+#define SOFTRESET_63268_PCIE_MASK	(1 << 9)
-+#define SOFTRESET_63268_PCIE_EXT_MASK	(1 << 10)
-+#define SOFTRESET_63268_WLAN_SHIM_MASK	(1 << 11)
-+#define SOFTRESET_63268_DDR_PHY_MASK	(1 << 12)
-+#define SOFTRESET_63268_FAP0_MASK	(1 << 13)
-+#define SOFTRESET_63268_WLAN_UBUS_MASK	(1 << 14)
-+#define SOFTRESET_63268_DECT_MASK	(1 << 15)
-+#define SOFTRESET_63268_FAP1_MASK	(1 << 16)
-+#define SOFTRESET_63268_PCIE_HARD_MASK	(1 << 17)
-+#define SOFTRESET_63268_GPHY_MASK	(1 << 18)
-+
- /* MIPS PLL control register */
- #define PERF_MIPSPLLCTL_REG		0x34
- #define MIPSPLLCTL_N1_SHIFT		20
-@@ -1499,6 +1571,13 @@
- #define STRAPBUS_6362_BOOT_SEL_SERIAL	(1 << 15)
- #define STRAPBUS_6362_BOOT_SEL_NAND	(0 << 15)
- 
-+#define MISC_STRAPBUS_63268_REG		0x14
-+#define STRAPBUS_63268_HSSPI_CLK_FAST	(1 << 9)
-+#define STRAPBUS_63268_BOOT_SEL_SERIAL	(1 << 11)
-+#define STRAPBUS_63268_BOOT_SEL_NAND	(0 << 11)
-+#define STRAPBUS_63268_FCVO_SHIFT	21
-+#define STRAPBUS_63268_FCVO_MASK	(0xf << STRAPBUS_63268_FCVO_SHIFT)
-+
- #define MISC_STRAPBUS_6328_REG		0x240
- #define STRAPBUS_6328_FCVO_SHIFT	7
- #define STRAPBUS_6328_FCVO_MASK		(0x1f << STRAPBUS_6328_FCVO_SHIFT)
---- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-@@ -25,6 +25,7 @@ static inline int is_bcm63xx_internal_re
- 	case BCM6328_CPU_ID:
- 	case BCM6362_CPU_ID:
- 	case BCM6368_CPU_ID:
-+	case BCM63268_CPU_ID:
- 		if (offset >= 0xb0000000 && offset < 0xb1000000)
- 			return 1;
- 		break;
---- a/arch/mips/bcm63xx/dev-hsspi.c
-+++ b/arch/mips/bcm63xx/dev-hsspi.c
-@@ -35,7 +35,7 @@ static struct platform_device bcm63xx_hs
- 
- int __init bcm63xx_hsspi_register(void)
- {
--	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362())
-+	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
- 		return -ENODEV;
- 
- 	spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
---- a/arch/mips/bcm63xx/dev-enet.c
-+++ b/arch/mips/bcm63xx/dev-enet.c
-@@ -176,7 +176,8 @@ static int __init register_shared(void)
- 	else
- 		shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
- 
--	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
-+	if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
-+		BCMCPU_IS_63268())
- 		chan_count = 32;
- 	else if (BCMCPU_IS_6345())
- 		chan_count = 8;
-@@ -276,7 +277,8 @@ bcm63xx_enetsw_register(const struct bcm
- {
- 	int ret;
- 
--	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
-+		!BCMCPU_IS_63268())
- 		return -ENODEV;
- 
- 	ret = register_shared();
-@@ -295,8 +297,11 @@ bcm63xx_enetsw_register(const struct bcm
- 
- 	if (BCMCPU_IS_6328())
- 		enetsw_pd.num_ports = ENETSW_PORTS_6328;
--	else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
-+	else if (BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
-+		 BCMCPU_VARIANT_IS_63168() || BCMCPU_VARIANT_IS_63169())
- 		enetsw_pd.num_ports = ENETSW_PORTS_6368;
-+	else if (BCMCPU_VARIANT_IS_63268() ||  BCMCPU_VARIANT_IS_63269())
-+		enetsw_pd.num_ports = ENETSW_PORTS_63268;
- 
- 	enetsw_pd.dma_has_sram = true;
- 	enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-@@ -62,6 +62,7 @@ struct bcm63xx_enet_platform_data {
- #define ENETSW_MAX_PORT	8
- #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
- #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
-+#define ENETSW_PORTS_63268 8 /* 3 FE PHY + 1 GE PHY + 4 RGMII */
- 
- #define ENETSW_RGMII_PORT0	4
- 

target/linux/brcm63xx/patches-3.10/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch

@@ -1,55 +0,0 @@
-From 5c290c81dbdb4433600593fe80c88eb4af86e791 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <[email protected]>
-Date: Sun, 8 Dec 2013 03:22:40 +0100
-Subject: [PATCH 50/53] MIPS: BCM63XX: add pcie support for BCM63268
-
----
- arch/mips/bcm63xx/reset.c                       | 3 ++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 5 +++++
- arch/mips/pci/pci-bcm63xx.c                     | 4 ++++
- 3 files changed, 11 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -136,7 +136,8 @@
- #define BCM63268_RESET_PCM	SOFTRESET_63268_PCM_MASK
- #define BCM63268_RESET_MPI	0
- #define BCM63268_RESET_PCIE	(SOFTRESET_63268_PCIE_MASK | \
--				 SOFTRESET_63268_PCIE_CORE_MASK)
-+				 SOFTRESET_63268_PCIE_CORE_MASK | \
-+				 SOFTRESET_63268_PCIE_HARD_MASK)
- #define BCM63268_RESET_PCIE_EXT	SOFTRESET_63268_PCIE_EXT_MASK
- 
- /*
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -45,6 +45,11 @@
- #define BCM_PCIE_MEM_END_PA_6328	(BCM_PCIE_MEM_BASE_PA_6328 +	\
- 					BCM_PCIE_MEM_SIZE_6328 - 1)
- 
-+#define BCM_PCIE_MEM_BASE_PA_63268	0x11000000
-+#define BCM_PCIE_MEM_SIZE_63268		(15 * 1024 * 1024)
-+#define BCM_PCIE_MEM_END_PA_63268	(BCM_PCIE_MEM_BASE_PA_63268 +	\
-+					BCM_PCIE_MEM_SIZE_63268 - 1)
-+
- /*
-  * Internal registers are accessed through KSEG3
-  */
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -337,11 +337,15 @@ static int __init bcm63xx_pci_init(void)
- 	if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
- 		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
- 		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
-+	} else if (BCMCPU_IS_63268()) {
-+		bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_63268;
-+		bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_63268;
- 	}
- 
- 	switch (bcm63xx_get_cpu_id()) {
- 	case BCM6328_CPU_ID:
- 	case BCM6362_CPU_ID:
-+	case BCM63268_CPU_ID:
- 		return bcm63xx_register_pcie();
- 	case BCM3368_CPU_ID:
- 	case BCM6348_CPU_ID: