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@@ -69,9 +69,6 @@
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#define RTPCS_93XX_MODEL_NAME_INFO (0x0004)
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#define RTPCS_93XX_CHIP_INFO (0x0008)
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-#define PHY_PAGE_2 2
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-#define PHY_PAGE_4 4
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-
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/* RTL930X SerDes supports the following modes:
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* 0x02: SGMII 0x04: 1000BX_FIBER 0x05: FIBER100
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* 0x06: QSGMII 0x09: RSGMII 0x0d: USXGMII
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@@ -2638,17 +2635,17 @@ static void rtpcs_930x_phy_enable_10g_1g(struct rtpcs_serdes *sds)
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u32 v;
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/* Enable 1GBit PHY */
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- v = rtpcs_sds_read(sds, PHY_PAGE_2, MII_BMCR);
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+ v = rtpcs_sds_read(sds, 0x02, MII_BMCR);
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pr_info("%s 1gbit phy: %08x\n", __func__, v);
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v &= ~BMCR_PDOWN;
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- rtpcs_sds_write(sds, PHY_PAGE_2, MII_BMCR, v);
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+ rtpcs_sds_write(sds, 0x02, MII_BMCR, v);
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pr_info("%s 1gbit phy enabled: %08x\n", __func__, v);
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/* Enable 10GBit PHY */
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- v = rtpcs_sds_read(sds, PHY_PAGE_4, MII_BMCR);
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+ v = rtpcs_sds_read(sds, 0x04, MII_BMCR);
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pr_info("%s 10gbit phy: %08x\n", __func__, v);
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v &= ~BMCR_PDOWN;
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- rtpcs_sds_write(sds, PHY_PAGE_4, MII_BMCR, v);
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+ rtpcs_sds_write(sds, 0x04, MII_BMCR, v);
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pr_info("%s 10gbit phy after: %08x\n", __func__, v);
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/* dal_longan_construct_mac_default_10gmedia_fiber */
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