mach-alfa-ap96.c 4.1 KB

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  1. /*
  2. * ALFA Network AP96 board support
  3. *
  4. * Copyright (C) 2012 Gabor Juhos <[email protected]>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/bitops.h>
  12. #include <linux/gpio.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/mmc/host.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/spi/mmc_spi.h>
  17. #include <asm/mach-ath79/ath79.h>
  18. #include <asm/mach-ath79/ar71xx_regs.h>
  19. #include "common.h"
  20. #include "dev-eth.h"
  21. #include "dev-gpio-buttons.h"
  22. #include "dev-spi.h"
  23. #include "dev-usb.h"
  24. #include "machtypes.h"
  25. #include "pci.h"
  26. #define ALFA_AP96_GPIO_PCIE_RESET 2
  27. #define ALFA_AP96_GPIO_SIM_DETECT 3
  28. #define ALFA_AP96_GPIO_MICROSD_CD 4
  29. #define ALFA_AP96_GPIO_PCIE_W_DISABLE 5
  30. #define ALFA_AP96_GPIO_BUTTON_RESET 11
  31. #define ALFA_AP96_KEYS_POLL_INTERVAL 20 /* msecs */
  32. #define ALFA_AP96_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_AP96_KEYS_POLL_INTERVAL)
  33. static struct gpio_keys_button alfa_ap96_gpio_keys[] __initdata = {
  34. {
  35. .desc = "Reset button",
  36. .type = EV_KEY,
  37. .code = KEY_RESTART,
  38. .debounce_interval = ALFA_AP96_KEYS_DEBOUNCE_INTERVAL,
  39. .gpio = ALFA_AP96_GPIO_BUTTON_RESET,
  40. .active_low = 1,
  41. }
  42. };
  43. static int alfa_ap96_mmc_get_cd(struct device *dev)
  44. {
  45. return !gpio_get_value(ALFA_AP96_GPIO_MICROSD_CD);
  46. }
  47. static struct mmc_spi_platform_data alfa_ap96_mmc_data = {
  48. .get_cd = alfa_ap96_mmc_get_cd,
  49. .caps = MMC_CAP_NEEDS_POLL,
  50. .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
  51. };
  52. static struct ath79_spi_controller_data ap96_spi0_cdata = {
  53. .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
  54. .cs_line = 0,
  55. .is_flash = true,
  56. };
  57. static struct ath79_spi_controller_data ap96_spi1_cdata = {
  58. .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
  59. .cs_line = 1,
  60. };
  61. static struct ath79_spi_controller_data ap96_spi2_cdata = {
  62. .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
  63. .cs_line = 2,
  64. };
  65. static struct spi_board_info alfa_ap96_spi_info[] = {
  66. {
  67. .bus_num = 0,
  68. .chip_select = 0,
  69. .max_speed_hz = 25000000,
  70. .modalias = "m25p80",
  71. .controller_data = &ap96_spi0_cdata
  72. }, {
  73. .bus_num = 0,
  74. .chip_select = 1,
  75. .max_speed_hz = 25000000,
  76. .modalias = "mmc_spi",
  77. .platform_data = &alfa_ap96_mmc_data,
  78. .controller_data = &ap96_spi1_cdata
  79. }, {
  80. .bus_num = 0,
  81. .chip_select = 2,
  82. .max_speed_hz = 6250000,
  83. .modalias = "rtc-pcf2123",
  84. .controller_data = &ap96_spi2_cdata
  85. },
  86. };
  87. static struct ath79_spi_platform_data alfa_ap96_spi_data = {
  88. .bus_num = 0,
  89. .num_chipselect = 3,
  90. };
  91. static void __init alfa_ap96_gpio_setup(void)
  92. {
  93. ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN |
  94. AR71XX_GPIO_FUNC_SPI_CS2_EN);
  95. gpio_request(ALFA_AP96_GPIO_MICROSD_CD, "microSD CD");
  96. gpio_direction_input(ALFA_AP96_GPIO_MICROSD_CD);
  97. gpio_request(ALFA_AP96_GPIO_PCIE_RESET, "PCIe reset");
  98. gpio_direction_output(ALFA_AP96_GPIO_PCIE_RESET, 1);
  99. gpio_request(ALFA_AP96_GPIO_PCIE_W_DISABLE, "PCIe write disable");
  100. gpio_direction_output(ALFA_AP96_GPIO_PCIE_W_DISABLE, 1);
  101. }
  102. #define ALFA_AP96_WAN_PHYMASK BIT(4)
  103. #define ALFA_AP96_LAN_PHYMASK BIT(5)
  104. #define ALFA_AP96_MDIO_PHYMASK (ALFA_AP96_LAN_PHYMASK | ALFA_AP96_WAN_PHYMASK)
  105. static void __init alfa_ap96_init(void)
  106. {
  107. alfa_ap96_gpio_setup();
  108. ath79_register_mdio(0, ~ALFA_AP96_MDIO_PHYMASK);
  109. ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
  110. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  111. ath79_eth0_data.phy_mask = ALFA_AP96_WAN_PHYMASK;
  112. ath79_eth1_pll_data.pll_1000 = 0x110000;
  113. ath79_register_eth(0);
  114. ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
  115. ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  116. ath79_eth1_data.phy_mask = ALFA_AP96_LAN_PHYMASK;
  117. ath79_eth1_pll_data.pll_1000 = 0x110000;
  118. ath79_register_eth(1);
  119. ath79_register_pci();
  120. ath79_register_spi(&alfa_ap96_spi_data, alfa_ap96_spi_info,
  121. ARRAY_SIZE(alfa_ap96_spi_info));
  122. ath79_register_gpio_keys_polled(-1, ALFA_AP96_KEYS_POLL_INTERVAL,
  123. ARRAY_SIZE(alfa_ap96_gpio_keys),
  124. alfa_ap96_gpio_keys);
  125. ath79_register_usb();
  126. }
  127. MIPS_MACHINE(ATH79_MACH_ALFA_AP96, "ALFA-AP96", "ALFA Network AP96",
  128. alfa_ap96_init);