0010-devicetree-bindings-Document-Krait-Scorpion-cpus-and.patch 2.1 KB

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  1. From 236d07c7bb0c758ea40ea0110d37306d2e7d9a4b Mon Sep 17 00:00:00 2001
  2. From: Rohit Vaswani <[email protected]>
  3. Date: Thu, 31 Oct 2013 17:26:33 -0700
  4. Subject: [PATCH 010/182] devicetree: bindings: Document Krait/Scorpion cpus
  5. and enable-method
  6. Scorpion and Krait don't use the spin-table enable-method.
  7. Instead they rely on mmio register accesses to enable power and
  8. clocks to bring CPUs out of reset. Document their enable-methods.
  9. Cc: <[email protected]>
  10. Signed-off-by: Rohit Vaswani <[email protected]>
  11. [sboyd: Split off into separate patch, renamed methods to
  12. match compatible nodes]
  13. Signed-off-by: Stephen Boyd <[email protected]>
  14. Signed-off-by: Kumar Gala <[email protected]>
  15. ---
  16. Documentation/devicetree/bindings/arm/cpus.txt | 25 +++++++++++++++++++++++-
  17. 1 file changed, 24 insertions(+), 1 deletion(-)
  18. --- a/Documentation/devicetree/bindings/arm/cpus.txt
  19. +++ b/Documentation/devicetree/bindings/arm/cpus.txt
  20. @@ -180,7 +180,11 @@ nodes to be present and contain the prop
  21. be one of:
  22. "spin-table"
  23. "psci"
  24. - # On ARM 32-bit systems this property is optional.
  25. + # On ARM 32-bit systems this property is optional and
  26. + can be one of:
  27. + "qcom,gcc-msm8660"
  28. + "qcom,kpss-acc-v1"
  29. + "qcom,kpss-acc-v2"
  30. - cpu-release-addr
  31. Usage: required for systems that have an "enable-method"
  32. @@ -191,6 +195,21 @@ nodes to be present and contain the prop
  33. property identifying a 64-bit zero-initialised
  34. memory location.
  35. + - qcom,saw
  36. + Usage: required for systems that have an "enable-method"
  37. + property value of "qcom,kpss-acc-v1" or
  38. + "qcom,kpss-acc-v2"
  39. + Value type: <phandle>
  40. + Definition: Specifies the SAW[1] node associated with this CPU.
  41. +
  42. + - qcom,acc
  43. + Usage: required for systems that have an "enable-method"
  44. + property value of "qcom,kpss-acc-v1" or
  45. + "qcom,kpss-acc-v2"
  46. + Value type: <phandle>
  47. + Definition: Specifies the ACC[2] node associated with this CPU.
  48. +
  49. +
  50. Example 1 (dual-cluster big.LITTLE system 32-bit):
  51. cpus {
  52. @@ -382,3 +401,7 @@ cpus {
  53. cpu-release-addr = <0 0x20000000>;
  54. };
  55. };
  56. +
  57. +--
  58. +[1] arm/msm/qcom,saw2.txt
  59. +[2] arm/msm/qcom,kpss-acc.txt