0032-pinctrl-msm-Simplify-msm_config_reg-and-callers.patch 2.9 KB

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  1. From 2d9ffb1a3f87396c3b792124870ef63fc27c568f Mon Sep 17 00:00:00 2001
  2. From: Stephen Boyd <[email protected]>
  3. Date: Thu, 6 Mar 2014 22:44:46 -0800
  4. Subject: [PATCH 032/182] pinctrl: msm: Simplify msm_config_reg() and callers
  5. We don't need to check for a negative reg here because reg is
  6. always the same and is always non-negative. Also, collapse the
  7. switch statement down for the duplicate cases.
  8. Signed-off-by: Stephen Boyd <[email protected]>
  9. Acked-by: Bjorn Andersson <[email protected]>
  10. Signed-off-by: Linus Walleij <[email protected]>
  11. ---
  12. drivers/pinctrl/pinctrl-msm.c | 29 +++++------------------------
  13. 1 file changed, 5 insertions(+), 24 deletions(-)
  14. --- a/drivers/pinctrl/pinctrl-msm.c
  15. +++ b/drivers/pinctrl/pinctrl-msm.c
  16. @@ -200,28 +200,17 @@ static const struct pinmux_ops msm_pinmu
  17. static int msm_config_reg(struct msm_pinctrl *pctrl,
  18. const struct msm_pingroup *g,
  19. unsigned param,
  20. - s16 *reg,
  21. unsigned *mask,
  22. unsigned *bit)
  23. {
  24. switch (param) {
  25. case PIN_CONFIG_BIAS_DISABLE:
  26. - *reg = g->ctl_reg;
  27. - *bit = g->pull_bit;
  28. - *mask = 3;
  29. - break;
  30. case PIN_CONFIG_BIAS_PULL_DOWN:
  31. - *reg = g->ctl_reg;
  32. - *bit = g->pull_bit;
  33. - *mask = 3;
  34. - break;
  35. case PIN_CONFIG_BIAS_PULL_UP:
  36. - *reg = g->ctl_reg;
  37. *bit = g->pull_bit;
  38. *mask = 3;
  39. break;
  40. case PIN_CONFIG_DRIVE_STRENGTH:
  41. - *reg = g->ctl_reg;
  42. *bit = g->drv_bit;
  43. *mask = 7;
  44. break;
  45. @@ -230,12 +219,6 @@ static int msm_config_reg(struct msm_pin
  46. return -ENOTSUPP;
  47. }
  48. - if (*reg < 0) {
  49. - dev_err(pctrl->dev, "Config param %04x not supported on group %s\n",
  50. - param, g->name);
  51. - return -ENOTSUPP;
  52. - }
  53. -
  54. return 0;
  55. }
  56. @@ -273,17 +256,16 @@ static int msm_config_group_get(struct p
  57. unsigned mask;
  58. unsigned arg;
  59. unsigned bit;
  60. - s16 reg;
  61. int ret;
  62. u32 val;
  63. g = &pctrl->soc->groups[group];
  64. - ret = msm_config_reg(pctrl, g, param, &reg, &mask, &bit);
  65. + ret = msm_config_reg(pctrl, g, param, &mask, &bit);
  66. if (ret < 0)
  67. return ret;
  68. - val = readl(pctrl->regs + reg);
  69. + val = readl(pctrl->regs + g->ctl_reg);
  70. arg = (val >> bit) & mask;
  71. /* Convert register value to pinconf value */
  72. @@ -323,7 +305,6 @@ static int msm_config_group_set(struct p
  73. unsigned mask;
  74. unsigned arg;
  75. unsigned bit;
  76. - s16 reg;
  77. int ret;
  78. u32 val;
  79. int i;
  80. @@ -334,7 +315,7 @@ static int msm_config_group_set(struct p
  81. param = pinconf_to_config_param(configs[i]);
  82. arg = pinconf_to_config_argument(configs[i]);
  83. - ret = msm_config_reg(pctrl, g, param, &reg, &mask, &bit);
  84. + ret = msm_config_reg(pctrl, g, param, &mask, &bit);
  85. if (ret < 0)
  86. return ret;
  87. @@ -369,10 +350,10 @@ static int msm_config_group_set(struct p
  88. }
  89. spin_lock_irqsave(&pctrl->lock, flags);
  90. - val = readl(pctrl->regs + reg);
  91. + val = readl(pctrl->regs + g->ctl_reg);
  92. val &= ~(mask << bit);
  93. val |= arg << bit;
  94. - writel(val, pctrl->regs + reg);
  95. + writel(val, pctrl->regs + g->ctl_reg);
  96. spin_unlock_irqrestore(&pctrl->lock, flags);
  97. }