0044-dmaengine-qcom_bam_dma-Add-device-tree-binding.patch 1.9 KB

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  1. From b5e19b657e352d565c5ddeae5f6dfd542de9d7e5 Mon Sep 17 00:00:00 2001
  2. From: Andy Gross <[email protected]>
  3. Date: Mon, 10 Mar 2014 16:40:19 -0500
  4. Subject: [PATCH 044/182] dmaengine: qcom_bam_dma: Add device tree binding
  5. Add device tree binding support for the QCOM BAM DMA driver.
  6. Acked-by: Kumar Gala <[email protected]>
  7. Signed-off-by: Andy Gross <[email protected]>
  8. Signed-off-by: Vinod Koul <[email protected]>
  9. ---
  10. .../devicetree/bindings/dma/qcom_bam_dma.txt | 41 ++++++++++++++++++++
  11. 1 file changed, 41 insertions(+)
  12. create mode 100644 Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
  13. --- /dev/null
  14. +++ b/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
  15. @@ -0,0 +1,41 @@
  16. +QCOM BAM DMA controller
  17. +
  18. +Required properties:
  19. +- compatible: must contain "qcom,bam-v1.4.0" for MSM8974
  20. +- reg: Address range for DMA registers
  21. +- interrupts: Should contain the one interrupt shared by all channels
  22. +- #dma-cells: must be <1>, the cell in the dmas property of the client device
  23. + represents the channel number
  24. +- clocks: required clock
  25. +- clock-names: must contain "bam_clk" entry
  26. +- qcom,ee : indicates the active Execution Environment identifier (0-7) used in
  27. + the secure world.
  28. +
  29. +Example:
  30. +
  31. + uart-bam: dma@f9984000 = {
  32. + compatible = "qcom,bam-v1.4.0";
  33. + reg = <0xf9984000 0x15000>;
  34. + interrupts = <0 94 0>;
  35. + clocks = <&gcc GCC_BAM_DMA_AHB_CLK>;
  36. + clock-names = "bam_clk";
  37. + #dma-cells = <1>;
  38. + qcom,ee = <0>;
  39. + };
  40. +
  41. +DMA clients must use the format described in the dma.txt file, using a two cell
  42. +specifier for each channel.
  43. +
  44. +Example:
  45. + serial@f991e000 {
  46. + compatible = "qcom,msm-uart";
  47. + reg = <0xf991e000 0x1000>
  48. + <0xf9944000 0x19000>;
  49. + interrupts = <0 108 0>;
  50. + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
  51. + <&gcc GCC_BLSP1_AHB_CLK>;
  52. + clock-names = "core", "iface";
  53. +
  54. + dmas = <&uart-bam 0>, <&uart-bam 1>;
  55. + dma-names = "rx", "tx";
  56. + };