0084-soc-qcom-Add-GSBI-driver.patch 4.1 KB

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  1. From a2f0fc20ea49e5dbbdbb21444683ea760fbdd38f Mon Sep 17 00:00:00 2001
  2. From: Andy Gross <[email protected]>
  3. Date: Thu, 24 Apr 2014 11:31:21 -0500
  4. Subject: [PATCH 084/182] soc: qcom: Add GSBI driver
  5. The GSBI (General Serial Bus Interface) driver controls the overarching
  6. configuration of the shared serial bus infrastructure on APQ8064, IPQ8064, and
  7. earlier QCOM processors. The GSBI supports UART, I2C, SPI, and UIM
  8. functionality in various combinations.
  9. Signed-off-by: Andy Gross <[email protected]>
  10. Signed-off-by: Kumar Gala <[email protected]>
  11. ---
  12. drivers/soc/Kconfig | 2 +
  13. drivers/soc/Makefile | 5 +++
  14. drivers/soc/qcom/Kconfig | 11 ++++++
  15. drivers/soc/qcom/Makefile | 1 +
  16. drivers/soc/qcom/qcom_gsbi.c | 84 ++++++++++++++++++++++++++++++++++++++++++
  17. 5 files changed, 103 insertions(+)
  18. create mode 100644 drivers/soc/Makefile
  19. create mode 100644 drivers/soc/qcom/Kconfig
  20. create mode 100644 drivers/soc/qcom/Makefile
  21. create mode 100644 drivers/soc/qcom/qcom_gsbi.c
  22. --- a/drivers/soc/Kconfig
  23. +++ b/drivers/soc/Kconfig
  24. @@ -1,3 +1,5 @@
  25. menu "SOC (System On Chip) specific Drivers"
  26. +source "drivers/soc/qcom/Kconfig"
  27. +
  28. endmenu
  29. --- /dev/null
  30. +++ b/drivers/soc/Makefile
  31. @@ -0,0 +1,5 @@
  32. +#
  33. +# Makefile for the Linux Kernel SOC specific device drivers.
  34. +#
  35. +
  36. +obj-$(CONFIG_ARCH_QCOM) += qcom/
  37. --- /dev/null
  38. +++ b/drivers/soc/qcom/Kconfig
  39. @@ -0,0 +1,11 @@
  40. +#
  41. +# QCOM Soc drivers
  42. +#
  43. +config QCOM_GSBI
  44. + tristate "QCOM General Serial Bus Interface"
  45. + depends on ARCH_QCOM
  46. + help
  47. + Say y here to enable GSBI support. The GSBI provides control
  48. + functions for connecting the underlying serial UART, SPI, and I2C
  49. + devices to the output pins.
  50. +
  51. --- /dev/null
  52. +++ b/drivers/soc/qcom/Makefile
  53. @@ -0,0 +1 @@
  54. +obj-$(CONFIG_QCOM_GSBI) += qcom_gsbi.o
  55. --- /dev/null
  56. +++ b/drivers/soc/qcom/qcom_gsbi.c
  57. @@ -0,0 +1,84 @@
  58. +/*
  59. + * Copyright (c) 2014, The Linux foundation. All rights reserved.
  60. + *
  61. + * This program is free software; you can redistribute it and/or modify
  62. + * it under the terms of the GNU General Public License rev 2 and
  63. + * only rev 2 as published by the free Software foundation.
  64. + *
  65. + * This program is distributed in the hope that it will be useful,
  66. + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  67. + * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE. See the
  68. + * GNU General Public License for more details.
  69. + */
  70. +
  71. +#include <linux/clk.h>
  72. +#include <linux/err.h>
  73. +#include <linux/io.h>
  74. +#include <linux/module.h>
  75. +#include <linux/of.h>
  76. +#include <linux/of_platform.h>
  77. +#include <linux/platform_device.h>
  78. +
  79. +#define GSBI_CTRL_REG 0x0000
  80. +#define GSBI_PROTOCOL_SHIFT 4
  81. +
  82. +static int gsbi_probe(struct platform_device *pdev)
  83. +{
  84. + struct device_node *node = pdev->dev.of_node;
  85. + struct resource *res;
  86. + void __iomem *base;
  87. + struct clk *hclk;
  88. + u32 mode, crci = 0;
  89. +
  90. + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  91. + base = devm_ioremap_resource(&pdev->dev, res);
  92. + if (IS_ERR(base))
  93. + return PTR_ERR(base);
  94. +
  95. + if (of_property_read_u32(node, "qcom,mode", &mode)) {
  96. + dev_err(&pdev->dev, "missing mode configuration\n");
  97. + return -EINVAL;
  98. + }
  99. +
  100. + /* not required, so default to 0 if not present */
  101. + of_property_read_u32(node, "qcom,crci", &crci);
  102. +
  103. + dev_info(&pdev->dev, "GSBI port protocol: %d crci: %d\n", mode, crci);
  104. +
  105. + hclk = devm_clk_get(&pdev->dev, "iface");
  106. + if (IS_ERR(hclk))
  107. + return PTR_ERR(hclk);
  108. +
  109. + clk_prepare_enable(hclk);
  110. +
  111. + writel_relaxed((mode << GSBI_PROTOCOL_SHIFT) | crci,
  112. + base + GSBI_CTRL_REG);
  113. +
  114. + /* make sure the gsbi control write is not reordered */
  115. + wmb();
  116. +
  117. + clk_disable_unprepare(hclk);
  118. +
  119. + return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
  120. +}
  121. +
  122. +static const struct of_device_id gsbi_dt_match[] = {
  123. + { .compatible = "qcom,gsbi-v1.0.0", },
  124. +};
  125. +
  126. +MODULE_DEVICE_TABLE(of, gsbi_dt_match);
  127. +
  128. +static struct platform_driver gsbi_driver = {
  129. + .driver = {
  130. + .name = "gsbi",
  131. + .owner = THIS_MODULE,
  132. + .of_match_table = gsbi_dt_match,
  133. + },
  134. + .probe = gsbi_probe,
  135. +};
  136. +
  137. +module_platform_driver(gsbi_driver);
  138. +
  139. +MODULE_AUTHOR("Andy Gross <[email protected]>");
  140. +MODULE_DESCRIPTION("QCOM GSBI driver");
  141. +MODULE_LICENSE("GPL v2");