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- From bf03b9281b119bcdc167b2dd6ac98294587eb5ff Mon Sep 17 00:00:00 2001
- From: Richard Zhu <[email protected]>
- Date: Thu, 13 Oct 2022 09:47:02 +0800
- Subject: [PATCH 3/3] phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY support
- Add i.MX8MP PCIe PHY support.
- Signed-off-by: Richard Zhu <[email protected]>
- Signed-off-by: Lucas Stach <[email protected]>
- Tested-by: Marek Vasut <[email protected]>
- Tested-by: Richard Leitner <[email protected]>
- Tested-by: Alexander Stein <[email protected]>
- Reviewed-by: Lucas Stach <[email protected]>
- Reviewed-by: Ahmad Fatoum <[email protected]>
- ---
- drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 25 ++++++++++++++++++++--
- 1 file changed, 23 insertions(+), 2 deletions(-)
- --- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
- +++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
- @@ -48,6 +48,7 @@
-
- enum imx8_pcie_phy_type {
- IMX8MM,
- + IMX8MP,
- };
-
- struct imx8_pcie_phy_drvdata {
- @@ -60,6 +61,7 @@ struct imx8_pcie_phy {
- struct clk *clk;
- struct phy *phy;
- struct regmap *iomuxc_gpr;
- + struct reset_control *perst;
- struct reset_control *reset;
- u32 refclk_pad_mode;
- u32 tx_deemph_gen1;
- @@ -74,11 +76,11 @@ static int imx8_pcie_phy_power_on(struct
- u32 val, pad_mode;
- struct imx8_pcie_phy *imx8_phy = phy_get_drvdata(phy);
-
- - reset_control_assert(imx8_phy->reset);
- -
- pad_mode = imx8_phy->refclk_pad_mode;
- switch (imx8_phy->drvdata->variant) {
- case IMX8MM:
- + reset_control_assert(imx8_phy->reset);
- +
- /* Tune PHY de-emphasis setting to pass PCIe compliance. */
- if (imx8_phy->tx_deemph_gen1)
- writel(imx8_phy->tx_deemph_gen1,
- @@ -87,6 +89,8 @@ static int imx8_pcie_phy_power_on(struct
- writel(imx8_phy->tx_deemph_gen2,
- imx8_phy->base + PCIE_PHY_TRSV_REG6);
- break;
- + case IMX8MP: /* Do nothing. */
- + break;
- }
-
- if (pad_mode == IMX8_PCIE_REFCLK_PAD_INPUT ||
- @@ -141,6 +145,9 @@ static int imx8_pcie_phy_power_on(struct
- IMX8MM_GPR_PCIE_CMN_RST);
-
- switch (imx8_phy->drvdata->variant) {
- + case IMX8MP:
- + reset_control_deassert(imx8_phy->perst);
- + fallthrough;
- case IMX8MM:
- reset_control_deassert(imx8_phy->reset);
- usleep_range(200, 500);
- @@ -181,8 +188,14 @@ static const struct imx8_pcie_phy_drvdat
- .variant = IMX8MM,
- };
-
- +static const struct imx8_pcie_phy_drvdata imx8mp_drvdata = {
- + .gpr = "fsl,imx8mp-iomuxc-gpr",
- + .variant = IMX8MP,
- +};
- +
- static const struct of_device_id imx8_pcie_phy_of_match[] = {
- {.compatible = "fsl,imx8mm-pcie-phy", .data = &imx8mm_drvdata, },
- + {.compatible = "fsl,imx8mp-pcie-phy", .data = &imx8mp_drvdata, },
- { },
- };
- MODULE_DEVICE_TABLE(of, imx8_pcie_phy_of_match);
- @@ -238,6 +251,14 @@ static int imx8_pcie_phy_probe(struct pl
- return PTR_ERR(imx8_phy->reset);
- }
-
- + if (imx8_phy->drvdata->variant == IMX8MP) {
- + imx8_phy->perst =
- + devm_reset_control_get_exclusive(dev, "perst");
- + if (IS_ERR(imx8_phy->perst))
- + dev_err_probe(dev, PTR_ERR(imx8_phy->perst),
- + "Failed to get PCIE PHY PERST control\n");
- + }
- +
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- imx8_phy->base = devm_ioremap_resource(dev, res);
- if (IS_ERR(imx8_phy->base))
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