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- From 4422c4efeed2a8b9fa745c6e529623d89c0be75e Mon Sep 17 00:00:00 2001
- From: Chunfeng Yun <[email protected]>
- Date: Fri, 13 Oct 2017 16:26:35 +0800
- Subject: [PATCH 128/224] usb: xhci-mtk: check clock stability of U3_MAC
- This is useful to find out the root cause when the Super Speed doesn't
- work. Such as when the T-PHY is switched to PCIe or SATA, and affects
- Super Speed function, the check will fail.
- Signed-off-by: Chunfeng Yun <[email protected]>
- Acked-by: Mathias Nyman <[email protected]>
- Signed-off-by: Greg Kroah-Hartman <[email protected]>
- ---
- drivers/usb/host/xhci-mtk.c | 4 ++++
- 1 file changed, 4 insertions(+)
- diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
- index 9502ca408f01..7a92bb782e5c 100644
- --- a/drivers/usb/host/xhci-mtk.c
- +++ b/drivers/usb/host/xhci-mtk.c
- @@ -43,6 +43,7 @@
-
- /* ip_pw_sts1 register */
- #define STS1_IP_SLEEP_STS BIT(30)
- +#define STS1_U3_MAC_RST BIT(16)
- #define STS1_XHCI_RST BIT(11)
- #define STS1_SYS125_RST BIT(10)
- #define STS1_REF_RST BIT(8)
- @@ -125,6 +126,9 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk)
- check_val = STS1_SYSPLL_STABLE | STS1_REF_RST |
- STS1_SYS125_RST | STS1_XHCI_RST;
-
- + if (mtk->num_u3_ports)
- + check_val |= STS1_U3_MAC_RST;
- +
- ret = readl_poll_timeout(&ippc->ip_pw_sts1, value,
- (check_val == (value & check_val)), 100, 20000);
- if (ret) {
- --
- 2.11.0
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