0161-pwm-mediatek-Add-MT2712-MT7622-support.patch 4.5 KB

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  1. From 7cc8226e45b2c6b9f06ce82ba6995b8f911afe25 Mon Sep 17 00:00:00 2001
  2. From: Zhi Mao <[email protected]>
  3. Date: Wed, 25 Oct 2017 18:11:01 +0800
  4. Subject: [PATCH 161/224] pwm: mediatek: Add MT2712/MT7622 support
  5. Add support for MT2712 and MT7622. Due to register offset address of
  6. pwm7 for MT2712 is not fixed 0x40, add mtk_pwm_reg_offset array for PWM
  7. register offset.
  8. Reviewed-by: Claudiu Beznea <[email protected]>
  9. Reviewed-by: Matthias Brugger <[email protected]>
  10. Signed-off-by: Zhi Mao <[email protected]>
  11. Signed-off-by: Thierry Reding <[email protected]>
  12. ---
  13. drivers/pwm/pwm-mediatek.c | 53 ++++++++++++++++++++++++++++++++++++++--------
  14. 1 file changed, 44 insertions(+), 9 deletions(-)
  15. diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
  16. index b52f3afb2ba1..f5d97e0ad52b 100644
  17. --- a/drivers/pwm/pwm-mediatek.c
  18. +++ b/drivers/pwm/pwm-mediatek.c
  19. @@ -16,6 +16,7 @@
  20. #include <linux/module.h>
  21. #include <linux/clk.h>
  22. #include <linux/of.h>
  23. +#include <linux/of_device.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/pwm.h>
  26. #include <linux/slab.h>
  27. @@ -40,11 +41,19 @@ enum {
  28. MTK_CLK_PWM3,
  29. MTK_CLK_PWM4,
  30. MTK_CLK_PWM5,
  31. + MTK_CLK_PWM6,
  32. + MTK_CLK_PWM7,
  33. + MTK_CLK_PWM8,
  34. MTK_CLK_MAX,
  35. };
  36. -static const char * const mtk_pwm_clk_name[] = {
  37. - "main", "top", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5"
  38. +static const char * const mtk_pwm_clk_name[MTK_CLK_MAX] = {
  39. + "main", "top", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5", "pwm6", "pwm7",
  40. + "pwm8"
  41. +};
  42. +
  43. +struct mtk_pwm_platform_data {
  44. + unsigned int num_pwms;
  45. };
  46. /**
  47. @@ -59,6 +68,10 @@ struct mtk_pwm_chip {
  48. struct clk *clks[MTK_CLK_MAX];
  49. };
  50. +static const unsigned int mtk_pwm_reg_offset[] = {
  51. + 0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220
  52. +};
  53. +
  54. static inline struct mtk_pwm_chip *to_mtk_pwm_chip(struct pwm_chip *chip)
  55. {
  56. return container_of(chip, struct mtk_pwm_chip, chip);
  57. @@ -103,14 +116,14 @@ static void mtk_pwm_clk_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  58. static inline u32 mtk_pwm_readl(struct mtk_pwm_chip *chip, unsigned int num,
  59. unsigned int offset)
  60. {
  61. - return readl(chip->regs + 0x10 + (num * 0x40) + offset);
  62. + return readl(chip->regs + mtk_pwm_reg_offset[num] + offset);
  63. }
  64. static inline void mtk_pwm_writel(struct mtk_pwm_chip *chip,
  65. unsigned int num, unsigned int offset,
  66. u32 value)
  67. {
  68. - writel(value, chip->regs + 0x10 + (num * 0x40) + offset);
  69. + writel(value, chip->regs + mtk_pwm_reg_offset[num] + offset);
  70. }
  71. static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  72. @@ -185,6 +198,7 @@ static const struct pwm_ops mtk_pwm_ops = {
  73. static int mtk_pwm_probe(struct platform_device *pdev)
  74. {
  75. + const struct mtk_pwm_platform_data *data;
  76. struct mtk_pwm_chip *pc;
  77. struct resource *res;
  78. unsigned int i;
  79. @@ -194,15 +208,22 @@ static int mtk_pwm_probe(struct platform_device *pdev)
  80. if (!pc)
  81. return -ENOMEM;
  82. + data = of_device_get_match_data(&pdev->dev);
  83. + if (data == NULL)
  84. + return -EINVAL;
  85. +
  86. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  87. pc->regs = devm_ioremap_resource(&pdev->dev, res);
  88. if (IS_ERR(pc->regs))
  89. return PTR_ERR(pc->regs);
  90. - for (i = 0; i < MTK_CLK_MAX; i++) {
  91. + for (i = 0; i < data->num_pwms + 2; i++) {
  92. pc->clks[i] = devm_clk_get(&pdev->dev, mtk_pwm_clk_name[i]);
  93. - if (IS_ERR(pc->clks[i]))
  94. + if (IS_ERR(pc->clks[i])) {
  95. + dev_err(&pdev->dev, "clock: %s fail: %ld\n",
  96. + mtk_pwm_clk_name[i], PTR_ERR(pc->clks[i]));
  97. return PTR_ERR(pc->clks[i]);
  98. + }
  99. }
  100. platform_set_drvdata(pdev, pc);
  101. @@ -210,7 +231,7 @@ static int mtk_pwm_probe(struct platform_device *pdev)
  102. pc->chip.dev = &pdev->dev;
  103. pc->chip.ops = &mtk_pwm_ops;
  104. pc->chip.base = -1;
  105. - pc->chip.npwm = 5;
  106. + pc->chip.npwm = data->num_pwms;
  107. ret = pwmchip_add(&pc->chip);
  108. if (ret < 0) {
  109. @@ -228,9 +249,23 @@ static int mtk_pwm_remove(struct platform_device *pdev)
  110. return pwmchip_remove(&pc->chip);
  111. }
  112. +static const struct mtk_pwm_platform_data mt2712_pwm_data = {
  113. + .num_pwms = 8,
  114. +};
  115. +
  116. +static const struct mtk_pwm_platform_data mt7622_pwm_data = {
  117. + .num_pwms = 6,
  118. +};
  119. +
  120. +static const struct mtk_pwm_platform_data mt7623_pwm_data = {
  121. + .num_pwms = 5,
  122. +};
  123. +
  124. static const struct of_device_id mtk_pwm_of_match[] = {
  125. - { .compatible = "mediatek,mt7623-pwm" },
  126. - { }
  127. + { .compatible = "mediatek,mt2712-pwm", .data = &mt2712_pwm_data },
  128. + { .compatible = "mediatek,mt7622-pwm", .data = &mt7622_pwm_data },
  129. + { .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
  130. + { },
  131. };
  132. MODULE_DEVICE_TABLE(of, mtk_pwm_of_match);
  133. --
  134. 2.11.0