qca9550_huawei_ap5030dn.dts 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qca955x.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/leds/common.h>
  6. / {
  7. model = "Huawei AP5030DN";
  8. compatible = "huawei,ap5030dn", "qca,qca9550", "qca,qca9558";
  9. chosen {
  10. bootargs = "console=ttyS0,9600n8";
  11. };
  12. aliases {
  13. led-boot = &led_function_red;
  14. led-failsafe = &led_function_red;
  15. led-running = &led_function_green;
  16. led-upgrade = &led_function_red;
  17. };
  18. leds {
  19. compatible = "gpio-leds";
  20. led_function_green: led-status-red {
  21. function = LED_FUNCTION_STATUS;
  22. color = <LED_COLOR_ID_GREEN>;
  23. gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
  24. };
  25. led_function_red: led-status-green {
  26. function = LED_FUNCTION_STATUS;
  27. color = <LED_COLOR_ID_RED>;
  28. gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
  29. };
  30. };
  31. keys {
  32. compatible = "gpio-keys";
  33. restart {
  34. label = "reset";
  35. linux,code = <KEY_RESTART>;
  36. gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
  37. debounce-interval = <60>;
  38. };
  39. };
  40. watchdog {
  41. pinctrl-names = "default";
  42. pinctrl-0 = <&wdt_gpio15>;
  43. compatible = "linux,wdt-gpio";
  44. gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
  45. hw_algo = "toggle";
  46. hw_margin_ms = <100>;
  47. always-running;
  48. };
  49. virtual_flash {
  50. compatible = "mtd-concat";
  51. devices = <&fwconcat0 &fwconcat1>;
  52. partitions {
  53. compatible = "fixed-partitions";
  54. #address-cells = <1>;
  55. #size-cells = <1>;
  56. partition@0 {
  57. label = "firmware";
  58. reg = <0x0 0x1e00000>;
  59. compatible = "openwrt,uimage", "denx,uimage";
  60. };
  61. };
  62. };
  63. };
  64. &spi {
  65. status = "okay";
  66. flash@0 {
  67. compatible = "jedec,spi-nor";
  68. reg = <0>;
  69. spi-max-frequency = <25000000>;
  70. partitions {
  71. compatible = "fixed-partitions";
  72. #address-cells = <1>;
  73. #size-cells = <1>;
  74. partition@0 {
  75. label = "u-boot-a";
  76. reg = <0x0 0x80000>;
  77. read-only;
  78. };
  79. // The BootupA/B partitions store the addresses
  80. // of the main and backup kernel in flash (which is the same here).
  81. // During sysupgrade, these addresses are set to the start of the
  82. // "firmware" partition.
  83. partition@80000 {
  84. label = "BootupA";
  85. reg = <0x80000 0x20000>;
  86. };
  87. partition@a0000 {
  88. label = "BootupB";
  89. reg = <0xa0000 0x20000>;
  90. };
  91. partition@c0000 {
  92. label = "u-boot-env";
  93. reg = <0xc0000 0x20000>;
  94. read-only;
  95. };
  96. partition@e0000 {
  97. label = "BoardData";
  98. reg = <0xe0000 0x20000>;
  99. read-only;
  100. };
  101. // In the vendor layout, there are the "SysImageA" (12 MiB)
  102. // and the "ConfigA" (3 MiB) partitions here.
  103. fwconcat0: partition@100000 {
  104. label = "fwconcat0";
  105. reg = <0x100000 0xF00000>;
  106. };
  107. partition@1000000 {
  108. label = "u-boot-b";
  109. reg = <0x1000000 0x80000>;
  110. read-only;
  111. };
  112. partition@1080000 {
  113. label = "ResultA";
  114. reg = <0x1080000 0x20000>;
  115. read-only;
  116. };
  117. partition@10a0000 {
  118. label = "ResultB";
  119. reg = <0x10a0000 0x20000>;
  120. read-only;
  121. };
  122. // In the vendor layout, there are the "SysImageB" (12 MiB)
  123. // and the "ConfigB" (3 MiB) partitions here.
  124. fwconcat1: partition@10c0000 {
  125. label = "fwconcat1";
  126. reg = <0x10c0000 0xF00000>;
  127. };
  128. art: partition@1fc0000 {
  129. label = "art";
  130. reg = <0x1fc0000 0x40000>;
  131. read-only;
  132. nvmem-layout {
  133. compatible = "fixed-layout";
  134. #address-cells = <1>;
  135. #size-cells = <1>;
  136. macaddr_art_2005b: macaddr@2005b {
  137. compatible = "mac-base";
  138. reg = <0x2005b 0x6>;
  139. #nvmem-cell-cells = <1>;
  140. };
  141. cal_art_1000: cal@1000 {
  142. reg = <0x1000 0x440>;
  143. };
  144. cal_art_5000: cal@5000 {
  145. reg = <0x5000 0x844>;
  146. };
  147. };
  148. };
  149. };
  150. };
  151. };
  152. &wmac {
  153. status = "okay";
  154. nvmem-cells = <&macaddr_art_2005b 3>, <&cal_art_1000>;
  155. nvmem-cell-names = "mac-address", "calibration";
  156. };
  157. &pcie0 {
  158. status = "okay";
  159. wifi@0,0 {
  160. compatible = "qcom,ath10k";
  161. reg = <0x0000 0 0 0 0>;
  162. nvmem-cells = <&macaddr_art_2005b 2>, <&cal_art_5000>;
  163. nvmem-cell-names = "mac-address", "calibration";
  164. };
  165. };
  166. &eth0 {
  167. status = "okay";
  168. nvmem-cells = <&macaddr_art_2005b 0>;
  169. nvmem-cell-names = "mac-address";
  170. pll-data = <0xa6000000 0xa0000101 0xa0001313>;
  171. phy-handle = <&phy0>;
  172. gmac-config {
  173. device = <&gmac>;
  174. rxdv-delay = <3>;
  175. rxd-delay = <3>;
  176. txen-delay = <0>;
  177. txd-delay = <0>;
  178. };
  179. };
  180. &eth1 {
  181. status = "okay";
  182. nvmem-cells = <&macaddr_art_2005b 1>;
  183. nvmem-cell-names = "mac-address";
  184. pll-data = <0x03000101 0x00000101 0x00001313>;
  185. phy-handle = <&phy1>;
  186. };
  187. &mdio0 {
  188. status = "okay";
  189. phy0: ethernet-phy@18 {
  190. reg = <0x18>;
  191. };
  192. };
  193. &mdio1 {
  194. status = "okay";
  195. phy1: ethernet-phy@1 {
  196. reg = <1>;
  197. };
  198. };
  199. &pinmux {
  200. wdt_gpio15: pinmux_wdt_gpio15 {
  201. pinctrl-single,bits = <0xc 0x0 0xFF000000>;
  202. };
  203. };
  204. &wdt {
  205. status = "disabled";
  206. };