314-MIPS-ath79-remove-irq-code-from-pci.patch 4.1 KB

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  1. From: John Crispin <[email protected]>
  2. Subject: ath79: fix remove irq code from pci driver patch
  3. This patch got mangled in the void while rebasing it.
  4. Submitted-by: John Crispin <[email protected]>
  5. ---
  6. arch/mips/pci/pci-ar71xx.c | 107 ------------------
  7. 1 file changed, 141 deletions(-)
  8. --- a/arch/mips/pci/pci-ar71xx.c
  9. +++ b/arch/mips/pci/pci-ar71xx.c
  10. @@ -51,11 +51,9 @@
  11. struct ar71xx_pci_controller {
  12. struct device_node *np;
  13. void __iomem *cfg_base;
  14. - int irq;
  15. struct pci_controller pci_ctrl;
  16. struct resource io_res;
  17. struct resource mem_res;
  18. - struct irq_domain *domain;
  19. };
  20. /* Byte lane enable bits */
  21. @@ -227,104 +225,6 @@ static struct pci_ops ar71xx_pci_ops = {
  22. .write = ar71xx_pci_write_config,
  23. };
  24. -static void ar71xx_pci_irq_handler(struct irq_desc *desc)
  25. -{
  26. - void __iomem *base = ath79_reset_base;
  27. - struct irq_chip *chip = irq_desc_get_chip(desc);
  28. - struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc);
  29. - u32 pending;
  30. -
  31. - chained_irq_enter(chip, desc);
  32. - pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &
  33. - __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  34. -
  35. - if (pending & AR71XX_PCI_INT_DEV0)
  36. - generic_handle_irq(irq_linear_revmap(apc->domain, 1));
  37. -
  38. - else if (pending & AR71XX_PCI_INT_DEV1)
  39. - generic_handle_irq(irq_linear_revmap(apc->domain, 2));
  40. -
  41. - else if (pending & AR71XX_PCI_INT_DEV2)
  42. - generic_handle_irq(irq_linear_revmap(apc->domain, 3));
  43. -
  44. - else if (pending & AR71XX_PCI_INT_CORE)
  45. - generic_handle_irq(irq_linear_revmap(apc->domain, 4));
  46. -
  47. - else
  48. - spurious_interrupt();
  49. - chained_irq_exit(chip, desc);
  50. -}
  51. -
  52. -static void ar71xx_pci_irq_unmask(struct irq_data *d)
  53. -{
  54. - struct ar71xx_pci_controller *apc;
  55. - unsigned int irq;
  56. - void __iomem *base = ath79_reset_base;
  57. - u32 t;
  58. -
  59. - apc = irq_data_get_irq_chip_data(d);
  60. - irq = irq_linear_revmap(apc->domain, d->irq);
  61. -
  62. - t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  63. - __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  64. -
  65. - /* flush write */
  66. - __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  67. -}
  68. -
  69. -static void ar71xx_pci_irq_mask(struct irq_data *d)
  70. -{
  71. - struct ar71xx_pci_controller *apc;
  72. - unsigned int irq;
  73. - void __iomem *base = ath79_reset_base;
  74. - u32 t;
  75. -
  76. - apc = irq_data_get_irq_chip_data(d);
  77. - irq = irq_linear_revmap(apc->domain, d->irq);
  78. -
  79. - t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  80. - __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  81. -
  82. - /* flush write */
  83. - __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  84. -}
  85. -
  86. -static struct irq_chip ar71xx_pci_irq_chip = {
  87. - .name = "AR71XX PCI",
  88. - .irq_mask = ar71xx_pci_irq_mask,
  89. - .irq_unmask = ar71xx_pci_irq_unmask,
  90. - .irq_mask_ack = ar71xx_pci_irq_mask,
  91. -};
  92. -
  93. -static int ar71xx_pci_irq_map(struct irq_domain *d,
  94. - unsigned int irq, irq_hw_number_t hw)
  95. -{
  96. - struct ar71xx_pci_controller *apc = d->host_data;
  97. -
  98. - irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq);
  99. - irq_set_chip_data(irq, apc);
  100. -
  101. - return 0;
  102. -}
  103. -
  104. -static const struct irq_domain_ops ar71xx_pci_domain_ops = {
  105. - .xlate = irq_domain_xlate_onecell,
  106. - .map = ar71xx_pci_irq_map,
  107. -};
  108. -
  109. -static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc)
  110. -{
  111. - void __iomem *base = ath79_reset_base;
  112. -
  113. - __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  114. - __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS);
  115. -
  116. - apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT,
  117. - &ar71xx_pci_domain_ops, apc);
  118. - irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler,
  119. - apc);
  120. -}
  121. -
  122. static void ar71xx_pci_reset(void)
  123. {
  124. ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE);
  125. @@ -357,10 +257,6 @@ static int ar71xx_pci_probe(struct platf
  126. if (IS_ERR(apc->cfg_base))
  127. return PTR_ERR(apc->cfg_base);
  128. - apc->irq = platform_get_irq(pdev, 0);
  129. - if (apc->irq < 0)
  130. - return -EINVAL;
  131. -
  132. ar71xx_pci_reset();
  133. /* setup COMMAND register */
  134. @@ -371,8 +267,6 @@ static int ar71xx_pci_probe(struct platf
  135. /* clear bus errors */
  136. ar71xx_pci_check_error(apc, 1);
  137. - ar71xx_pci_irq_init(apc);
  138. -
  139. apc->np = pdev->dev.of_node;
  140. apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
  141. apc->pci_ctrl.mem_resource = &apc->mem_res;