100-board_support.patch 2.4 KB

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  1. --- a/arch/mips/Kconfig
  2. +++ b/arch/mips/Kconfig
  3. @@ -18,6 +18,23 @@ choice
  4. prompt "System type"
  5. default SGI_IP22
  6. +config AR7
  7. + bool "Texas Instruments AR7"
  8. + select BOOT_ELF32
  9. + select DMA_NONCOHERENT
  10. + select CEVT_R4K
  11. + select CSRC_R4K
  12. + select IRQ_CPU
  13. + select SWAP_IO_SPACE
  14. + select SYS_HAS_CPU_MIPS32_R1
  15. + select SYS_HAS_EARLY_PRINTK
  16. + select SYS_SUPPORTS_32BIT_KERNEL
  17. + select SYS_SUPPORTS_KGDB
  18. + select SYS_SUPPORTS_LITTLE_ENDIAN
  19. + select SYS_SUPPORTS_BIG_ENDIAN
  20. + select GENERIC_GPIO
  21. + select GENERIC_HARDIRQS_NO__DO_IRQ
  22. +
  23. config MACH_ALCHEMY
  24. bool "Alchemy processor based machines"
  25. --- a/arch/mips/kernel/traps.c
  26. +++ b/arch/mips/kernel/traps.c
  27. @@ -1188,9 +1188,22 @@ void *set_except_vector(int n, void *add
  28. exception_handlers[n] = handler;
  29. if (n == 0 && cpu_has_divec) {
  30. - *(u32 *)(ebase + 0x200) = 0x08000000 |
  31. - (0x03ffffff & (handler >> 2));
  32. - flush_icache_range(ebase + 0x200, ebase + 0x204);
  33. + if ((handler ^ (ebase + 4)) & 0xfc000000) {
  34. + /* lui k0, 0x0000 */
  35. + *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16);
  36. + /* ori k0, 0x0000 */
  37. + *(u32 *)(ebase + 0x204) =
  38. + 0x375a0000 | (handler & 0xffff);
  39. + /* jr k0 */
  40. + *(u32 *)(ebase + 0x208) = 0x03400008;
  41. + /* nop */
  42. + *(u32 *)(ebase + 0x20C) = 0x00000000;
  43. + flush_icache_range(ebase + 0x200, ebase + 0x210);
  44. + } else {
  45. + *(u32 *)(ebase + 0x200) =
  46. + 0x08000000 | (0x03ffffff & (handler >> 2));
  47. + flush_icache_range(ebase + 0x200, ebase + 0x204);
  48. + }
  49. }
  50. return (void *)old_handler;
  51. }
  52. --- a/arch/mips/Makefile
  53. +++ b/arch/mips/Makefile
  54. @@ -167,6 +167,13 @@ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/s
  55. #
  56. #
  57. +# Texas Instruments AR7
  58. +#
  59. +core-$(CONFIG_AR7) += arch/mips/ar7/
  60. +cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7
  61. +load-$(CONFIG_AR7) += 0xffffffff94100000
  62. +
  63. +#
  64. # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
  65. #
  66. core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
  67. --- a/include/asm-mips/page.h
  68. +++ b/include/asm-mips/page.h
  69. @@ -182,8 +182,10 @@ typedef struct { unsigned long pgprot; }
  70. #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
  71. VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
  72. -#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
  73. -#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
  74. +#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \
  75. + PHYS_OFFSET)
  76. +#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \
  77. + PHYS_OFFSET)
  78. #include <asm-generic/memory_model.h>
  79. #include <asm-generic/page.h>