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- From 9d9bf16aa8d966834ac1280f96c37d22552c33d1 Mon Sep 17 00:00:00 2001
- From: Birger Koblitz <[email protected]>
- Date: Wed, 8 Sep 2021 16:13:18 +0200
- Subject: phy: Add PHY hsgmii mode
- This adds RTL93xx-specific MAC configuration routines that allow also configuration
- of 10GBit links for phylink. There is support for the Realtek-specific HISGMI
- protocol.
- Submitted-by: Birger Koblitz <[email protected]>
- ---
- drivers/net/phy/phylink.c | 2 ++
- include/linux/phy.h | 3 +++
- 2 file changed, 5 insertions(+)
- --- a/drivers/net/phy/phylink.c
- +++ b/drivers/net/phy/phylink.c
- @@ -403,6 +403,7 @@ void phylink_get_linkmodes(unsigned long
-
- case PHY_INTERFACE_MODE_XGMII:
- case PHY_INTERFACE_MODE_RXAUI:
- + case PHY_INTERFACE_MODE_HSGMII:
- case PHY_INTERFACE_MODE_XAUI:
- case PHY_INTERFACE_MODE_10GBASER:
- case PHY_INTERFACE_MODE_10GKR:
- @@ -657,6 +658,7 @@ static int phylink_parse_mode(struct phy
- fallthrough;
- case PHY_INTERFACE_MODE_USXGMII:
- case PHY_INTERFACE_MODE_10GKR:
- + case PHY_INTERFACE_MODE_HSGMII:
- case PHY_INTERFACE_MODE_10GBASER:
- phylink_set(pl->supported, 10baseT_Half);
- phylink_set(pl->supported, 10baseT_Full);
- --- a/include/linux/phy.h
- +++ b/include/linux/phy.h
- @@ -139,6 +139,7 @@ typedef enum {
- PHY_INTERFACE_MODE_XGMII,
- PHY_INTERFACE_MODE_XLGMII,
- PHY_INTERFACE_MODE_MOCA,
- + PHY_INTERFACE_MODE_HSGMII,
- PHY_INTERFACE_MODE_QSGMII,
- PHY_INTERFACE_MODE_TRGMII,
- PHY_INTERFACE_MODE_100BASEX,
- @@ -244,6 +245,8 @@ static inline const char *phy_modes(phy_
- return "xlgmii";
- case PHY_INTERFACE_MODE_MOCA:
- return "moca";
- + case PHY_INTERFACE_MODE_HSGMII:
- + return "hsgmii";
- case PHY_INTERFACE_MODE_QSGMII:
- return "qsgmii";
- case PHY_INTERFACE_MODE_TRGMII:
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