CreativeBox-v1.dts 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /dts-v1/;
  3. #include "mt7621.dtsi"
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6. / {
  7. compatible = "xzwifi,creativebox-v1", "mediatek,mt7621-soc";
  8. model = "CreativeBox v1";
  9. aliases {
  10. led-boot = &led_sys;
  11. led-failsafe = &led_sys;
  12. led-running = &led_sys;
  13. led-upgrade = &led_sys;
  14. };
  15. memory@0 {
  16. device_type = "memory";
  17. reg = <0x0 0x1C000000>,
  18. <0x20000000 0x4000000>;
  19. };
  20. chosen {
  21. bootargs = "console=ttyS0,115200";
  22. };
  23. leds {
  24. compatible = "gpio-leds";
  25. power {
  26. label = "creativebox-v1:blue:power";
  27. gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
  28. default-state = "on";
  29. };
  30. led_sys: sys {
  31. label = "creativebox-v1:blue:sys";
  32. gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
  33. };
  34. internet {
  35. label = "creativebox-v1:blue:internet";
  36. gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
  37. };
  38. wlan2g {
  39. label = "creativebox-v1:blue:wlan2g";
  40. gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
  41. linux,default-trigger = "phy0tpt";
  42. };
  43. wlan5g {
  44. label = "creativebox-v1:blue:wlan5g";
  45. gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
  46. linux,default-trigger = "phy1tpt";
  47. };
  48. };
  49. keys {
  50. compatible = "gpio-keys-polled";
  51. poll-interval = <20>;
  52. reset {
  53. label = "reset";
  54. gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  55. linux,code = <KEY_RESTART>;
  56. };
  57. };
  58. gpio_export {
  59. compatible = "gpio-export";
  60. #size-cells = <0>;
  61. power_usb2 {
  62. gpio-export,name = "power_usb2";
  63. gpio-export,output = <1>;
  64. gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
  65. };
  66. power_usb3 {
  67. gpio-export,name = "power_usb3";
  68. gpio-export,output = <1>;
  69. gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
  70. };
  71. power_sata {
  72. gpio-export,name = "power_sata";
  73. gpio-export,output = <1>;
  74. gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
  75. };
  76. };
  77. };
  78. &spi0 {
  79. status = "okay";
  80. flash@0 {
  81. compatible = "jedec,spi-nor";
  82. reg = <0>;
  83. spi-max-frequency = <40000000>;
  84. partitions {
  85. compatible = "fixed-partitions";
  86. #address-cells = <1>;
  87. #size-cells = <1>;
  88. partition@0 {
  89. label = "u-boot";
  90. reg = <0x0 0x30000>;
  91. read-only;
  92. };
  93. partition@30000 {
  94. label = "u-boot-env";
  95. reg = <0x30000 0x10000>;
  96. read-only;
  97. };
  98. factory: partition@40000 {
  99. label = "factory";
  100. reg = <0x40000 0x10000>;
  101. read-only;
  102. };
  103. partition@50000 {
  104. compatible = "denx,uimage";
  105. label = "firmware";
  106. reg = <0x50000 0x1fb0000>;
  107. };
  108. };
  109. };
  110. };
  111. &sdhci {
  112. status = "okay";
  113. };
  114. &pcie {
  115. status = "okay";
  116. };
  117. &pcie0 {
  118. wifi@0,0 {
  119. compatible = "pci1400,7603";
  120. reg = <0x0000 0 0 0 0>;
  121. mediatek,mtd-eeprom = <&factory 0x0000>;
  122. };
  123. };
  124. &pcie1 {
  125. wifi@0,0 {
  126. compatible = "pci14c3,7662";
  127. reg = <0x0000 0 0 0 0>;
  128. mediatek,mtd-eeprom = <&factory 0x8000>;
  129. ieee80211-freq-limit = <5000000 6000000>;
  130. };
  131. };
  132. &ethernet {
  133. mtd-mac-address = <&factory 0xe000>;
  134. };
  135. &pinctrl {
  136. state_default: pinctrl0 {
  137. gpio {
  138. ralink,group = "wdt", "rgmii2";
  139. ralink,function = "gpio";
  140. };
  141. };
  142. };