GHL-R-001.dts 2.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /dts-v1/;
  3. #include "mt7621.dtsi"
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6. / {
  7. compatible = "gehua,ghl-r-001", "mediatek,mt7621-soc";
  8. model = "GeHua GHL-R-001";
  9. memory@0 {
  10. device_type = "memory";
  11. reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
  12. };
  13. chosen {
  14. bootargs = "console=ttyS0,57600";
  15. };
  16. leds {
  17. compatible = "gpio-leds";
  18. internet {
  19. label = "ghl-r-001:blue:internet";
  20. gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
  21. };
  22. usb {
  23. label = "ghl-r-001:blue:usb";
  24. gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
  25. trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
  26. linux,default-trigger = "usbport";
  27. };
  28. };
  29. keys {
  30. compatible = "gpio-keys-polled";
  31. poll-interval = <20>;
  32. reset {
  33. label = "reset";
  34. gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  35. linux,code = <KEY_RESTART>;
  36. };
  37. };
  38. };
  39. &uartlite3 {
  40. status = "okay";
  41. };
  42. &spi0 {
  43. status = "okay";
  44. flash@0 {
  45. compatible = "mx25l25635f", "jedec,spi-nor";
  46. reg = <0>;
  47. spi-max-frequency = <25000000>;
  48. m25p,fast-read;
  49. partitions {
  50. compatible = "fixed-partitions";
  51. #address-cells = <1>;
  52. #size-cells = <1>;
  53. partition@0 {
  54. label = "u-boot";
  55. reg = <0x0 0x30000>;
  56. read-only;
  57. };
  58. partition@30000 {
  59. label = "u-boot-env";
  60. reg = <0x30000 0x10000>;
  61. read-only;
  62. };
  63. factory: partition@40000 {
  64. label = "factory";
  65. reg = <0x40000 0x10000>;
  66. read-only;
  67. };
  68. partition@50000 {
  69. compatible = "denx,uimage";
  70. label = "firmware";
  71. reg = <0x50000 0x1fb0000>;
  72. };
  73. };
  74. };
  75. };
  76. &pcie {
  77. status = "okay";
  78. };
  79. &pcie0 {
  80. wifi@0,0 {
  81. reg = <0x0000 0 0 0 0>;
  82. mediatek,mtd-eeprom = <&factory 0x0000>;
  83. };
  84. };
  85. &pcie1 {
  86. wifi@0,0 {
  87. reg = <0x0000 0 0 0 0>;
  88. mediatek,mtd-eeprom = <&factory 0x8000>;
  89. ieee80211-freq-limit = <5000000 6000000>;
  90. led {
  91. led-sources = <2>;
  92. led-active-low;
  93. };
  94. };
  95. };
  96. &ethernet {
  97. mtd-mac-address = <&factory 0xe000>;
  98. };
  99. &pinctrl {
  100. state_default: pinctrl0 {
  101. gpio {
  102. ralink,group = "jtag", "wdt";
  103. ralink,function = "gpio";
  104. };
  105. };
  106. };