armada-3720-gl-mv1000.dts 4.0 KB

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  1. // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
  2. /dts-v1/;
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/leds/common.h>
  6. #include "armada-372x.dtsi"
  7. / {
  8. model = "GL.iNet GL-MV1000";
  9. compatible = "glinet,gl-mv1000", "marvell,armada3720";
  10. aliases {
  11. led-boot = &led_power;
  12. led-failsafe = &led_power;
  13. led-running = &led_power;
  14. led-upgrade = &led_power;
  15. };
  16. chosen {
  17. stdout-path = "serial0:115200n8";
  18. };
  19. memory@0 {
  20. device_type = "memory";
  21. reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
  22. };
  23. vcc_sd_reg1: regulator {
  24. compatible = "regulator-gpio";
  25. regulator-name = "vcc_sd1";
  26. regulator-min-microvolt = <1800000>;
  27. regulator-max-microvolt = <3300000>;
  28. regulator-boot-on;
  29. gpios-states = <0>;
  30. states = <1800000 0x1
  31. 3300000 0x0>;
  32. enable-active-high;
  33. };
  34. keys {
  35. compatible = "gpio-keys";
  36. reset {
  37. label = "reset";
  38. linux,code = <KEY_RESTART>;
  39. gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
  40. };
  41. switch {
  42. label = "switch";
  43. linux,code = <BTN_0>;
  44. gpios = <&gpiosb 22 GPIO_ACTIVE_LOW>;
  45. };
  46. };
  47. leds {
  48. compatible = "gpio-leds";
  49. vpn {
  50. label = "green:vpn";
  51. gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
  52. };
  53. wan {
  54. function = LED_FUNCTION_WAN;
  55. color = <LED_COLOR_ID_GREEN>;
  56. gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
  57. };
  58. led_power: power {
  59. function = LED_FUNCTION_POWER;
  60. color = <LED_COLOR_ID_GREEN>;
  61. gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
  62. default-state = "on";
  63. };
  64. };
  65. };
  66. &spi0 {
  67. status = "okay";
  68. flash@0 {
  69. reg = <0>;
  70. compatible = "jedec,spi-nor";
  71. spi-max-frequency = <104000000>;
  72. m25p,fast-read;
  73. partitions {
  74. compatible = "fixed-partitions";
  75. #address-cells = <1>;
  76. #size-cells = <1>;
  77. partition@0 {
  78. label = "u-boot";
  79. reg = <0 0xf0000>;
  80. read-only;
  81. };
  82. partition@f0000 {
  83. label = "u-boot-env";
  84. reg = <0xf0000 0x8000>;
  85. read-only;
  86. };
  87. factory: partition@f8000 {
  88. label = "factory";
  89. reg = <0xf8000 0x8000>;
  90. read-only;
  91. nvmem-layout {
  92. compatible = "fixed-layout";
  93. #address-cells = <1>;
  94. #size-cells = <1>;
  95. macaddr_factory_0: macaddr@0 {
  96. reg = <0x0 0x6>;
  97. };
  98. macaddr_factory_6: macaddr@6 {
  99. reg = <0x6 0x6>;
  100. };
  101. };
  102. };
  103. partition@100000 {
  104. label = "gl-firmware-dtb";
  105. reg = <0x100000 0x10000>;
  106. read-only;
  107. };
  108. partition@110000 {
  109. label = "gl-firmware";
  110. reg = <0x110000 0xef0000>;
  111. read-only;
  112. };
  113. partition@ef0000 {
  114. label = "gl-firmware-jffs2";
  115. reg = <0xef0000 0x110000>;
  116. read-only;
  117. };
  118. };
  119. };
  120. };
  121. &sdhci1 {
  122. wp-inverted;
  123. bus-width = <4>;
  124. cd-gpios = <&gpionb 17 GPIO_ACTIVE_LOW>;
  125. marvell,pad-type = "sd";
  126. no-1-8-v;
  127. vqmmc-supply = <&vcc_sd_reg1>;
  128. status = "okay";
  129. };
  130. &sdhci0 {
  131. bus-width = <8>;
  132. mmc-ddr-1_8v;
  133. mmc-hs400-1_8v;
  134. non-removable;
  135. no-sd;
  136. no-sdio;
  137. marvell,pad-type = "fixed-1-8v";
  138. status = "okay";
  139. };
  140. &usb3 {
  141. status = "okay";
  142. };
  143. &usb2 {
  144. status = "okay";
  145. };
  146. &uart0 {
  147. status = "okay";
  148. };
  149. &mdio {
  150. switch0: switch0@1 {
  151. compatible = "marvell,mv88e6085";
  152. #address-cells = <1>;
  153. #size-cells = <0>;
  154. reg = <1>;
  155. dsa,member = <0 0>;
  156. ports: ports {
  157. #address-cells = <1>;
  158. #size-cells = <0>;
  159. port@0 {
  160. reg = <0>;
  161. ethernet = <&eth0>;
  162. };
  163. port@1 {
  164. reg = <1>;
  165. label = "wan";
  166. phy-handle = <&switch0phy0>;
  167. };
  168. port@2 {
  169. reg = <2>;
  170. label = "lan0";
  171. phy-handle = <&switch0phy1>;
  172. nvmem-cells = <&macaddr_factory_6>;
  173. nvmem-cell-names = "mac-address";
  174. };
  175. port@3 {
  176. reg = <3>;
  177. label = "lan1";
  178. phy-handle = <&switch0phy2>;
  179. nvmem-cells = <&macaddr_factory_6>;
  180. nvmem-cell-names = "mac-address";
  181. };
  182. };
  183. mdio {
  184. #address-cells = <1>;
  185. #size-cells = <0>;
  186. switch0phy0: switch0phy0@11 {
  187. reg = <0x11>;
  188. };
  189. switch0phy1: switch0phy1@12 {
  190. reg = <0x12>;
  191. };
  192. switch0phy2: switch0phy2@13 {
  193. reg = <0x13>;
  194. };
  195. };
  196. };
  197. };
  198. &eth0 {
  199. nvmem-cells = <&macaddr_factory_0>;
  200. nvmem-cell-names = "mac-address";
  201. phy-mode = "rgmii-id";
  202. status = "okay";
  203. fixed-link {
  204. speed = <1000>;
  205. full-duplex;
  206. };
  207. };