qcom-ipq4018-jalapeno.dts 5.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283
  1. /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
  2. * Copyright (c) 2018, Robert Marko <[email protected]>
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. *
  16. */
  17. #include "qcom-ipq4019.dtsi"
  18. #include "qcom-ipq4019-bus.dtsi"
  19. #include <dt-bindings/gpio/gpio.h>
  20. #include <dt-bindings/input/input.h>
  21. #include <dt-bindings/soc/qcom,tcsr.h>
  22. / {
  23. model = "8devices Jalapeno";
  24. compatible = "8dev,jalapeno", "qcom,ipq4019";
  25. reserved-memory {
  26. #address-cells = <0x1>;
  27. #size-cells = <0x1>;
  28. ranges;
  29. smem@87e00000 {
  30. reg = <0x87e00000 0x080000>;
  31. no-map;
  32. };
  33. tz@87e80000 {
  34. reg = <0x87e80000 0x180000>;
  35. no-map;
  36. };
  37. };
  38. soc {
  39. mdio@90000 {
  40. status = "okay";
  41. pinctrl-0 = <&mdio_pins>;
  42. pinctrl-names = "default";
  43. };
  44. ess-psgmii@98000 {
  45. status = "okay";
  46. };
  47. counter@4a1000 {
  48. compatible = "qcom,qca-gcnt";
  49. reg = <0x4a1000 0x4>;
  50. };
  51. tcsr@1949000 {
  52. compatible = "qcom,tcsr";
  53. reg = <0x1949000 0x100>;
  54. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  55. };
  56. tcsr@194b000 {
  57. /* select hostmode */
  58. compatible = "qcom,tcsr";
  59. reg = <0x194b000 0x100>;
  60. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  61. status = "okay";
  62. };
  63. ess_tcsr@1953000 {
  64. compatible = "qcom,tcsr";
  65. reg = <0x1953000 0x1000>;
  66. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  67. };
  68. tcsr@1957000 {
  69. compatible = "qcom,tcsr";
  70. reg = <0x1957000 0x100>;
  71. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  72. };
  73. usb2: usb2@60f8800 {
  74. status = "okay";
  75. };
  76. serial@78af000 {
  77. pinctrl-0 = <&serial_pins>;
  78. pinctrl-names = "default";
  79. status = "okay";
  80. };
  81. usb3: usb3@8af8800 {
  82. status = "okay";
  83. };
  84. crypto@8e3a000 {
  85. status = "okay";
  86. };
  87. watchdog@b017000 {
  88. status = "okay";
  89. };
  90. ess-switch@c000000 {
  91. status = "okay";
  92. switch_lan_bmp = <0x10>; /* lan port bitmap */
  93. };
  94. edma@c080000 {
  95. status = "okay";
  96. };
  97. };
  98. };
  99. &tlmm {
  100. mdio_pins: mdio_pinmux {
  101. pinmux_1 {
  102. pins = "gpio53";
  103. function = "mdio";
  104. };
  105. pinmux_2 {
  106. pins = "gpio52";
  107. function = "mdc";
  108. };
  109. pinconf {
  110. pins = "gpio52", "gpio53";
  111. bias-pull-up;
  112. };
  113. };
  114. serial_pins: serial_pinmux {
  115. mux {
  116. pins = "gpio60", "gpio61";
  117. function = "blsp_uart0";
  118. bias-disable;
  119. };
  120. };
  121. spi_0_pins: spi_0_pinmux {
  122. pin {
  123. function = "blsp_spi0";
  124. pins = "gpio55", "gpio56", "gpio57";
  125. drive-strength = <2>;
  126. bias-disable;
  127. };
  128. pin_cs {
  129. function = "gpio";
  130. pins = "gpio54", "gpio59";
  131. drive-strength = <2>;
  132. bias-disable;
  133. output-high;
  134. };
  135. };
  136. };
  137. &blsp_dma {
  138. status = "okay";
  139. };
  140. &spi_0 {
  141. pinctrl-0 = <&spi_0_pins>;
  142. pinctrl-names = "default";
  143. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
  144. status = "okay";
  145. m25p80@0 {
  146. #address-cells = <1>;
  147. #size-cells = <0>;
  148. reg = <0>;
  149. compatible = "jedec,spi-nor";
  150. spi-max-frequency = <24000000>;
  151. partitions {
  152. compatible = "fixed-partitions";
  153. #address-cells = <1>;
  154. #size-cells = <1>;
  155. partition0@0 {
  156. label = "SBL1";
  157. reg = <0x00000000 0x00040000>;
  158. read-only;
  159. };
  160. partition1@40000 {
  161. label = "MIBIB";
  162. reg = <0x00040000 0x00020000>;
  163. read-only;
  164. };
  165. partition2@60000 {
  166. label = "QSEE";
  167. reg = <0x00060000 0x00060000>;
  168. read-only;
  169. };
  170. partition3@c0000 {
  171. label = "CDT";
  172. reg = <0x000c0000 0x00010000>;
  173. read-only;
  174. };
  175. partition4@d0000 {
  176. label = "DDRPARAMS";
  177. reg = <0x000d0000 0x00010000>;
  178. read-only;
  179. };
  180. partition5@e0000 {
  181. label = "APPSBLENV"; /* uboot env*/
  182. reg = <0x000e0000 0x00010000>;
  183. read-only;
  184. };
  185. partition5@f0000 {
  186. label = "APPSBL"; /* uboot */
  187. reg = <0x000f0000 0x00080000>;
  188. read-only;
  189. };
  190. partition5@170000 {
  191. label = "ART";
  192. reg = <0x00170000 0x00010000>;
  193. read-only;
  194. };
  195. };
  196. };
  197. mt29f@1 {
  198. status = "okay";
  199. #address-cells = <1>;
  200. #size-cells = <0>;
  201. compatible = "spinand,mt29f", "w25n01gv";
  202. reg = <1>;
  203. spi-max-frequency = <24000000>;
  204. partitions {
  205. compatible = "fixed-partitions";
  206. #address-cells = <1>;
  207. #size-cells = <1>;
  208. partition0@0 {
  209. label = "ubi";
  210. reg = <0x00000000 0x08000000>;
  211. };
  212. };
  213. };
  214. };
  215. &cryptobam {
  216. status = "okay";
  217. };
  218. &gmac0 {
  219. qcom,poll_required = <1>;
  220. qcom,poll_required_dynamic = <1>;
  221. qcom,phy_mdio_addr = <3>;
  222. vlan_tag = <1 0x10>;
  223. };
  224. &gmac1 {
  225. qcom,poll_required = <1>;
  226. qcom,poll_required_dynamic = <1>;
  227. qcom,phy_mdio_addr = <4>;
  228. vlan_tag = <2 0x20>;
  229. };
  230. &wifi0 {
  231. status = "okay";
  232. qcom,ath10k-calibration-variant = "8devices-Jalapeno";
  233. };
  234. &wifi1 {
  235. status = "okay";
  236. qcom,ath10k-calibration-variant = "8devices-Jalapeno";
  237. };
  238. &usb3_ss_phy {
  239. status = "okay";
  240. };
  241. &usb3_hs_phy {
  242. status = "okay";
  243. };
  244. &usb2_hs_phy {
  245. status = "okay";
  246. };