rtl930x.dtsi 3.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182
  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /dts-v1/;
  3. #define STRINGIZE(s) #s
  4. #define LAN_LABEL(p, s) STRINGIZE(p ## s)
  5. #define SWITCH_PORT_LABEL(n) LAN_LABEL(lan, n)
  6. #define INTERNAL_PHY(n) \
  7. phy##n: ethernet-phy@##n { \
  8. reg = <##n>; \
  9. compatible = "ethernet-phy-ieee802.3-c22"; \
  10. phy-is-integrated; \
  11. };
  12. #define EXTERNAL_PHY(n) \
  13. phy##n: ethernet-phy@##n { \
  14. reg = <##n>; \
  15. compatible = "ethernet-phy-ieee802.3-c22"; \
  16. };
  17. #define EXTERNAL_SFP_PHY(n) \
  18. phy##n: ethernet-phy@##n { \
  19. compatible = "ethernet-phy-ieee802.3-c22"; \
  20. sfp; \
  21. media = "fibre"; \
  22. reg = <##n>; \
  23. };
  24. #define SWITCH_PORT(n, s, m) \
  25. port@##n { \
  26. reg = <##n>; \
  27. label = SWITCH_PORT_LABEL(s) ; \
  28. phy-handle = <&phy##n>; \
  29. phy-mode = #m ; \
  30. };
  31. #define SWITCH_SFP_PORT(n, s, m) \
  32. port@##n { \
  33. reg = <##n>; \
  34. label = SWITCH_PORT_LABEL(s) ; \
  35. phy-handle = <&phy##n>; \
  36. phy-mode = #m ; \
  37. fixed-link { \
  38. speed = <1000>; \
  39. full-duplex; \
  40. }; \
  41. };
  42. / {
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. compatible = "realtek,rtl838x-soc";
  46. cpus {
  47. #address-cells = <1>;
  48. #size-cells = <0>;
  49. frequency = <800000000>;
  50. cpu@0 {
  51. compatible = "mips,mips34Kc";
  52. reg = <0>;
  53. };
  54. };
  55. memory@0 {
  56. device_type = "memory";
  57. reg = <0x0 0x8000000>;
  58. };
  59. chosen {
  60. bootargs = "console=ttyS0,38400";
  61. };
  62. cpuintc: cpuintc {
  63. #address-cells = <0>;
  64. #interrupt-cells = <1>;
  65. interrupt-controller;
  66. compatible = "mti,cpu-interrupt-controller";
  67. };
  68. intc: rtlintc {
  69. #address-cells = <0>;
  70. #interrupt-cells = <1>;
  71. interrupt-controller;
  72. compatible = "realtek,rt9300-intc";
  73. reg = <0xb8003000 0x20>;
  74. };
  75. osc: oscillator {
  76. compatible = "fixed-clock";
  77. #clock-cells = <1>;
  78. clock-frequency = <175000000>;
  79. clock-output-names = "osc";
  80. };
  81. timer: timer@b8003200 {
  82. compatible = "realtek,rtl9300-timer";
  83. reg = <0xb8003200 0x60>;
  84. interrupt-parent = <&intc>;
  85. interrupts = <8>;
  86. interrupt-names = "ostimer";
  87. clocks = <&osc 0>;
  88. };
  89. spi0: spi@b8001200 {
  90. status = "okay";
  91. compatible = "realtek,rtl838x-nor";
  92. reg = <0xb8001200 0x100>;
  93. #address-cells = <1>;
  94. #size-cells = <0>;
  95. };
  96. uart0: uart@b8002000 {
  97. compatible = "ns16550a";
  98. reg = <0xb8002000 0x100>;
  99. clock-frequency = <175000000>;
  100. interrupt-parent = <&intc>;
  101. interrupts = <30>;
  102. reg-io-width = <1>;
  103. reg-shift = <2>;
  104. fifo-size = <1>;
  105. no-loopback-test;
  106. status = "okay";
  107. };
  108. uart1: uart@b8002100 {
  109. compatible = "ns16550a";
  110. reg = <0xb8002100 0x100>;
  111. clock-frequency = <175000000>;
  112. interrupt-parent = <&intc>;
  113. interrupts = <31>;
  114. reg-io-width = <1>;
  115. reg-shift = <2>;
  116. fifo-size = <1>;
  117. no-loopback-test;
  118. status = "okay";
  119. };
  120. gpio0: gpio-controller@b8003500 {
  121. compatible = "realtek,rtl838x-gpio";
  122. reg = <0xb8003500 0x20>;
  123. gpio-controller;
  124. #gpio-cells = <2>;
  125. interrupt-parent = <&intc>;
  126. interrupts = <31>;
  127. };
  128. ethernet0: ethernet@bb00a300 {
  129. status = "okay";
  130. compatible = "realtek,rtl838x-eth";
  131. reg = <0xbb00a300 0x100>;
  132. interrupt-parent = <&intc>;
  133. interrupts = <24>;
  134. #interrupt-cells = <1>;
  135. phy-mode = "internal";
  136. fixed-link {
  137. speed = <1000>;
  138. full-duplex;
  139. };
  140. };
  141. switch0: switch@bb000000 {
  142. status = "okay";
  143. interrupt-parent = <&intc>;
  144. interrupts = <20>;
  145. compatible = "realtek,rtl83xx-switch";
  146. };
  147. };