qcom-ipq8064-ap161.dts 2.3 KB

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  1. #include "qcom-ipq8064-v1.0.dtsi"
  2. / {
  3. model = "Qualcomm IPQ8064/AP161";
  4. compatible = "qcom,ipq8064-ap161", "qcom,ipq8064";
  5. memory@0 {
  6. reg = <0x42000000 0x1e000000>;
  7. device_type = "memory";
  8. };
  9. reserved-memory {
  10. #address-cells = <1>;
  11. #size-cells = <1>;
  12. ranges;
  13. rsvd@41200000 {
  14. reg = <0x41200000 0x300000>;
  15. no-map;
  16. };
  17. };
  18. aliases {
  19. mdio-gpio0 = &mdio0;
  20. };
  21. };
  22. &qcom_pinmux {
  23. rgmii2_pins: rgmii2-pins {
  24. mux {
  25. pins = "gpio27", "gpio28", "gpio29",
  26. "gpio30", "gpio31", "gpio32",
  27. "gpio51", "gpio52", "gpio59",
  28. "gpio60", "gpio61", "gpio62",
  29. "gpio2", "gpio66";
  30. };
  31. };
  32. };
  33. &flash {
  34. partitions {
  35. compatible = "qcom,smem-part";
  36. };
  37. };
  38. &hs_phy_0 {
  39. status = "okay";
  40. };
  41. &ss_phy_0 {
  42. status = "okay";
  43. };
  44. &usb3_0 {
  45. status = "okay";
  46. };
  47. &hs_phy_1 {
  48. status = "okay";
  49. };
  50. &ss_phy_1 {
  51. status = "okay";
  52. };
  53. &usb3_1 {
  54. status = "okay";
  55. };
  56. &pcie0 {
  57. status = "okay";
  58. };
  59. &pcie1 {
  60. status = "okay";
  61. max-link-speed = <1>;
  62. };
  63. &pcie2 {
  64. status = "okay";
  65. };
  66. &nand {
  67. status = "okay";
  68. nand@0 {
  69. reg = <0>;
  70. compatible = "qcom,nandcs";
  71. nand-ecc-strength = <4>;
  72. nand-bus-width = <8>;
  73. nand-ecc-step-size = <512>;
  74. partitions {
  75. compatible = "qcom,smem-part";
  76. };
  77. };
  78. };
  79. &mdio0 {
  80. status = "okay";
  81. pinctrl-0 = <&mdio0_pins>;
  82. pinctrl-names = "default";
  83. phy0: ethernet-phy@0 {
  84. reg = <0>;
  85. qca,ar8327-initvals = <
  86. 0x00004 0x7600000 /* PAD0_MODE */
  87. 0x00008 0x1000000 /* PAD5_MODE */
  88. 0x0000c 0x20080 /* PAD6_MODE */
  89. 0x000e4 0x6a545 /* MAC_POWER_SEL */
  90. 0x000e0 0xc74164de /* SGMII_CTRL */
  91. 0x0007c 0x4e /* PORT0_STATUS */
  92. 0x00094 0x4e /* PORT6_STATUS */
  93. >;
  94. };
  95. phy4: ethernet-phy@4 {
  96. reg = <4>;
  97. qca,phy-rgmii-en;
  98. qca,txclk-delay-en;
  99. qca,rxclk-delay-en;
  100. };
  101. phy3: ethernet-phy@3 {
  102. device_type = "ethernet-phy";
  103. reg = <3>;
  104. };
  105. };
  106. &gmac0 {
  107. status = "okay";
  108. phy-mode = "rgmii";
  109. qcom,id = <0>;
  110. pinctrl-0 = <&rgmii2_pins>;
  111. pinctrl-names = "default";
  112. mdiobus = <&mdio0>;
  113. fixed-link {
  114. speed = <1000>;
  115. full-duplex;
  116. };
  117. };
  118. &gmac1 {
  119. status = "okay";
  120. phy-mode = "rgmii";
  121. qcom,id = <1>;
  122. mdiobus = <&mdio0>;
  123. fixed-link {
  124. speed = <1000>;
  125. full-duplex;
  126. };
  127. };
  128. &gmac2 {
  129. status = "okay";
  130. phy-mode = "sgmii";
  131. qcom,id = <2>;
  132. mdiobus = <&mdio0>;
  133. fixed-link {
  134. speed = <1000>;
  135. full-duplex;
  136. };
  137. };
  138. &adm_dma {
  139. status = "okay";
  140. };