300-pending_work.patch 26 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860
  1. commit 065e0b64f71632f5ad7f00c102fde09c534cfbf0
  2. Author: Felix Fietkau <[email protected]>
  3. Date: Tue Sep 30 11:00:33 2014 +0200
  4. ath9k: fix getting tx duration for dynack
  5. On AR9003, tx control and tx status are in separate descriptor rings.
  6. Tx duration is extracted from the tx control descriptor data, which
  7. ar9003_hw_proc_txdesc cannot access.
  8. Fix getting the duration by adding a separate callback for it.
  9. Acked-by: Lorenzo Bianconi <[email protected]>
  10. Signed-off-by: Felix Fietkau <[email protected]>
  11. commit fdf9a4517b60d847b9bc0a30249efd96559fa450
  12. Author: Felix Fietkau <[email protected]>
  13. Date: Tue Sep 9 09:48:30 2014 +0200
  14. ath9k_hw: fix PLL clock initialization for newer SoC
  15. On AR934x and newer SoC devices, the layout of the AR_RTC_PLL_CONTROL
  16. register changed. This currently breaks at least 5/10 MHz operation.
  17. AR933x uses the old layout.
  18. It might also have been causing other stability issues because of the
  19. different location of the PLL_BYPASS bit which needs to be set during
  20. PLL clock initialization.
  21. This patch also removes more instances of hardcoded register values in
  22. favor of properly computed ones with the PLL_BYPASS bit added.
  23. Reported-by: Lorenzo Bianconi <[email protected]>
  24. Signed-off-by: Felix Fietkau <[email protected]>
  25. commit b6d1f51cd8bdc9d952147a960fbf1f261d8e4188
  26. Author: Felix Fietkau <[email protected]>
  27. Date: Mon Sep 8 18:35:08 2014 +0200
  28. ath9k_hw: reduce ANI spur immunity setting on HT40 extension channel
  29. The cycpwr_thr1 value needs to be lower on the extension channel than on
  30. the control channel, similar to how the register settings are programmed
  31. in the initvals.
  32. Also drop the unnecessary check for HT40 - this register can always be
  33. written. This patch has been reported to improve HT40 stability and
  34. throughput in some environments.
  35. Signed-off-by: Felix Fietkau <[email protected]>
  36. commit 5ad2dfbaa19aa45d29184d30c8c5dae0e110074a
  37. Author: Felix Fietkau <[email protected]>
  38. Date: Mon Sep 8 18:31:26 2014 +0200
  39. Revert "ath9k_hw: reduce ANI firstep range for older chips"
  40. This reverts commit 09efc56345be4146ab9fc87a55c837ed5d6ea1ab
  41. I've received reports that this change is decreasing throughput in some
  42. rare conditions on an AR9280 based device
  43. Cc: [email protected]
  44. Signed-off-by: Felix Fietkau <[email protected]>
  45. commit 4c82fc569cf2f29e6c66d98ef4a1b0f3b6a98e9d
  46. Author: Felix Fietkau <[email protected]>
  47. Date: Sat Sep 27 22:39:27 2014 +0200
  48. ath9k_hw: disable hardware ad-hoc flag on ar934x rev 3
  49. On AR934x rev 3, settin the ad-hoc flag completely messes up hardware
  50. state - beacons get stuck, almost no packets make it out, hardware is
  51. constantly reset.
  52. When leaving out that flag and setting up the hw like in AP mode, TSF
  53. timers won't be automatically synced, but at least the rest works.
  54. AR934x rev 2 and older are not affected by this bug
  55. Signed-off-by: Felix Fietkau <[email protected]>
  56. commit ecfb4b3fff006372ac5c40871f9bb182fd00444f
  57. Author: Felix Fietkau <[email protected]>
  58. Date: Sat Sep 27 22:15:43 2014 +0200
  59. ath9k: use ah->get_mac_revision for all SoC devices if available
  60. It is needed for AR934x as well
  61. Signed-off-by: Felix Fietkau <[email protected]>
  62. commit c11113bc25df22898fb995d3205bdc4f27c98073
  63. Author: Felix Fietkau <[email protected]>
  64. Date: Sat Sep 27 18:04:58 2014 +0200
  65. ath5k: add missing include for debug code
  66. Needed for calling vmalloc()/vfree()
  67. Signed-off-by: Felix Fietkau <[email protected]>
  68. commit 83f76a9f9a42773c7eef90bb86b4b2c16b0b3755
  69. Author: Felix Fietkau <[email protected]>
  70. Date: Sat Sep 27 15:58:51 2014 +0200
  71. ath5k: fix AHB kconfig dependency
  72. Signed-off-by: Felix Fietkau <[email protected]>
  73. commit ddd67f2a5cfd73fad4b78190025402d419b9f0a9
  74. Author: Felix Fietkau <[email protected]>
  75. Date: Sat Sep 27 15:57:09 2014 +0200
  76. Revert "ath5k: Remove AHB bus support"
  77. This reverts commit 093ec3c5337434f40d77c1af06c139da3e5ba6dc.
  78. --- a/drivers/net/wireless/ath/ath5k/Kconfig
  79. +++ b/drivers/net/wireless/ath/ath5k/Kconfig
  80. @@ -2,12 +2,14 @@ config ATH5K
  81. tristate "Atheros 5xxx wireless cards support"
  82. depends on m
  83. depends on PCI && MAC80211
  84. + depends on (PCI || ATHEROS_AR231X) && MAC80211
  85. select ATH_COMMON
  86. select MAC80211_LEDS
  87. select BACKPORT_LEDS_CLASS
  88. select BACKPORT_NEW_LEDS
  89. select BACKPORT_AVERAGE
  90. - select ATH5K_PCI
  91. + select ATH5K_AHB if ATHEROS_AR231X
  92. + select ATH5K_PCI if !ATHEROS_AR231X
  93. ---help---
  94. This module adds support for wireless adapters based on
  95. Atheros 5xxx chipset.
  96. @@ -52,9 +54,16 @@ config ATH5K_TRACER
  97. If unsure, say N.
  98. +config ATH5K_AHB
  99. + bool "Atheros 5xxx AHB bus support"
  100. + depends on ATHEROS_AR231X
  101. + ---help---
  102. + This adds support for WiSoC type chipsets of the 5xxx Atheros
  103. + family.
  104. +
  105. config ATH5K_PCI
  106. bool "Atheros 5xxx PCI bus support"
  107. - depends on PCI
  108. + depends on !ATHEROS_AR231X
  109. ---help---
  110. This adds support for PCI type chipsets of the 5xxx Atheros
  111. family.
  112. --- /dev/null
  113. +++ b/drivers/net/wireless/ath/ath5k/ahb.c
  114. @@ -0,0 +1,234 @@
  115. +/*
  116. + * Copyright (c) 2008-2009 Atheros Communications Inc.
  117. + * Copyright (c) 2009 Gabor Juhos <[email protected]>
  118. + * Copyright (c) 2009 Imre Kaloz <[email protected]>
  119. + *
  120. + * Permission to use, copy, modify, and/or distribute this software for any
  121. + * purpose with or without fee is hereby granted, provided that the above
  122. + * copyright notice and this permission notice appear in all copies.
  123. + *
  124. + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  125. + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  126. + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  127. + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  128. + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  129. + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  130. + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  131. + */
  132. +
  133. +#include <linux/nl80211.h>
  134. +#include <linux/platform_device.h>
  135. +#include <linux/etherdevice.h>
  136. +#include <linux/export.h>
  137. +#include <ar231x_platform.h>
  138. +#include "ath5k.h"
  139. +#include "debug.h"
  140. +#include "base.h"
  141. +#include "reg.h"
  142. +
  143. +/* return bus cachesize in 4B word units */
  144. +static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz)
  145. +{
  146. + *csz = L1_CACHE_BYTES >> 2;
  147. +}
  148. +
  149. +static bool
  150. +ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
  151. +{
  152. + struct ath5k_hw *ah = common->priv;
  153. + struct platform_device *pdev = to_platform_device(ah->dev);
  154. + struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
  155. + u16 *eeprom, *eeprom_end;
  156. +
  157. + eeprom = (u16 *) bcfg->radio;
  158. + eeprom_end = ((void *) bcfg->config) + BOARD_CONFIG_BUFSZ;
  159. +
  160. + eeprom += off;
  161. + if (eeprom > eeprom_end)
  162. + return false;
  163. +
  164. + *data = *eeprom;
  165. + return true;
  166. +}
  167. +
  168. +int ath5k_hw_read_srev(struct ath5k_hw *ah)
  169. +{
  170. + struct platform_device *pdev = to_platform_device(ah->dev);
  171. + struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
  172. + ah->ah_mac_srev = bcfg->devid;
  173. + return 0;
  174. +}
  175. +
  176. +static int ath5k_ahb_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac)
  177. +{
  178. + struct platform_device *pdev = to_platform_device(ah->dev);
  179. + struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
  180. + u8 *cfg_mac;
  181. +
  182. + if (to_platform_device(ah->dev)->id == 0)
  183. + cfg_mac = bcfg->config->wlan0_mac;
  184. + else
  185. + cfg_mac = bcfg->config->wlan1_mac;
  186. +
  187. + memcpy(mac, cfg_mac, ETH_ALEN);
  188. + return 0;
  189. +}
  190. +
  191. +static const struct ath_bus_ops ath_ahb_bus_ops = {
  192. + .ath_bus_type = ATH_AHB,
  193. + .read_cachesize = ath5k_ahb_read_cachesize,
  194. + .eeprom_read = ath5k_ahb_eeprom_read,
  195. + .eeprom_read_mac = ath5k_ahb_eeprom_read_mac,
  196. +};
  197. +
  198. +/*Initialization*/
  199. +static int ath_ahb_probe(struct platform_device *pdev)
  200. +{
  201. + struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
  202. + struct ath5k_hw *ah;
  203. + struct ieee80211_hw *hw;
  204. + struct resource *res;
  205. + void __iomem *mem;
  206. + int irq;
  207. + int ret = 0;
  208. + u32 reg;
  209. +
  210. + if (!dev_get_platdata(&pdev->dev)) {
  211. + dev_err(&pdev->dev, "no platform data specified\n");
  212. + ret = -EINVAL;
  213. + goto err_out;
  214. + }
  215. +
  216. + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  217. + if (res == NULL) {
  218. + dev_err(&pdev->dev, "no memory resource found\n");
  219. + ret = -ENXIO;
  220. + goto err_out;
  221. + }
  222. +
  223. + mem = ioremap_nocache(res->start, resource_size(res));
  224. + if (mem == NULL) {
  225. + dev_err(&pdev->dev, "ioremap failed\n");
  226. + ret = -ENOMEM;
  227. + goto err_out;
  228. + }
  229. +
  230. + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  231. + if (res == NULL) {
  232. + dev_err(&pdev->dev, "no IRQ resource found\n");
  233. + ret = -ENXIO;
  234. + goto err_iounmap;
  235. + }
  236. +
  237. + irq = res->start;
  238. +
  239. + hw = ieee80211_alloc_hw(sizeof(struct ath5k_hw), &ath5k_hw_ops);
  240. + if (hw == NULL) {
  241. + dev_err(&pdev->dev, "no memory for ieee80211_hw\n");
  242. + ret = -ENOMEM;
  243. + goto err_iounmap;
  244. + }
  245. +
  246. + ah = hw->priv;
  247. + ah->hw = hw;
  248. + ah->dev = &pdev->dev;
  249. + ah->iobase = mem;
  250. + ah->irq = irq;
  251. + ah->devid = bcfg->devid;
  252. +
  253. + if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
  254. + /* Enable WMAC AHB arbitration */
  255. + reg = ioread32((void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
  256. + reg |= AR5K_AR2315_AHB_ARB_CTL_WLAN;
  257. + iowrite32(reg, (void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
  258. +
  259. + /* Enable global WMAC swapping */
  260. + reg = ioread32((void __iomem *) AR5K_AR2315_BYTESWAP);
  261. + reg |= AR5K_AR2315_BYTESWAP_WMAC;
  262. + iowrite32(reg, (void __iomem *) AR5K_AR2315_BYTESWAP);
  263. + } else {
  264. + /* Enable WMAC DMA access (assuming 5312 or 231x*/
  265. + /* TODO: check other platforms */
  266. + reg = ioread32((void __iomem *) AR5K_AR5312_ENABLE);
  267. + if (to_platform_device(ah->dev)->id == 0)
  268. + reg |= AR5K_AR5312_ENABLE_WLAN0;
  269. + else
  270. + reg |= AR5K_AR5312_ENABLE_WLAN1;
  271. + iowrite32(reg, (void __iomem *) AR5K_AR5312_ENABLE);
  272. +
  273. + /*
  274. + * On a dual-band AR5312, the multiband radio is only
  275. + * used as pass-through. Disable 2 GHz support in the
  276. + * driver for it
  277. + */
  278. + if (to_platform_device(ah->dev)->id == 0 &&
  279. + (bcfg->config->flags & (BD_WLAN0 | BD_WLAN1)) ==
  280. + (BD_WLAN1 | BD_WLAN0))
  281. + ah->ah_capabilities.cap_needs_2GHz_ovr = true;
  282. + else
  283. + ah->ah_capabilities.cap_needs_2GHz_ovr = false;
  284. + }
  285. +
  286. + ret = ath5k_init_ah(ah, &ath_ahb_bus_ops);
  287. + if (ret != 0) {
  288. + dev_err(&pdev->dev, "failed to attach device, err=%d\n", ret);
  289. + ret = -ENODEV;
  290. + goto err_free_hw;
  291. + }
  292. +
  293. + platform_set_drvdata(pdev, hw);
  294. +
  295. + return 0;
  296. +
  297. + err_free_hw:
  298. + ieee80211_free_hw(hw);
  299. + err_iounmap:
  300. + iounmap(mem);
  301. + err_out:
  302. + return ret;
  303. +}
  304. +
  305. +static int ath_ahb_remove(struct platform_device *pdev)
  306. +{
  307. + struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
  308. + struct ieee80211_hw *hw = platform_get_drvdata(pdev);
  309. + struct ath5k_hw *ah;
  310. + u32 reg;
  311. +
  312. + if (!hw)
  313. + return 0;
  314. +
  315. + ah = hw->priv;
  316. +
  317. + if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
  318. + /* Disable WMAC AHB arbitration */
  319. + reg = ioread32((void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
  320. + reg &= ~AR5K_AR2315_AHB_ARB_CTL_WLAN;
  321. + iowrite32(reg, (void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
  322. + } else {
  323. + /*Stop DMA access */
  324. + reg = ioread32((void __iomem *) AR5K_AR5312_ENABLE);
  325. + if (to_platform_device(ah->dev)->id == 0)
  326. + reg &= ~AR5K_AR5312_ENABLE_WLAN0;
  327. + else
  328. + reg &= ~AR5K_AR5312_ENABLE_WLAN1;
  329. + iowrite32(reg, (void __iomem *) AR5K_AR5312_ENABLE);
  330. + }
  331. +
  332. + ath5k_deinit_ah(ah);
  333. + iounmap(ah->iobase);
  334. + ieee80211_free_hw(hw);
  335. +
  336. + return 0;
  337. +}
  338. +
  339. +static struct platform_driver ath_ahb_driver = {
  340. + .probe = ath_ahb_probe,
  341. + .remove = ath_ahb_remove,
  342. + .driver = {
  343. + .name = "ar231x-wmac",
  344. + .owner = THIS_MODULE,
  345. + },
  346. +};
  347. +
  348. +module_platform_driver(ath_ahb_driver);
  349. --- a/drivers/net/wireless/ath/ath5k/ath5k.h
  350. +++ b/drivers/net/wireless/ath/ath5k/ath5k.h
  351. @@ -1647,6 +1647,32 @@ static inline struct ath_regulatory *ath
  352. return &(ath5k_hw_common(ah)->regulatory);
  353. }
  354. +#ifdef CONFIG_ATHEROS_AR231X
  355. +#define AR5K_AR2315_PCI_BASE ((void __iomem *)0xb0100000)
  356. +
  357. +static inline void __iomem *ath5k_ahb_reg(struct ath5k_hw *ah, u16 reg)
  358. +{
  359. + /* On AR2315 and AR2317 the PCI clock domain registers
  360. + * are outside of the WMAC register space */
  361. + if (unlikely((reg >= 0x4000) && (reg < 0x5000) &&
  362. + (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6)))
  363. + return AR5K_AR2315_PCI_BASE + reg;
  364. +
  365. + return ah->iobase + reg;
  366. +}
  367. +
  368. +static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
  369. +{
  370. + return ioread32(ath5k_ahb_reg(ah, reg));
  371. +}
  372. +
  373. +static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
  374. +{
  375. + iowrite32(val, ath5k_ahb_reg(ah, reg));
  376. +}
  377. +
  378. +#else
  379. +
  380. static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
  381. {
  382. return ioread32(ah->iobase + reg);
  383. @@ -1657,6 +1683,8 @@ static inline void ath5k_hw_reg_write(st
  384. iowrite32(val, ah->iobase + reg);
  385. }
  386. +#endif
  387. +
  388. static inline enum ath_bus_type ath5k_get_bus_type(struct ath5k_hw *ah)
  389. {
  390. return ath5k_hw_common(ah)->bus_ops->ath_bus_type;
  391. --- a/drivers/net/wireless/ath/ath5k/base.c
  392. +++ b/drivers/net/wireless/ath/ath5k/base.c
  393. @@ -99,6 +99,15 @@ static int ath5k_reset(struct ath5k_hw *
  394. /* Known SREVs */
  395. static const struct ath5k_srev_name srev_names[] = {
  396. +#ifdef CONFIG_ATHEROS_AR231X
  397. + { "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R2 },
  398. + { "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R7 },
  399. + { "2313", AR5K_VERSION_MAC, AR5K_SREV_AR2313_R8 },
  400. + { "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R6 },
  401. + { "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R7 },
  402. + { "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R1 },
  403. + { "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R2 },
  404. +#else
  405. { "5210", AR5K_VERSION_MAC, AR5K_SREV_AR5210 },
  406. { "5311", AR5K_VERSION_MAC, AR5K_SREV_AR5311 },
  407. { "5311A", AR5K_VERSION_MAC, AR5K_SREV_AR5311A },
  408. @@ -117,6 +126,7 @@ static const struct ath5k_srev_name srev
  409. { "5418", AR5K_VERSION_MAC, AR5K_SREV_AR5418 },
  410. { "2425", AR5K_VERSION_MAC, AR5K_SREV_AR2425 },
  411. { "2417", AR5K_VERSION_MAC, AR5K_SREV_AR2417 },
  412. +#endif
  413. { "xxxxx", AR5K_VERSION_MAC, AR5K_SREV_UNKNOWN },
  414. { "5110", AR5K_VERSION_RAD, AR5K_SREV_RAD_5110 },
  415. { "5111", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111 },
  416. @@ -132,6 +142,10 @@ static const struct ath5k_srev_name srev
  417. { "5413", AR5K_VERSION_RAD, AR5K_SREV_RAD_5413 },
  418. { "5424", AR5K_VERSION_RAD, AR5K_SREV_RAD_5424 },
  419. { "5133", AR5K_VERSION_RAD, AR5K_SREV_RAD_5133 },
  420. +#ifdef CONFIG_ATHEROS_AR231X
  421. + { "2316", AR5K_VERSION_RAD, AR5K_SREV_RAD_2316 },
  422. + { "2317", AR5K_VERSION_RAD, AR5K_SREV_RAD_2317 },
  423. +#endif
  424. { "xxxxx", AR5K_VERSION_RAD, AR5K_SREV_UNKNOWN },
  425. };
  426. --- a/drivers/net/wireless/ath/ath5k/led.c
  427. +++ b/drivers/net/wireless/ath/ath5k/led.c
  428. @@ -163,14 +163,20 @@ int ath5k_init_leds(struct ath5k_hw *ah)
  429. {
  430. int ret = 0;
  431. struct ieee80211_hw *hw = ah->hw;
  432. +#ifndef CONFIG_ATHEROS_AR231X
  433. struct pci_dev *pdev = ah->pdev;
  434. +#endif
  435. char name[ATH5K_LED_MAX_NAME_LEN + 1];
  436. const struct pci_device_id *match;
  437. if (!ah->pdev)
  438. return 0;
  439. +#ifdef CONFIG_ATHEROS_AR231X
  440. + match = NULL;
  441. +#else
  442. match = pci_match_id(&ath5k_led_devices[0], pdev);
  443. +#endif
  444. if (match) {
  445. __set_bit(ATH_STAT_LEDSOFT, ah->status);
  446. ah->led_pin = ATH_PIN(match->driver_data);
  447. --- a/drivers/net/wireless/ath/ath5k/debug.c
  448. +++ b/drivers/net/wireless/ath/ath5k/debug.c
  449. @@ -65,6 +65,7 @@
  450. #include <linux/seq_file.h>
  451. #include <linux/list.h>
  452. +#include <linux/vmalloc.h>
  453. #include "debug.h"
  454. #include "ath5k.h"
  455. #include "reg.h"
  456. --- a/drivers/net/wireless/ath/ath9k/hw.c
  457. +++ b/drivers/net/wireless/ath/ath9k/hw.c
  458. @@ -222,31 +222,28 @@ static void ath9k_hw_read_revisions(stru
  459. {
  460. u32 val;
  461. + if (ah->get_mac_revision)
  462. + ah->hw_version.macRev = ah->get_mac_revision();
  463. +
  464. switch (ah->hw_version.devid) {
  465. case AR5416_AR9100_DEVID:
  466. ah->hw_version.macVersion = AR_SREV_VERSION_9100;
  467. break;
  468. case AR9300_DEVID_AR9330:
  469. ah->hw_version.macVersion = AR_SREV_VERSION_9330;
  470. - if (ah->get_mac_revision) {
  471. - ah->hw_version.macRev = ah->get_mac_revision();
  472. - } else {
  473. + if (!ah->get_mac_revision) {
  474. val = REG_READ(ah, AR_SREV);
  475. ah->hw_version.macRev = MS(val, AR_SREV_REVISION2);
  476. }
  477. return;
  478. case AR9300_DEVID_AR9340:
  479. ah->hw_version.macVersion = AR_SREV_VERSION_9340;
  480. - val = REG_READ(ah, AR_SREV);
  481. - ah->hw_version.macRev = MS(val, AR_SREV_REVISION2);
  482. return;
  483. case AR9300_DEVID_QCA955X:
  484. ah->hw_version.macVersion = AR_SREV_VERSION_9550;
  485. return;
  486. case AR9300_DEVID_AR953X:
  487. ah->hw_version.macVersion = AR_SREV_VERSION_9531;
  488. - if (ah->get_mac_revision)
  489. - ah->hw_version.macRev = ah->get_mac_revision();
  490. return;
  491. }
  492. @@ -704,6 +701,8 @@ static void ath9k_hw_init_pll(struct ath
  493. {
  494. u32 pll;
  495. + pll = ath9k_hw_compute_pll_control(ah, chan);
  496. +
  497. if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
  498. /* program BB PLL ki and kd value, ki=0x4, kd=0x40 */
  499. REG_RMW_FIELD(ah, AR_CH0_BB_DPLL2,
  500. @@ -754,7 +753,8 @@ static void ath9k_hw_init_pll(struct ath
  501. REG_RMW_FIELD(ah, AR_CH0_DDR_DPLL3,
  502. AR_CH0_DPLL3_PHASE_SHIFT, 0x1);
  503. - REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x1142c);
  504. + REG_WRITE(ah, AR_RTC_PLL_CONTROL,
  505. + pll | AR_RTC_9300_PLL_BYPASS);
  506. udelay(1000);
  507. /* program refdiv, nint, frac to RTC register */
  508. @@ -770,7 +770,8 @@ static void ath9k_hw_init_pll(struct ath
  509. } else if (AR_SREV_9340(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah)) {
  510. u32 regval, pll2_divint, pll2_divfrac, refdiv;
  511. - REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x1142c);
  512. + REG_WRITE(ah, AR_RTC_PLL_CONTROL,
  513. + pll | AR_RTC_9300_SOC_PLL_BYPASS);
  514. udelay(1000);
  515. REG_SET_BIT(ah, AR_PHY_PLL_MODE, 0x1 << 16);
  516. @@ -843,7 +844,6 @@ static void ath9k_hw_init_pll(struct ath
  517. udelay(1000);
  518. }
  519. - pll = ath9k_hw_compute_pll_control(ah, chan);
  520. if (AR_SREV_9565(ah))
  521. pll |= 0x40000;
  522. REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
  523. @@ -1192,9 +1192,12 @@ static void ath9k_hw_set_operating_mode(
  524. switch (opmode) {
  525. case NL80211_IFTYPE_ADHOC:
  526. - set |= AR_STA_ID1_ADHOC;
  527. - REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);
  528. - break;
  529. + if (!AR_SREV_9340_13(ah)) {
  530. + set |= AR_STA_ID1_ADHOC;
  531. + REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);
  532. + break;
  533. + }
  534. + /* fall through */
  535. case NL80211_IFTYPE_MESH_POINT:
  536. case NL80211_IFTYPE_AP:
  537. set |= AR_STA_ID1_STA_AP;
  538. --- a/drivers/net/wireless/ath/ath9k/reg.h
  539. +++ b/drivers/net/wireless/ath/ath9k/reg.h
  540. @@ -903,6 +903,10 @@
  541. #define AR_SREV_9340(_ah) \
  542. (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9340))
  543. +#define AR_SREV_9340_13(_ah) \
  544. + (AR_SREV_9340((_ah)) && \
  545. + ((_ah)->hw_version.macRev == AR_SREV_REVISION_9340_13))
  546. +
  547. #define AR_SREV_9340_13_OR_LATER(_ah) \
  548. (AR_SREV_9340((_ah)) && \
  549. ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9340_13))
  550. @@ -1240,12 +1244,23 @@ enum {
  551. #define AR_CH0_DPLL3_PHASE_SHIFT_S 23
  552. #define AR_PHY_CCA_NOM_VAL_2GHZ -118
  553. +#define AR_RTC_9300_SOC_PLL_DIV_INT 0x0000003f
  554. +#define AR_RTC_9300_SOC_PLL_DIV_INT_S 0
  555. +#define AR_RTC_9300_SOC_PLL_DIV_FRAC 0x000fffc0
  556. +#define AR_RTC_9300_SOC_PLL_DIV_FRAC_S 6
  557. +#define AR_RTC_9300_SOC_PLL_REFDIV 0x01f00000
  558. +#define AR_RTC_9300_SOC_PLL_REFDIV_S 20
  559. +#define AR_RTC_9300_SOC_PLL_CLKSEL 0x06000000
  560. +#define AR_RTC_9300_SOC_PLL_CLKSEL_S 25
  561. +#define AR_RTC_9300_SOC_PLL_BYPASS 0x08000000
  562. +
  563. #define AR_RTC_9300_PLL_DIV 0x000003ff
  564. #define AR_RTC_9300_PLL_DIV_S 0
  565. #define AR_RTC_9300_PLL_REFDIV 0x00003C00
  566. #define AR_RTC_9300_PLL_REFDIV_S 10
  567. #define AR_RTC_9300_PLL_CLKSEL 0x0000C000
  568. #define AR_RTC_9300_PLL_CLKSEL_S 14
  569. +#define AR_RTC_9300_PLL_BYPASS 0x00010000
  570. #define AR_RTC_9160_PLL_DIV 0x000003ff
  571. #define AR_RTC_9160_PLL_DIV_S 0
  572. --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
  573. +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
  574. @@ -1004,9 +1004,11 @@ static bool ar5008_hw_ani_control_new(st
  575. case ATH9K_ANI_FIRSTEP_LEVEL:{
  576. u32 level = param;
  577. - value = level;
  578. + value = level * 2;
  579. REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
  580. AR_PHY_FIND_SIG_FIRSTEP, value);
  581. + REG_RMW_FIELD(ah, AR_PHY_FIND_SIG_LOW,
  582. + AR_PHY_FIND_SIG_FIRSTEP_LOW, value);
  583. if (level != aniState->firstepLevel) {
  584. ath_dbg(common, ANI,
  585. @@ -1040,9 +1042,8 @@ static bool ar5008_hw_ani_control_new(st
  586. REG_RMW_FIELD(ah, AR_PHY_TIMING5,
  587. AR_PHY_TIMING5_CYCPWR_THR1, value);
  588. - if (IS_CHAN_HT40(ah->curchan))
  589. - REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,
  590. - AR_PHY_EXT_TIMING5_CYCPWR_THR1, value);
  591. + REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,
  592. + AR_PHY_EXT_TIMING5_CYCPWR_THR1, value - 1);
  593. if (level != aniState->spurImmunityLevel) {
  594. ath_dbg(common, ANI,
  595. --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
  596. +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
  597. @@ -517,6 +517,23 @@ static void ar9003_hw_spur_mitigate(stru
  598. ar9003_hw_spur_mitigate_ofdm(ah, chan);
  599. }
  600. +static u32 ar9003_hw_compute_pll_control_soc(struct ath_hw *ah,
  601. + struct ath9k_channel *chan)
  602. +{
  603. + u32 pll;
  604. +
  605. + pll = SM(0x5, AR_RTC_9300_SOC_PLL_REFDIV);
  606. +
  607. + if (chan && IS_CHAN_HALF_RATE(chan))
  608. + pll |= SM(0x1, AR_RTC_9300_SOC_PLL_CLKSEL);
  609. + else if (chan && IS_CHAN_QUARTER_RATE(chan))
  610. + pll |= SM(0x2, AR_RTC_9300_SOC_PLL_CLKSEL);
  611. +
  612. + pll |= SM(0x2c, AR_RTC_9300_SOC_PLL_DIV_INT);
  613. +
  614. + return pll;
  615. +}
  616. +
  617. static u32 ar9003_hw_compute_pll_control(struct ath_hw *ah,
  618. struct ath9k_channel *chan)
  619. {
  620. @@ -1781,7 +1798,12 @@ void ar9003_hw_attach_phy_ops(struct ath
  621. priv_ops->rf_set_freq = ar9003_hw_set_channel;
  622. priv_ops->spur_mitigate_freq = ar9003_hw_spur_mitigate;
  623. - priv_ops->compute_pll_control = ar9003_hw_compute_pll_control;
  624. +
  625. + if (AR_SREV_9340(ah) || AR_SREV_9550(ah) || AR_SREV_9531(ah))
  626. + priv_ops->compute_pll_control = ar9003_hw_compute_pll_control_soc;
  627. + else
  628. + priv_ops->compute_pll_control = ar9003_hw_compute_pll_control;
  629. +
  630. priv_ops->set_channel_regs = ar9003_hw_set_channel_regs;
  631. priv_ops->init_bb = ar9003_hw_init_bb;
  632. priv_ops->process_ini = ar9003_hw_process_ini;
  633. --- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c
  634. +++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
  635. @@ -381,16 +381,27 @@ static int ar9002_hw_proc_txdesc(struct
  636. ts->evm1 = ads->AR_TxEVM1;
  637. ts->evm2 = ads->AR_TxEVM2;
  638. - status = ACCESS_ONCE(ads->ds_ctl4);
  639. - ts->duration[0] = MS(status, AR_PacketDur0);
  640. - ts->duration[1] = MS(status, AR_PacketDur1);
  641. - status = ACCESS_ONCE(ads->ds_ctl5);
  642. - ts->duration[2] = MS(status, AR_PacketDur2);
  643. - ts->duration[3] = MS(status, AR_PacketDur3);
  644. -
  645. return 0;
  646. }
  647. +static int ar9002_hw_get_duration(struct ath_hw *ah, const void *ds, int index)
  648. +{
  649. + struct ar5416_desc *ads = AR5416DESC(ds);
  650. +
  651. + switch (index) {
  652. + case 0:
  653. + return MS(ACCESS_ONCE(ads->ds_ctl4), AR_PacketDur0);
  654. + case 1:
  655. + return MS(ACCESS_ONCE(ads->ds_ctl4), AR_PacketDur1);
  656. + case 2:
  657. + return MS(ACCESS_ONCE(ads->ds_ctl5), AR_PacketDur2);
  658. + case 3:
  659. + return MS(ACCESS_ONCE(ads->ds_ctl5), AR_PacketDur3);
  660. + default:
  661. + return -1;
  662. + }
  663. +}
  664. +
  665. void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds,
  666. u32 size, u32 flags)
  667. {
  668. @@ -413,4 +424,5 @@ void ar9002_hw_attach_mac_ops(struct ath
  669. ops->get_isr = ar9002_hw_get_isr;
  670. ops->set_txdesc = ar9002_set_txdesc;
  671. ops->proc_txdesc = ar9002_hw_proc_txdesc;
  672. + ops->get_duration = ar9002_hw_get_duration;
  673. }
  674. --- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
  675. +++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
  676. @@ -355,11 +355,9 @@ static int ar9003_hw_proc_txdesc(struct
  677. struct ath_tx_status *ts)
  678. {
  679. struct ar9003_txs *ads;
  680. - struct ar9003_txc *adc;
  681. u32 status;
  682. ads = &ah->ts_ring[ah->ts_tail];
  683. - adc = (struct ar9003_txc *)ads;
  684. status = ACCESS_ONCE(ads->status8);
  685. if ((status & AR_TxDone) == 0)
  686. @@ -428,18 +426,29 @@ static int ar9003_hw_proc_txdesc(struct
  687. ts->ts_rssi_ext1 = MS(status, AR_TxRSSIAnt11);
  688. ts->ts_rssi_ext2 = MS(status, AR_TxRSSIAnt12);
  689. - status = ACCESS_ONCE(adc->ctl15);
  690. - ts->duration[0] = MS(status, AR_PacketDur0);
  691. - ts->duration[1] = MS(status, AR_PacketDur1);
  692. - status = ACCESS_ONCE(adc->ctl16);
  693. - ts->duration[2] = MS(status, AR_PacketDur2);
  694. - ts->duration[3] = MS(status, AR_PacketDur3);
  695. -
  696. memset(ads, 0, sizeof(*ads));
  697. return 0;
  698. }
  699. +static int ar9003_hw_get_duration(struct ath_hw *ah, const void *ds, int index)
  700. +{
  701. + const struct ar9003_txc *adc = ds;
  702. +
  703. + switch (index) {
  704. + case 0:
  705. + return MS(ACCESS_ONCE(adc->ctl15), AR_PacketDur0);
  706. + case 1:
  707. + return MS(ACCESS_ONCE(adc->ctl15), AR_PacketDur1);
  708. + case 2:
  709. + return MS(ACCESS_ONCE(adc->ctl16), AR_PacketDur2);
  710. + case 3:
  711. + return MS(ACCESS_ONCE(adc->ctl16), AR_PacketDur3);
  712. + default:
  713. + return 0;
  714. + }
  715. +}
  716. +
  717. void ar9003_hw_attach_mac_ops(struct ath_hw *hw)
  718. {
  719. struct ath_hw_ops *ops = ath9k_hw_ops(hw);
  720. @@ -449,6 +458,7 @@ void ar9003_hw_attach_mac_ops(struct ath
  721. ops->get_isr = ar9003_hw_get_isr;
  722. ops->set_txdesc = ar9003_set_txdesc;
  723. ops->proc_txdesc = ar9003_hw_proc_txdesc;
  724. + ops->get_duration = ar9003_hw_get_duration;
  725. }
  726. void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size)
  727. --- a/drivers/net/wireless/ath/ath9k/dynack.c
  728. +++ b/drivers/net/wireless/ath/ath9k/dynack.c
  729. @@ -202,7 +202,7 @@ void ath_dynack_sample_tx_ts(struct ath_
  730. ridx = ts->ts_rateindex;
  731. da->st_rbf.ts[da->st_rbf.t_rb].tstamp = ts->ts_tstamp;
  732. - da->st_rbf.ts[da->st_rbf.t_rb].dur = ts->duration[ts->ts_rateindex];
  733. + da->st_rbf.ts[da->st_rbf.t_rb].dur = ts->duration;
  734. ether_addr_copy(da->st_rbf.addr[da->st_rbf.t_rb].h_dest, hdr->addr1);
  735. ether_addr_copy(da->st_rbf.addr[da->st_rbf.t_rb].h_src, hdr->addr2);
  736. --- a/drivers/net/wireless/ath/ath9k/hw-ops.h
  737. +++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
  738. @@ -67,6 +67,12 @@ static inline int ath9k_hw_txprocdesc(st
  739. return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
  740. }
  741. +static inline int ath9k_hw_get_duration(struct ath_hw *ah, const void *ds,
  742. + int index)
  743. +{
  744. + return ath9k_hw_ops(ah)->get_duration(ah, ds, index);
  745. +}
  746. +
  747. static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
  748. struct ath_hw_antcomb_conf *antconf)
  749. {
  750. --- a/drivers/net/wireless/ath/ath9k/hw.h
  751. +++ b/drivers/net/wireless/ath/ath9k/hw.h
  752. @@ -691,6 +691,7 @@ struct ath_hw_ops {
  753. struct ath_tx_info *i);
  754. int (*proc_txdesc)(struct ath_hw *ah, void *ds,
  755. struct ath_tx_status *ts);
  756. + int (*get_duration)(struct ath_hw *ah, const void *ds, int index);
  757. void (*antdiv_comb_conf_get)(struct ath_hw *ah,
  758. struct ath_hw_antcomb_conf *antconf);
  759. void (*antdiv_comb_conf_set)(struct ath_hw *ah,
  760. --- a/drivers/net/wireless/ath/ath9k/mac.h
  761. +++ b/drivers/net/wireless/ath/ath9k/mac.h
  762. @@ -121,7 +121,7 @@ struct ath_tx_status {
  763. u32 evm0;
  764. u32 evm1;
  765. u32 evm2;
  766. - u32 duration[4];
  767. + u32 duration;
  768. };
  769. struct ath_rx_status {
  770. --- a/drivers/net/wireless/ath/ath9k/xmit.c
  771. +++ b/drivers/net/wireless/ath/ath9k/xmit.c
  772. @@ -683,6 +683,8 @@ static void ath_tx_process_buffer(struct
  773. if (bf_is_ampdu_not_probing(bf))
  774. txq->axq_ampdu_depth--;
  775. + ts->duration = ath9k_hw_get_duration(sc->sc_ah, bf->bf_desc,
  776. + ts->ts_rateindex);
  777. if (!bf_isampdu(bf)) {
  778. if (!flush) {
  779. info = IEEE80211_SKB_CB(bf->bf_mpdu);