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616-rt2x00-support-rt5350.patch

616-rt2x00-support-rt5350.patch 9.6 KB
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  1. --- a/drivers/net/wireless/rt2x00/rt2800.h
    2. 

  2. +++ b/drivers/net/wireless/rt2x00/rt2800.h
    3. 

  3. @@ -71,6 +71,7 @@
    4. 

  4.  #define RF3053				0x000d
    5. 

  5.  #define RF5592				0x000f
    6. 

  6.  #define RF3290				0x3290
    7. 

  7. +#define RF5350				0x5350
    8. 

  8.  #define RF5360				0x5360
    9. 

  9.  #define RF5370				0x5370
    10. 

  10.  #define RF5372				0x5372
    11. 

  11. --- a/drivers/net/wireless/rt2x00/rt2800lib.c
    12. 

  12. +++ b/drivers/net/wireless/rt2x00/rt2800lib.c
    13. 

  13. @@ -2141,6 +2141,15 @@ static void rt2800_config_channel_rf53xx
    14. 

  14.  	if (rf->channel <= 14) {
    15. 

  15.  		int idx = rf->channel-1;
    16. 

  16.  
    17. 

  17. +		if (rt2x00_rt(rt2x00dev, RT5350)) {
    18. 

  18. +			static const char r59_non_bt[] = {0x0b, 0x0b,
    19. 

  19. +				0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0a,
    20. 

  20. +				0x0a, 0x09, 0x08, 0x07, 0x07, 0x06};
    21. 

  21. +
    22. 

  22. +			rt2800_rfcsr_write(rt2x00dev, 59,
    23. 

  23. +					   r59_non_bt[idx]);
    24. 

  24. +		}
    25. 

  25. +
    26. 

  26.  		if (test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) {
    27. 

  27.  			if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F)) {
    28. 

  28.  				/* r55/r59 value array of channel 1~14 */
    29. 

  29. @@ -2598,6 +2607,7 @@ static void rt2800_config_channel(struct
    30. 

  30.  	case RF3322:
    31. 

  31.  		rt2800_config_channel_rf3322(rt2x00dev, conf, rf, info);
    32. 

  32.  		break;
    33. 

  33. +	case RF5350:
    34. 

  34.  	case RF5360:
    35. 

  35.  	case RF5370:
    36. 

  36.  	case RF5372:
    37. 

  37. @@ -2614,6 +2624,7 @@ static void rt2800_config_channel(struct
    38. 

  38.  
    39. 

  39.  	if (rt2x00_rf(rt2x00dev, RF3290) ||
    40. 

  40.  	    rt2x00_rf(rt2x00dev, RF3322) ||
    41. 

  41. +	    rt2x00_rf(rt2x00dev, RF5350) ||
    42. 

  42.  	    rt2x00_rf(rt2x00dev, RF5360) ||
    43. 

  43.  	    rt2x00_rf(rt2x00dev, RF5370) ||
    44. 

  44.  	    rt2x00_rf(rt2x00dev, RF5372) ||
    45. 

  45. @@ -2778,7 +2789,8 @@ static void rt2800_config_channel(struct
    46. 

  46.  	/*
    47. 

  47.  	 * Clear update flag
    48. 

  48.  	 */
    49. 

  49. -	if (rt2x00_rt(rt2x00dev, RT3352)) {
    50. 

  50. +	if (rt2x00_rt(rt2x00dev, RT3352) ||
    51. 

  51. +	    rt2x00_rt(rt2x00dev, RT5350)) {
    52. 

  52.  		rt2800_bbp_read(rt2x00dev, 49, &bbp);
    53. 

  53.  		rt2x00_set_field8(&bbp, BBP49_UPDATE_FLAG, 0);
    54. 

  54.  		rt2800_bbp_write(rt2x00dev, 49, bbp);
    55. 

  55. @@ -3224,6 +3236,7 @@ void rt2800_vco_calibration(struct rt2x0
    56. 

  56.  		rt2800_rfcsr_write(rt2x00dev, 7, rfcsr);
    57. 

  57.  		break;
    58. 

  58.  	case RF3290:
    59. 

  59. +	case RF5350:
    60. 

  60.  	case RF5360:
    61. 

  61.  	case RF5370:
    62. 

  62.  	case RF5372:
    63. 

  63. @@ -3563,7 +3576,8 @@ static int rt2800_init_registers(struct 
    64. 

  64.  	} else if (rt2x00_rt(rt2x00dev, RT3572)) {
    65. 

  65.  		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
    66. 

  66.  		rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
    67. 

  67. -	} else if (rt2x00_rt(rt2x00dev, RT5390) ||
    68. 

  68. +	} else if (rt2x00_rt(rt2x00dev, RT5350) ||
    69. 

  69. +		   rt2x00_rt(rt2x00dev, RT5390) ||
    70. 

  70.  		   rt2x00_rt(rt2x00dev, RT5392) ||
    71. 

  71.  		   rt2x00_rt(rt2x00dev, RT5592)) {
    72. 

  72.  		rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
    73. 

  73. @@ -4216,9 +4230,13 @@ static void rt2800_init_bbp_3352(struct 
    74. 

  74.  
    75. 

  75.  	rt2800_bbp_write(rt2x00dev, 82, 0x62);
    76. 

  76.  
    77. 

  77. -	rt2800_bbp_write(rt2x00dev, 83, 0x6a);
    78. 

  78. -
    79. 

  79. -	rt2800_bbp_write(rt2x00dev, 84, 0x99);
    80. 

  80. +	if (rt2x00_rt(rt2x00dev, RT5350)) {
    81. 

  81. +		rt2800_bbp_write(rt2x00dev, 83, 0x7a);
    82. 

  82. +		rt2800_bbp_write(rt2x00dev, 84, 0x9a);
    83. 

  83. +	} else {
    84. 

  84. +		rt2800_bbp_write(rt2x00dev, 83, 0x6a);
    85. 

  85. +		rt2800_bbp_write(rt2x00dev, 84, 0x99);
    86. 

  86. +	}
    87. 

  87.  
    88. 

  88.  	rt2800_bbp_write(rt2x00dev, 86, 0x38);
    89. 

  89.  
    90. 

  90. @@ -4232,9 +4250,13 @@ static void rt2800_init_bbp_3352(struct 
    91. 

  91.  
    92. 

  92.  	rt2800_bbp_write(rt2x00dev, 104, 0x92);
    93. 

  93.  
    94. 

  94. -	rt2800_bbp_write(rt2x00dev, 105, 0x34);
    95. 

  95. -
    96. 

  96. -	rt2800_bbp_write(rt2x00dev, 106, 0x05);
    97. 

  97. +	if (rt2x00_rt(rt2x00dev, RT5350)) {
    98. 

  98. +		rt2800_bbp_write(rt2x00dev, 105, 0x3c);
    99. 

  99. +		rt2800_bbp_write(rt2x00dev, 106, 0x03);
    100. 

  100. +	} else {
    101. 

  101. +		rt2800_bbp_write(rt2x00dev, 105, 0x34);
    102. 

  102. +		rt2800_bbp_write(rt2x00dev, 106, 0x05);
    103. 

  103. +	}
    104. 

  104.  
    105. 

  105.  	rt2800_bbp_write(rt2x00dev, 120, 0x50);
    106. 

  106.  
    107. 

  107. @@ -4259,6 +4281,13 @@ static void rt2800_init_bbp_3352(struct 
    108. 

  108.  	rt2800_bbp_write(rt2x00dev, 143, 0xa2);
    109. 

  109.  
    110. 

  110.  	rt2800_bbp_write(rt2x00dev, 148, 0xc8);
    111. 

  111. +
    112. 

  112. +	if (rt2x00_rt(rt2x00dev, RT5350)) {
    113. 

  113. +		rt2800_bbp_write(rt2x00dev, 150, 0x40); /* Antenna Software OFDM */
    114. 

  114. +		rt2800_bbp_write(rt2x00dev, 151, 0x30); /* Antenna Software CCK */
    115. 

  115. +		rt2800_bbp_write(rt2x00dev, 152, 0xa3);
    116. 

  116. +		rt2800_bbp_write(rt2x00dev, 154, 0); /* Clear previously selected antenna */
    117. 

  117. +	}
    118. 

  118.  }
    119. 

  119.  
    120. 

  120.  static void rt2800_init_bbp_3390(struct rt2x00_dev *rt2x00dev)
    121. 

  121. @@ -4543,6 +4572,7 @@ static void rt2800_init_bbp(struct rt2x0
    122. 

  122.  		rt2800_init_bbp_3290(rt2x00dev);
    123. 

  123.  		break;
    124. 

  124.  	case RT3352:
    125. 

  125. +	case RT5350:
    126. 

  126.  		rt2800_init_bbp_3352(rt2x00dev);
    127. 

  127.  		break;
    128. 

  128.  	case RT3390:
    129. 

  129. @@ -5182,6 +5212,76 @@ static void rt2800_init_rfcsr_3572(struc
    130. 

  130.  	rt2800_normal_mode_setup_3xxx(rt2x00dev);
    131. 

  131.  }
    132. 

  132.  
    133. 

  133. +static void rt2800_init_rfcsr_5350(struct rt2x00_dev *rt2x00dev)
    134. 

  134. +{
    135. 

  135. +	rt2800_rfcsr_write(rt2x00dev, 0, 0xf0);
    136. 

  136. +	rt2800_rfcsr_write(rt2x00dev, 1, 0x23);
    137. 

  137. +	rt2800_rfcsr_write(rt2x00dev, 2, 0x50);
    138. 

  138. +	rt2800_rfcsr_write(rt2x00dev, 3, 0x08);
    139. 

  139. +	rt2800_rfcsr_write(rt2x00dev, 4, 0x49);
    140. 

  140. +	rt2800_rfcsr_write(rt2x00dev, 5, 0x10);
    141. 

  141. +	rt2800_rfcsr_write(rt2x00dev, 6, 0xe0);
    142. 

  142. +	rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
    143. 

  143. +	rt2800_rfcsr_write(rt2x00dev, 8, 0xf1);
    144. 

  144. +	rt2800_rfcsr_write(rt2x00dev, 9, 0x02);
    145. 

  145. +	rt2800_rfcsr_write(rt2x00dev, 10, 0x53);
    146. 

  146. +	rt2800_rfcsr_write(rt2x00dev, 11, 0x4a);
    147. 

  147. +	rt2800_rfcsr_write(rt2x00dev, 12, 0x46);
    148. 

  148. +	if(rt2x00dev->spec.clk_is_20mhz)
    149. 

  149. +		rt2800_rfcsr_write(rt2x00dev, 13, 0x1f);
    150. 

  150. +	else
    151. 

  151. +		rt2800_rfcsr_write(rt2x00dev, 13, 0x9f);
    152. 

  152. +	rt2800_rfcsr_write(rt2x00dev, 14, 0x00);
    153. 

  153. +	rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
    154. 

  154. +	rt2800_rfcsr_write(rt2x00dev, 16, 0xc0);
    155. 

  155. +	rt2800_rfcsr_write(rt2x00dev, 18, 0x03);
    156. 

  156. +	rt2800_rfcsr_write(rt2x00dev, 19, 0x00);
    157. 

  157. +	rt2800_rfcsr_write(rt2x00dev, 20, 0x00);
    158. 

  158. +	rt2800_rfcsr_write(rt2x00dev, 21, 0x00);
    159. 

  159. +	rt2800_rfcsr_write(rt2x00dev, 22, 0x20);
    160. 

  160. +	rt2800_rfcsr_write(rt2x00dev, 23, 0x00);
    161. 

  161. +	rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
    162. 

  162. +	rt2800_rfcsr_write(rt2x00dev, 25, 0x80);
    163. 

  163. +	rt2800_rfcsr_write(rt2x00dev, 26, 0x00);
    164. 

  164. +	rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
    165. 

  165. +	rt2800_rfcsr_write(rt2x00dev, 28, 0x00);
    166. 

  166. +	rt2800_rfcsr_write(rt2x00dev, 29, 0xd0);
    167. 

  167. +	rt2800_rfcsr_write(rt2x00dev, 30, 0x10);
    168. 

  168. +	rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
    169. 

  169. +	rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
    170. 

  170. +	rt2800_rfcsr_write(rt2x00dev, 33, 0x00);
    171. 

  171. +	rt2800_rfcsr_write(rt2x00dev, 34, 0x07);
    172. 

  172. +	rt2800_rfcsr_write(rt2x00dev, 35, 0x12);
    173. 

  173. +	rt2800_rfcsr_write(rt2x00dev, 36, 0x00);
    174. 

  174. +	rt2800_rfcsr_write(rt2x00dev, 37, 0x08);
    175. 

  175. +	rt2800_rfcsr_write(rt2x00dev, 38, 0x85);
    176. 

  176. +	rt2800_rfcsr_write(rt2x00dev, 39, 0x1b);
    177. 

  177. +	rt2800_rfcsr_write(rt2x00dev, 40, 0x0b);
    178. 

  178. +	rt2800_rfcsr_write(rt2x00dev, 41, 0xbb);
    179. 

  179. +	rt2800_rfcsr_write(rt2x00dev, 42, 0xd5);
    180. 

  180. +	rt2800_rfcsr_write(rt2x00dev, 43, 0x9b);
    181. 

  181. +	rt2800_rfcsr_write(rt2x00dev, 44, 0x0c);
    182. 

  182. +	rt2800_rfcsr_write(rt2x00dev, 45, 0xa6);
    183. 

  183. +	rt2800_rfcsr_write(rt2x00dev, 46, 0x73);
    184. 

  184. +	rt2800_rfcsr_write(rt2x00dev, 47, 0x00);
    185. 

  185. +	rt2800_rfcsr_write(rt2x00dev, 48, 0x10);
    186. 

  186. +	rt2800_rfcsr_write(rt2x00dev, 49, 0x80);
    187. 

  187. +	rt2800_rfcsr_write(rt2x00dev, 50, 0x00);
    188. 

  188. +	rt2800_rfcsr_write(rt2x00dev, 51, 0x00);
    189. 

  189. +	rt2800_rfcsr_write(rt2x00dev, 52, 0x38);
    190. 

  190. +	rt2800_rfcsr_write(rt2x00dev, 53, 0x00);
    191. 

  191. +	rt2800_rfcsr_write(rt2x00dev, 54, 0x38);
    192. 

  192. +	rt2800_rfcsr_write(rt2x00dev, 55, 0x43);
    193. 

  193. +	rt2800_rfcsr_write(rt2x00dev, 56, 0x82);
    194. 

  194. +	rt2800_rfcsr_write(rt2x00dev, 57, 0x00);
    195. 

  195. +	rt2800_rfcsr_write(rt2x00dev, 58, 0x39);
    196. 

  196. +	rt2800_rfcsr_write(rt2x00dev, 59, 0x0b);
    197. 

  197. +	rt2800_rfcsr_write(rt2x00dev, 60, 0x45);
    198. 

  198. +	rt2800_rfcsr_write(rt2x00dev, 61, 0xd1);
    199. 

  199. +	rt2800_rfcsr_write(rt2x00dev, 62, 0x00);
    200. 

  200. +	rt2800_rfcsr_write(rt2x00dev, 63, 0x00);
    201. 

  201. +}
    202. 

  202. +
    203. 

  203.  static void rt2800_init_rfcsr_5390(struct rt2x00_dev *rt2x00dev)
    204. 

  204.  {
    205. 

  205.  	rt2800_rf_init_calibration(rt2x00dev, 2);
    206. 

  206. @@ -5410,6 +5510,9 @@ static void rt2800_init_rfcsr(struct rt2
    207. 

  207.  	case RT3572:
    208. 

  208.  		rt2800_init_rfcsr_3572(rt2x00dev);
    209. 

  209.  		break;
    210. 

  210. +	case RT5350:
    211. 

  211. +		rt2800_init_rfcsr_5350(rt2x00dev);
    212. 

  212. +		break;
    213. 

  213.  	case RT5390:
    214. 

  214.  		rt2800_init_rfcsr_5390(rt2x00dev);
    215. 

  215.  		break;
    216. 

  216. @@ -5621,6 +5724,12 @@ static int rt2800_validate_eeprom(struct
    217. 

  217.  		rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RF_TYPE, RF2820);
    218. 

  218.  		rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC_CONF0, word);
    219. 

  219.  		rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
    220. 

  220. +	} else if (rt2x00_rt(rt2x00dev, RT5350)) {
    221. 

  221. +		rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RXPATH, 1);
    222. 

  222. +		rt2x00_set_field16(&word, EEPROM_NIC_CONF0_TXPATH, 1);
    223. 

  223. +		rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RF_TYPE, RF3320);
    224. 

  224. +		rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC_CONF0, word);
    225. 

  225. +		rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
    226. 

  226.  	} else if (rt2x00_rt(rt2x00dev, RT2860) ||
    227. 

  227.  		   rt2x00_rt(rt2x00dev, RT2872)) {
    228. 

  228.  		/*
    229. 

  229. @@ -5746,9 +5855,12 @@ static int rt2800_init_eeprom(struct rt2
    230. 

  230.  	 */
    231. 

  231.  	if (rt2x00_rt(rt2x00dev, RT3290) ||
    232. 

  232.  	    rt2x00_rt(rt2x00dev, RT3352) ||
    233. 

  233. +	    rt2x00_rt(rt2x00dev, RT5350) ||
    234. 

  234.  	    rt2x00_rt(rt2x00dev, RT5390) ||
    235. 

  235.  	    rt2x00_rt(rt2x00dev, RT5392))
    236. 

  236.  		rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &rf);
    237. 

  237. +	else if (rt2x00_rt(rt2x00dev, RT5350))
    238. 

  238. +		rf = RF5350;
    239. 

  239.  	else
    240. 

  240.  		rf = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE);
    241. 

  241.  
    242. 

  242. @@ -5765,6 +5877,7 @@ static int rt2800_init_eeprom(struct rt2
    243. 

  243.  	case RF3290:
    244. 

  244.  	case RF3320:
    245. 

  245.  	case RF3322:
    246. 

  246. +	case RF5350:
    247. 

  247.  	case RF5360:
    248. 

  248.  	case RF5370:
    249. 

  249.  	case RF5372:
    250. 

  250. @@ -6263,7 +6376,8 @@ static int rt2800_probe_hw_mode(struct r
    251. 

  251.  		   rt2x00_rf(rt2x00dev, RF5392)) {
    252. 

  252.  		spec->num_channels = 14;
    253. 

  253.  		spec->channels = rf_vals_3x;
    254. 

  254. -	} else if (rt2x00_rf(rt2x00dev, RF3322)) {
    255. 

  255. +	} else if (rt2x00_rf(rt2x00dev, RF3322) ||
    256. 

  256. +		   rt2x00_rf(rt2x00dev, RF5350)) {
    257. 

  257.  		spec->num_channels = 14;
    258. 

  258.  		if (spec->clk_is_20mhz)
    259. 

  259.  			spec->channels = rf_vals_xtal20mhz_3x;
    260. 

  260. @@ -6364,6 +6478,7 @@ static int rt2800_probe_hw_mode(struct r
    261. 

  261.  	case RF3320:
    262. 

  262.  	case RF3052:
    263. 

  263.  	case RF3290:
    264. 

  264. +	case RF5350:
    265. 

  265.  	case RF5360:
    266. 

  266.  	case RF5370:
    267. 

  267.  	case RF5372:
    268. 

  268. @@ -6401,6 +6516,7 @@ static int rt2800_probe_rt(struct rt2x00
    269. 

  269.  	case RT3352:
    270. 

  270.  	case RT3390:
    271. 

  271.  	case RT3572:
    272. 

  272. +	case RT5350:
    273. 

  273.  	case RT5390:
    274. 

  274.  	case RT5392:
    275. 

  275.  	case RT5592:
    276. 

  276. --- a/drivers/net/wireless/rt2x00/rt2x00.h
    277. 

  277. +++ b/drivers/net/wireless/rt2x00/rt2x00.h
    278. 

  278. @@ -181,6 +181,7 @@ struct rt2x00_chip {
    279. 

  279.  #define RT3572		0x3572
    280. 

  280.  #define RT3593		0x3593
    281. 

  281.  #define RT3883		0x3883	/* WSOC */
    282. 

  282. +#define RT5350		0x5350  /* WSOC 2.4GHz */
    283. 

  283.  #define RT5390		0x5390  /* 2.4GHz */
    284. 

  284.  #define RT5392		0x5392  /* 2.4GHz */
    285. 

  285.  #define RT5592		0x5592
    286.