0019-v5.6-mtd-spi-nor-Add-support-for-mx25r3235f.patch 1.3 KB

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  1. From 707745e8d4e75b638b990d67950ab292b3b8ea2a Mon Sep 17 00:00:00 2001
  2. From: David Bauer <[email protected]>
  3. Date: Mon, 16 Dec 2019 01:36:46 +0100
  4. Subject: [PATCH] mtd: spi-nor: Add support for mx25r3235f
  5. Add MTD support for the Macronix MX25R3235F SPI NOR chip from Macronix.
  6. The chip has 4MB of total capacity, divided into a total of 64 sectors,
  7. each 64KB sized. The chip also supports 4KB large sectors.
  8. Additionally, it supports dual and quad read modes.
  9. Functionality was verified on an HPE/Aruba AP-303 board.
  10. Signed-off-by: David Bauer <[email protected]>
  11. Signed-off-by: Tudor Ambarus <[email protected]>
  12. ---
  13. drivers/mtd/spi-nor/spi-nor.c | 2 ++
  14. 1 file changed, 2 insertions(+)
  15. --- a/drivers/mtd/spi-nor/spi-nor.c
  16. +++ b/drivers/mtd/spi-nor/spi-nor.c
  17. @@ -2354,6 +2354,8 @@ static const struct flash_info spi_nor_i
  18. { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
  19. { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
  20. { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
  21. + { "mx25r3235f", INFO(0xc22816, 0, 64 * 1024, 64,
  22. + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
  23. { "mx25u12835f", INFO(0xc22538, 0, 64 * 1024, 256,
  24. SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
  25. { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512,