0004-MIPS-lantiq-falcon-add-cpu-feature-override.h.patch 2.5 KB

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  1. From e451973421b255917496c8ef784f8a5c92bb5548 Mon Sep 17 00:00:00 2001
  2. From: Thomas Langer <[email protected]>
  3. Date: Thu, 8 Aug 2013 11:07:25 +0200
  4. Subject: [PATCH 04/34] MIPS: lantiq: falcon: add cpu-feature-override.h
  5. Add cpu-feature-override.h for the GPON SoC
  6. Signed-off-by: Thomas Langer <[email protected]>
  7. Acked-by: John Crispin <[email protected]>
  8. Acked-by: John Crispin <[email protected]>
  9. Patchwork: http://patchwork.linux-mips.org/patch/5658/
  10. ---
  11. .../asm/mach-lantiq/falcon/cpu-feature-overrides.h | 58 ++++++++++++++++++++
  12. 1 file changed, 58 insertions(+)
  13. create mode 100644 arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h
  14. diff --git a/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h
  15. new file mode 100644
  16. index 0000000..096a100
  17. --- /dev/null
  18. +++ b/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h
  19. @@ -0,0 +1,58 @@
  20. +/*
  21. + * Lantiq FALCON specific CPU feature overrides
  22. + *
  23. + * Copyright (C) 2013 Thomas Langer, Lantiq Deutschland
  24. + *
  25. + * This file was derived from: include/asm-mips/cpu-features.h
  26. + * Copyright (C) 2003, 2004 Ralf Baechle
  27. + * Copyright (C) 2004 Maciej W. Rozycki
  28. + *
  29. + * This program is free software; you can redistribute it and/or modify it
  30. + * under the terms of the GNU General Public License version 2 as published
  31. + * by the Free Software Foundation.
  32. + *
  33. + */
  34. +#ifndef __ASM_MACH_FALCON_CPU_FEATURE_OVERRIDES_H
  35. +#define __ASM_MACH_FALCON_CPU_FEATURE_OVERRIDES_H
  36. +
  37. +#define cpu_has_tlb 1
  38. +#define cpu_has_4kex 1
  39. +#define cpu_has_3k_cache 0
  40. +#define cpu_has_4k_cache 1
  41. +#define cpu_has_tx39_cache 0
  42. +#define cpu_has_sb1_cache 0
  43. +#define cpu_has_fpu 0
  44. +#define cpu_has_32fpr 0
  45. +#define cpu_has_counter 1
  46. +#define cpu_has_watch 1
  47. +#define cpu_has_divec 1
  48. +
  49. +#define cpu_has_prefetch 1
  50. +#define cpu_has_ejtag 1
  51. +#define cpu_has_llsc 1
  52. +
  53. +#define cpu_has_mips16 1
  54. +#define cpu_has_mdmx 0
  55. +#define cpu_has_mips3d 0
  56. +#define cpu_has_smartmips 0
  57. +
  58. +#define cpu_has_mips32r1 1
  59. +#define cpu_has_mips32r2 1
  60. +#define cpu_has_mips64r1 0
  61. +#define cpu_has_mips64r2 0
  62. +
  63. +#define cpu_has_dsp 1
  64. +#define cpu_has_mipsmt 1
  65. +
  66. +#define cpu_has_vint 1
  67. +#define cpu_has_veic 1
  68. +
  69. +#define cpu_has_64bits 0
  70. +#define cpu_has_64bit_zero_reg 0
  71. +#define cpu_has_64bit_gp_regs 0
  72. +#define cpu_has_64bit_addresses 0
  73. +
  74. +#define cpu_dcache_line_size() 32
  75. +#define cpu_icache_line_size() 32
  76. +
  77. +#endif /* __ASM_MACH_FALCON_CPU_FEATURE_OVERRIDES_H */
  78. --
  79. 1.7.10.4