bcm6318-comtrend-ar-5315u.dts 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. #include "bcm6318.dtsi"
  3. / {
  4. model = "Comtrend AR-5315u";
  5. compatible = "comtrend,ar-5315u", "brcm,bcm6318";
  6. aliases {
  7. led-boot = &led_power_green;
  8. led-failsafe = &led_power_red;
  9. led-running = &led_power_green;
  10. led-upgrade = &led_power_green;
  11. };
  12. keys {
  13. compatible = "gpio-keys-polled";
  14. poll-interval = <100>;
  15. wps {
  16. label = "wps";
  17. gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
  18. linux,code = <KEY_WPS_BUTTON>;
  19. debounce-interval = <60>;
  20. };
  21. reset {
  22. label = "reset";
  23. gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
  24. linux,code = <KEY_RESTART>;
  25. debounce-interval = <60>;
  26. };
  27. };
  28. bcm43217-sprom {
  29. compatible = "brcm,bcma-sprom";
  30. pci-bus = <1>;
  31. pci-dev = <0>;
  32. nvmem-cells = <&macaddr_cfe_6a0 1>;
  33. nvmem-cell-names = "mac-address";
  34. brcm,sprom = "brcm/bcm43217-sprom.bin";
  35. brcm,sprom-fixups = <6 0x1c00>,
  36. <65 0x1255>,
  37. <97 0xfe55>,
  38. <98 0x171d>,
  39. <99 0xfa42>,
  40. <113 0xfeb7>,
  41. <114 0x18cd>,
  42. <115 0xfa4f>,
  43. <162 0x6444>,
  44. <170 0x6444>,
  45. <172 0x6444>;
  46. };
  47. };
  48. &ehci {
  49. status = "okay";
  50. };
  51. &ethernet {
  52. status = "okay";
  53. nvmem-cells = <&macaddr_cfe_6a0 0>;
  54. nvmem-cell-names = "mac-address";
  55. };
  56. &hsspi {
  57. status = "okay";
  58. flash@0 {
  59. compatible = "jedec,spi-nor";
  60. spi-max-frequency = <62500000>;
  61. spi-tx-bus-width = <2>;
  62. spi-rx-bus-width = <2>;
  63. reg = <0>;
  64. #address-cells = <1>;
  65. #size-cells = <1>;
  66. partitions {
  67. compatible = "fixed-partitions";
  68. #address-cells = <1>;
  69. #size-cells = <1>;
  70. partition@0 {
  71. reg = <0x000000 0x010000>;
  72. label = "cfe";
  73. read-only;
  74. nvmem-layout {
  75. compatible = "fixed-layout";
  76. #address-cells = <1>;
  77. #size-cells = <1>;
  78. macaddr_cfe_6a0: macaddr@6a0 {
  79. compatible = "mac-base";
  80. reg = <0x6a0 0x6>;
  81. #nvmem-cell-cells = <1>;
  82. };
  83. };
  84. };
  85. partition@10000 {
  86. compatible = "brcm,bcm963xx-imagetag";
  87. reg = <0x010000 0xfe0000>;
  88. label = "firmware";
  89. };
  90. partition@ff0000 {
  91. reg = <0xff0000 0x010000>;
  92. label = "nvram";
  93. };
  94. };
  95. };
  96. };
  97. &leds {
  98. status = "okay";
  99. pinctrl-names = "default";
  100. pinctrl-0 = <&pinctrl_leds
  101. &pinctrl_ephy0_act_led &pinctrl_ephy1_act_led
  102. &pinctrl_ephy2_act_led &pinctrl_ephy3_act_led>;
  103. led@0 {
  104. reg = <0>;
  105. active-low;
  106. function = LED_FUNCTION_WPS;
  107. color = <LED_COLOR_ID_GREEN>;
  108. };
  109. led_power_green: led@1 {
  110. reg = <1>;
  111. active-low;
  112. function = LED_FUNCTION_POWER;
  113. color = <LED_COLOR_ID_GREEN>;
  114. };
  115. led@2 {
  116. reg = <2>;
  117. active-low;
  118. function = LED_FUNCTION_USB;
  119. color = <LED_COLOR_ID_GREEN>;
  120. };
  121. led@4 {
  122. /* EPHY0 Act */
  123. reg = <4>;
  124. brcm,hardware-controlled;
  125. brcm,link-signal-sources = <4>;
  126. };
  127. led@5 {
  128. /* EPHY1 Act */
  129. reg = <5>;
  130. brcm,hardware-controlled;
  131. brcm,link-signal-sources = <5>;
  132. };
  133. led@6 {
  134. /* EPHY2 Act */
  135. reg = <6>;
  136. brcm,hardware-controlled;
  137. brcm,link-signal-sources = <6>;
  138. };
  139. led@7 {
  140. /* EPHY3 Act */
  141. reg = <7>;
  142. brcm,hardware-controlled;
  143. brcm,link-signal-sources = <7>;
  144. };
  145. led@8 {
  146. reg = <8>;
  147. active-low;
  148. label = "green:internet";
  149. };
  150. led@9 {
  151. reg = <9>;
  152. active-low;
  153. label = "red:internet";
  154. };
  155. led@10 {
  156. reg = <10>;
  157. active-low;
  158. label = "green:dsl";
  159. };
  160. led_power_red: led@11 {
  161. reg = <11>;
  162. active-low;
  163. function = LED_FUNCTION_POWER;
  164. color = <LED_COLOR_ID_RED>;
  165. panic-indicator;
  166. };
  167. };
  168. &ohci {
  169. status = "okay";
  170. };
  171. &pcie {
  172. status = "okay";
  173. };
  174. &pinctrl {
  175. pinctrl_leds: leds {
  176. function = "led";
  177. pins = "gpio0", "gpio1",
  178. "gpio2", "gpio8",
  179. "gpio9", "gpio10",
  180. "gpio11";
  181. };
  182. };
  183. &switch0 {
  184. ports {
  185. port@0 {
  186. reg = <0>;
  187. label = "lan4";
  188. phy-handle = <&phy1>;
  189. phy-mode = "mii";
  190. };
  191. port@1 {
  192. reg = <1>;
  193. label = "lan3";
  194. phy-handle = <&phy2>;
  195. phy-mode = "mii";
  196. };
  197. port@2 {
  198. reg = <2>;
  199. label = "lan2";
  200. phy-handle = <&phy3>;
  201. phy-mode = "mii";
  202. };
  203. port@3 {
  204. reg = <3>;
  205. label = "lan1";
  206. phy-handle = <&phy4>;
  207. phy-mode = "mii";
  208. };
  209. };
  210. };
  211. &uart0 {
  212. status = "okay";
  213. };
  214. &usbh {
  215. status = "okay";
  216. };