bcm6358.dtsi 8.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /dts-v1/;
  3. #include <dt-bindings/clock/bcm6358-clock.h>
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6. #include <dt-bindings/interrupt-controller/bcm6358-interrupt-controller.h>
  7. #include <dt-bindings/interrupt-controller/irq.h>
  8. #include <dt-bindings/leds/common.h>
  9. #include <dt-bindings/reset/bcm6358-reset.h>
  10. / {
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. compatible = "brcm,bcm6358";
  14. aliases {
  15. pflash = &pflash;
  16. pinctrl = &pinctrl;
  17. serial0 = &uart0;
  18. serial1 = &uart1;
  19. spi0 = &lsspi;
  20. };
  21. chosen {
  22. bootargs = "earlycon";
  23. stdout-path = "serial0:115200n8";
  24. };
  25. clocks {
  26. periph_osc: periph-osc {
  27. compatible = "fixed-clock";
  28. #clock-cells = <0>;
  29. clock-frequency = <50000000>;
  30. clock-output-names = "periph";
  31. };
  32. };
  33. cpus {
  34. #address-cells = <1>;
  35. #size-cells = <0>;
  36. mips-hpt-frequency = <150000000>;
  37. cpu@0 {
  38. compatible = "brcm,bmips4350", "mips,mips4Kc";
  39. device_type = "cpu";
  40. reg = <0>;
  41. };
  42. cpu@1 {
  43. compatible = "brcm,bmips4350", "mips,mips4Kc";
  44. device_type = "cpu";
  45. reg = <1>;
  46. };
  47. };
  48. cpu_intc: interrupt-controller {
  49. #address-cells = <0>;
  50. compatible = "mti,cpu-interrupt-controller";
  51. interrupt-controller;
  52. #interrupt-cells = <1>;
  53. };
  54. memory@0 {
  55. device_type = "memory";
  56. reg = <0 0>;
  57. };
  58. pflash: nor@1e000000 {
  59. #address-cells = <1>;
  60. #size-cells = <1>;
  61. compatible = "cfi-flash";
  62. reg = <0x1e000000 0x2000000>;
  63. bank-width = <2>;
  64. status = "disabled";
  65. };
  66. ubus {
  67. #address-cells = <1>;
  68. #size-cells = <1>;
  69. compatible = "simple-bus";
  70. ranges;
  71. periph_clk: clock-controller@fffe0004 {
  72. compatible = "brcm,bcm6358-clocks";
  73. reg = <0xfffe0004 0x4>;
  74. #clock-cells = <1>;
  75. };
  76. pll_cntl: syscon@fffe0008 {
  77. compatible = "syscon", "simple-mfd";
  78. reg = <0xfffe0008 0x4>;
  79. native-endian;
  80. syscon-reboot {
  81. compatible = "syscon-reboot";
  82. offset = <0x0>;
  83. mask = <0x1>;
  84. };
  85. };
  86. periph_intc: interrupt-controller@fffe000c {
  87. #address-cells = <1>;
  88. compatible = "brcm,bcm6345-l1-intc";
  89. reg = <0xfffe000c 0x8>,
  90. <0xfffe0038 0x8>;
  91. interrupt-controller;
  92. #interrupt-cells = <1>;
  93. interrupt-parent = <&cpu_intc>;
  94. interrupts = <2>, <3>;
  95. };
  96. ext_intc0: interrupt-controller@fffe0014 {
  97. #address-cells = <1>;
  98. compatible = "brcm,bcm6345-ext-intc";
  99. reg = <0xfffe0014 0x4>;
  100. interrupt-controller;
  101. #interrupt-cells = <2>;
  102. interrupt-parent = <&periph_intc>;
  103. interrupts = <BCM6358_IRQ_EXT0>,
  104. <BCM6358_IRQ_EXT1>,
  105. <BCM6358_IRQ_EXT2>,
  106. <BCM6358_IRQ_EXT3>;
  107. };
  108. ext_intc1: interrupt-controller@fffe001c {
  109. #address-cells = <1>;
  110. compatible = "brcm,bcm6345-ext-intc";
  111. reg = <0xfffe001c 0x4>;
  112. interrupt-controller;
  113. #interrupt-cells = <2>;
  114. interrupt-parent = <&periph_intc>;
  115. interrupts = <BCM6358_IRQ_EXT4>,
  116. <BCM6358_IRQ_EXT5>;
  117. };
  118. periph_rst: reset-controller@fffe0034 {
  119. compatible = "brcm,bcm6345-reset";
  120. reg = <0xfffe0034 0x4>;
  121. #reset-cells = <1>;
  122. };
  123. wdt: watchdog@fffe005c {
  124. compatible = "brcm,bcm7038-wdt";
  125. reg = <0xfffe005c 0xc>;
  126. clocks = <&periph_osc>;
  127. timeout-sec = <30>;
  128. };
  129. gpio_cntl: syscon@fffe0080 {
  130. #address-cells = <1>;
  131. #size-cells = <1>;
  132. compatible = "brcm,bcm6358-gpio-sysctl",
  133. "syscon", "simple-mfd";
  134. reg = <0xfffe0080 0x50>;
  135. ranges = <0 0xfffe0080 0x80>;
  136. native-endian;
  137. gpio: gpio@0 {
  138. compatible = "brcm,bcm6358-gpio";
  139. reg-names = "dirout", "dat";
  140. reg = <0x0 0x8>, <0x8 0x8>;
  141. gpio-controller;
  142. gpio-ranges = <&pinctrl 0 0 40>;
  143. #gpio-cells = <2>;
  144. };
  145. pinctrl: pinctrl@18 {
  146. compatible = "brcm,bcm6358-pinctrl";
  147. reg = <0x18 0x4>;
  148. pinctrl_ebi_cs: ebi_cs-pins {
  149. function = "ebi_cs";
  150. groups = "ebi_cs_grp";
  151. };
  152. pinctrl_uart1: uart1-pins {
  153. function = "uart1";
  154. groups = "uart1_grp";
  155. };
  156. pinctrl_serial_led: serial_led-pins {
  157. function = "serial_led";
  158. groups = "serial_led_grp";
  159. };
  160. pinctrl_legacy_led: legacy_led-pins {
  161. function = "legacy_led";
  162. groups = "legacy_led_grp";
  163. };
  164. pinctrl_led: led-pins {
  165. function = "led";
  166. groups = "led_grp";
  167. };
  168. pinctrl_spi_cs_23: spi_cs-pins {
  169. function = "spi_cs";
  170. groups = "spi_cs_grp";
  171. };
  172. pinctrl_utopia: utopia-pins {
  173. function = "utopia";
  174. groups = "utopia_grp";
  175. };
  176. pinctrl_pwm_syn_clk: pwm_syn_clk-pins {
  177. function = "pwm_syn_clk";
  178. groups = "pwm_syn_clk_grp";
  179. };
  180. pinctrl_sys_irq: sys_irq-pins {
  181. function = "sys_irq";
  182. groups = "sys_irq_grp";
  183. };
  184. };
  185. };
  186. leds: led-controller@fffe00d0 {
  187. #address-cells = <1>;
  188. #size-cells = <0>;
  189. compatible = "brcm,bcm6358-leds";
  190. reg = <0xfffe00d0 0x8>;
  191. status = "disabled";
  192. };
  193. uart0: serial@fffe0100 {
  194. compatible = "brcm,bcm6345-uart";
  195. reg = <0xfffe0100 0x18>;
  196. interrupt-parent = <&periph_intc>;
  197. interrupts = <BCM6358_IRQ_UART0>;
  198. clocks = <&periph_osc>;
  199. clock-names = "periph";
  200. status = "disabled";
  201. };
  202. uart1: serial@fffe0120 {
  203. compatible = "brcm,bcm6345-uart";
  204. reg = <0xfffe0120 0x18>;
  205. interrupt-parent = <&periph_intc>;
  206. interrupts = <BCM6358_IRQ_UART1>;
  207. clocks = <&periph_osc>;
  208. clock-names = "periph";
  209. status = "disabled";
  210. };
  211. lsspi: spi@fffe0800 {
  212. #address-cells = <1>;
  213. #size-cells = <0>;
  214. compatible = "brcm,bcm6358-spi";
  215. reg = <0xfffe0800 0x70c>;
  216. interrupt-parent = <&periph_intc>;
  217. interrupts = <BCM6358_IRQ_SPI>;
  218. clocks = <&periph_clk BCM6358_CLK_SPI>;
  219. clock-names = "spi";
  220. resets = <&periph_rst BCM6358_RST_SPI>;
  221. status = "disabled";
  222. };
  223. pci: pci@fffe1000 {
  224. compatible = "brcm,bcm6348-pci";
  225. reg = <0xfffe1000 0x200>;
  226. #address-cells = <3>;
  227. #size-cells = <2>;
  228. device_type = "pci";
  229. bus-range = <0x00 0x01>;
  230. ranges = <0x2000000 0 0x30000000 0x30000000 0 0x8000000>,
  231. <0x1000000 0 0x08000000 0x08000000 0 0x0010000>;
  232. linux,pci-probe-only = <1>;
  233. interrupt-parent = <&periph_intc>;
  234. interrupts = <BCM6358_IRQ_MPI>;
  235. resets = <&periph_rst BCM6358_RST_MPI>;
  236. reset-names = "pci";
  237. brcm,remap;
  238. status = "disabled";
  239. };
  240. ehci: usb@fffe1300 {
  241. compatible = "brcm,bcm6358-ehci", "generic-ehci";
  242. reg = <0xfffe1300 0x100>;
  243. big-endian;
  244. spurious-oc;
  245. interrupt-parent = <&periph_intc>;
  246. interrupts = <BCM6358_IRQ_EHCI>;
  247. phys = <&usbh 0>;
  248. phy-names = "usb";
  249. status = "disabled";
  250. };
  251. ohci: usb@fffe1400 {
  252. compatible = "brcm,bcm6358-ohci", "generic-ohci";
  253. reg = <0xfffe1400 0x100>;
  254. big-endian;
  255. no-big-frame-no;
  256. interrupt-parent = <&periph_intc>;
  257. interrupts = <BCM6358_IRQ_OHCI>;
  258. phys = <&usbh 0>;
  259. phy-names = "usb";
  260. status = "disabled";
  261. };
  262. usbh: usb-phy@fffe1500 {
  263. compatible = "brcm,bcm6358-usbh-phy";
  264. reg = <0xfffe1500 0x38>;
  265. #phy-cells = <1>;
  266. resets = <&periph_rst BCM6358_RST_USBH>;
  267. status = "disabled";
  268. };
  269. ethernet0: ethernet@fffe4000 {
  270. compatible = "brcm,bcm6358-emac";
  271. reg = <0xfffe4000 0x2dc>;
  272. clocks = <&periph_clk BCM6358_CLK_ENET0>;
  273. interrupt-parent = <&periph_intc>;
  274. interrupts = <BCM6358_IRQ_EMAC0>,
  275. <BCM6358_IRQ_EMAC0_RX_DMA>,
  276. <BCM6358_IRQ_EMAC0_TX_DMA>;
  277. interrupt-names = "emac",
  278. "rx",
  279. "tx";
  280. brcm,iudma = <&iudma>;
  281. dma-rx = <0>;
  282. dma-tx = <1>;
  283. status = "disabled";
  284. mdio0: mdio {
  285. #address-cells = <1>;
  286. #size-cells = <0>;
  287. };
  288. };
  289. ethernet1: ethernet@fffe4800 {
  290. compatible = "brcm,bcm6358-emac";
  291. reg = <0xfffe4800 0x2dc>;
  292. clocks = <&periph_clk BCM6358_CLK_ENET1>;
  293. interrupt-parent = <&periph_intc>;
  294. interrupts = <BCM6358_IRQ_EMAC1>,
  295. <BCM6358_IRQ_EMAC1_RX_DMA>,
  296. <BCM6358_IRQ_EMAC1_TX_DMA>;
  297. interrupt-names = "emac",
  298. "rx",
  299. "tx";
  300. brcm,iudma = <&iudma>;
  301. brcm,external-mii;
  302. dma-rx = <2>;
  303. dma-tx = <3>;
  304. status = "disabled";
  305. mdio1: mdio {
  306. #address-cells = <1>;
  307. #size-cells = <0>;
  308. };
  309. };
  310. iudma: dma@fffe5000 {
  311. #address-cells = <1>;
  312. #size-cells = <1>;
  313. compatible = "brcm,bcm6358-iudma";
  314. reg = <0xfffe5000 0x24>,
  315. <0xfffe5100 0x80>,
  316. <0xfffe5200 0x80>;
  317. reg-names = "dma",
  318. "dma-channels",
  319. "dma-sram";
  320. dma-channels = <8>;
  321. clocks = <&periph_clk BCM6358_CLK_EMUSB>,
  322. <&periph_clk BCM6358_CLK_USBSU>,
  323. <&periph_clk BCM6358_CLK_EPHY>,
  324. <&periph_clk BCM6358_CLK_ENET>;
  325. resets = <&periph_rst BCM6358_RST_ENET>,
  326. <&periph_rst BCM6358_RST_EPHY>;
  327. status = "disabled";
  328. };
  329. };
  330. };