gw16083.c 25 KB

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  1. /*
  2. * drivers/net/phy/gw16083.c
  3. *
  4. * Driver for GW16083 Ventana Ethernet Expansion Mezzanine
  5. *
  6. * Author: Tim Harvey
  7. *
  8. * Copyright (c) 2014 Tim Harvey <[email protected]>
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. */
  16. /*
  17. * The GW16083 interfaces with a Ventana baseboard via the PCIe bus, an i2c
  18. * bus (i2c2), and a couple of GPIO's. On the PCIe bus is an i210 GigE with
  19. * its MAC connected to Port4 of a Marvell MV88E6176 7-port GigE switch via
  20. * MDIO and RGMII. Ports 0-3 are standard copper RJ45 but Ports 5 and 6
  21. * connect to Marvell MV88E1111 dual-mode Copper/Fiber PHY's over SGMII and
  22. * MDIO. The PHY's have both an RG45 for copper and an SFP module.
  23. */
  24. #include <linux/kernel.h>
  25. #include <linux/string.h>
  26. #include <linux/errno.h>
  27. #include <linux/unistd.h>
  28. #include <linux/i2c.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/init.h>
  31. #include <linux/delay.h>
  32. #include <linux/device.h>
  33. #include <linux/netdevice.h>
  34. #include <linux/etherdevice.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/spinlock.h>
  37. #include <linux/mm.h>
  38. #include <linux/module.h>
  39. #include <linux/mii.h>
  40. #include <linux/ethtool.h>
  41. #include <linux/phy.h>
  42. #include <linux/marvell_phy.h>
  43. #include <linux/of_platform.h>
  44. #include <linux/io.h>
  45. #include <asm/irq.h>
  46. #include <linux/uaccess.h>
  47. #include "gw16083.h"
  48. #undef FAIL_ON_CHECKSUM_ERR /* fail to configure SFP if checksum bad */
  49. #define PORT_POWER_CONTROL /* ports can be enabled/disabled via sysfs */
  50. #define PORT_MODE_CONTROL /* ports 5/6 can have SFP/RJ45 mode forced */
  51. MODULE_DESCRIPTION("GW16083 driver");
  52. MODULE_AUTHOR("Tim Harvey");
  53. MODULE_LICENSE("GPL");
  54. struct mv88e1111_port_state {
  55. int port;
  56. bool present;
  57. bool serdes;
  58. bool sfp_signal;
  59. bool sfp_present;
  60. bool sfp_compat;
  61. bool sfp_enabled;
  62. char sfp_id[64];
  63. };
  64. struct mv88e1111_priv {
  65. struct phy_device *phydev;
  66. struct i2c_client *client;
  67. struct mv88e1111_port_state port5;
  68. struct mv88e1111_port_state port6;
  69. struct kobject *sysfs_kobj;
  70. };
  71. enum {
  72. mode_copper = 0,
  73. mode_serdes = 1,
  74. };
  75. static struct i2c_client *gw16083_client = NULL;
  76. static int gw16083_read_port_sfp(struct i2c_client *client,
  77. struct mv88e1111_port_state *state);
  78. /* read switch port register from port0-6 */
  79. u16 read_switch_port(struct phy_device *pdev, int port, u8 regaddr)
  80. {
  81. return pdev->bus->read(pdev->bus, MV_BASE + port, regaddr);
  82. }
  83. /* write switch port register to port0-6 */
  84. int write_switch_port(struct phy_device *pdev, int port, u8 regaddr, u16 val)
  85. {
  86. return pdev->bus->write(pdev->bus, MV_BASE + port, regaddr, val);
  87. }
  88. /*
  89. * read_switch_port_phy - write a register for a specific port on 88E6176
  90. * The 88E6176 PHY registers must be accessed thorugh the Global2 address
  91. * using the SMI_PHY_COMMAND_REG and SMI_PHY_DATA_REG.
  92. */
  93. int read_switch_port_phy(struct phy_device *pdev, int port, u8 regaddr)
  94. {
  95. u16 reg;
  96. int i;
  97. dev_dbg(&pdev->dev, "read_phy: port%d reg=0x%02x\n", port, regaddr);
  98. reg = SMIBUSY | SMIMODE22 | SMIOP_READ;
  99. reg |= port << DEVADDR;
  100. reg |= regaddr << REGADDR;
  101. pdev->bus->write(pdev->bus, MV_GLOBAL2, MV_SMI_PHY_COMMAND, reg);
  102. for (i = 0; i < 10; i++) {
  103. reg = pdev->bus->read(pdev->bus, MV_GLOBAL2,
  104. MV_SMI_PHY_COMMAND);
  105. if (!(reg & (1<<15)))
  106. break;
  107. mdelay(1);
  108. }
  109. /* timeout */
  110. if (i == 10)
  111. return 0xffff;
  112. reg = pdev->bus->read(pdev->bus, MV_GLOBAL2, MV_SMI_PHY_DATA);
  113. return reg;
  114. }
  115. /*
  116. * write_switch_port_phy - write a register for a specific port on 88E6176
  117. * The 88E6176 PHY registers must be accessed thorugh the Global2 address
  118. * using the SMI_PHY_COMMAND_REG and SMI_PHY_DATA_REG.
  119. */
  120. int write_switch_port_phy(struct phy_device *pdev, int port, u8 addr, u16 reg)
  121. {
  122. int i;
  123. dev_dbg(&pdev->dev, "write_phy: port%d reg=0x%02x val=0x%04x\n", port,
  124. addr, reg);
  125. pdev->bus->write(pdev->bus, MV_GLOBAL2, MV_SMI_PHY_DATA, reg);
  126. reg = SMIBUSY | SMIMODE22 | SMIOP_WRITE;
  127. reg |= port << DEVADDR;
  128. reg |= addr << REGADDR;
  129. pdev->bus->write(pdev->bus, MV_GLOBAL2, MV_SMI_PHY_COMMAND, reg);
  130. for (i = 0; i < 10; i++) {
  131. reg = pdev->bus->read(pdev->bus, MV_GLOBAL2,
  132. MV_SMI_PHY_COMMAND);
  133. if (!(reg & (1<<15)))
  134. break;
  135. mdelay(1);
  136. }
  137. /* timeout */
  138. if (i == 10)
  139. return -ETIMEDOUT;
  140. return 0;
  141. }
  142. /* read a scratch register from switch */
  143. inline u8 read_switch_scratch(struct phy_device *pdev, u8 reg)
  144. {
  145. pdev->bus->write(pdev->bus, MV_GLOBAL2, MV_SCRATCH_MISC, (reg << 8));
  146. return pdev->bus->read(pdev->bus, MV_GLOBAL2, MV_SCRATCH_MISC) & 0xff;
  147. }
  148. /* write a scratch register to switch */
  149. inline void write_switch_scratch(struct phy_device *pdev, u8 reg, u8 val)
  150. {
  151. pdev->bus->write(pdev->bus, MV_GLOBAL2, MV_SCRATCH_MISC,
  152. (1 << 15) | (reg << 8) | val);
  153. }
  154. /* enable or disable an SFP's TXEN signal */
  155. static int enable_sfp_txen(struct phy_device *pdev, int port, bool enable)
  156. {
  157. u8 gpio;
  158. int bit;
  159. if (port != 5 && port != 6)
  160. return -EINVAL;
  161. /* GPIO[2:1] output low to enable TXEN */
  162. bit = (port == 5) ? 1 : 2;
  163. gpio = read_switch_scratch(pdev, MV_GPIO_DATA);
  164. if (enable)
  165. gpio |= (1 << bit);
  166. else
  167. gpio &= (1 << bit);
  168. write_switch_scratch(pdev, MV_GPIO_DATA, gpio);
  169. dev_info(&pdev->dev, "Port%d: SFP TX %s\n", port, enable ?
  170. "enabled" : "disabled");
  171. return 0;
  172. }
  173. /* configure mv88e1111 port for copper or serdes
  174. * For Copper we set auto link/duplex/speed detection
  175. * For SerDes/Fiber we force 1000mbps link up and auto-neg duplex
  176. */
  177. static int config_mv88e1111_port_sfp(struct phy_device *pdev, int port,
  178. bool sfp)
  179. {
  180. u16 reg;
  181. if (port != 5 && port != 6)
  182. return -EINVAL;
  183. dev_dbg(&pdev->dev, "%s: Port%d %s\n", __func__, port,
  184. sfp ? "SFP" : "copper");
  185. if (sfp) {
  186. enable_sfp_txen(pdev, port, 1);
  187. /* configure MV88E6176 Physical Control Port Register */
  188. dev_info(&pdev->dev,
  189. "Port%d: SFP: force 1000mbps link up "
  190. "(auto-negotiate duplex)\n",
  191. port);
  192. reg = read_switch_port(pdev, port, MV_PORT_PHYS_CONTROL);
  193. reg &= ~0x3f; /* clear 5-0 */
  194. reg |= (1 << 4) | (1 << 5); /* force link up */
  195. reg |= 2; /* force 1000mbps */
  196. write_switch_port(pdev, port, MV_PORT_PHYS_CONTROL, reg);
  197. reg = read_switch_port(pdev, port, MV_PORT_PHYS_CONTROL);
  198. }
  199. /* copper */
  200. else {
  201. enable_sfp_txen(pdev, port, 0);
  202. /* configure MV88E6176 Physical Control Port Register */
  203. dev_info(&pdev->dev,
  204. "Port%d: Copper: set auto-neg link/duplex/speed\n",
  205. port);
  206. reg = read_switch_port(pdev, port, MV_PORT_PHYS_CONTROL);
  207. reg &= ~0x3f; /* clear 5-0 */
  208. reg |= 3; /* speed not forced */
  209. write_switch_port(pdev, port, MV_PORT_PHYS_CONTROL, reg);
  210. reg = read_switch_port(pdev, port, MV_PORT_PHYS_CONTROL);
  211. }
  212. dev_dbg(&pdev->dev, "%s: Port%d %s PORT_PHYS_CONTROL=0x%04x\n",
  213. __func__, port, sfp ? "SFP" : "copper",
  214. read_switch_port(pdev, port, MV_PORT_PHYS_CONTROL));
  215. return 0;
  216. }
  217. #if defined(PORT_POWER_CONTROL)
  218. static int enable_switch_port(struct phy_device *pdev, int port, bool enable)
  219. {
  220. struct mv88e1111_priv *priv = dev_get_drvdata(&pdev->dev);
  221. u16 reg;
  222. /* power up port */
  223. dev_info(&priv->client->dev, "Port%d: %s\n", port,
  224. enable ? "normal operation" : "power down");
  225. reg = read_switch_port_phy(pdev, port, MV_PHY_CONTROL);
  226. if (enable)
  227. reg &= ~(1 << 11); /* Normal Operation */
  228. else
  229. reg |= (1 << 11); /* power down */
  230. write_switch_port_phy(pdev, port, MV_PHY_CONTROL, reg);
  231. reg = read_switch_port_phy(pdev, port, MV_PHY_CONTROL1);
  232. if (enable)
  233. reg &= ~(1 << 2); /* Normal Operation */
  234. else
  235. reg |= (1 << 2); /* power down */
  236. write_switch_port_phy(pdev, port, MV_PHY_CONTROL1, reg);
  237. return 0;
  238. }
  239. #endif
  240. /*
  241. * Sysfs API
  242. */
  243. struct mv88e1111_port_state *get_port_state(struct mv88e1111_priv *priv,
  244. int port)
  245. {
  246. if (port == 5)
  247. return &priv->port5;
  248. if (port == 6)
  249. return &priv->port6;
  250. return NULL;
  251. }
  252. /*
  253. * get MV88E6176 port number for a specific GW16083 port name
  254. * The GW16083 ports as shown on the silkscreen are not mapped according to
  255. * the MV88E6176 ports numbers.
  256. */
  257. static int gw16083_get_port(const char* name)
  258. {
  259. int i;
  260. int map[] = { 3, 2, 1, 0, 5, 6 };
  261. if (strncasecmp(name, "ETHERNET", 8) != 0 || strlen(name) != 9)
  262. return -1;
  263. i = name[8] - '0';
  264. if (i < 1 || i > 6)
  265. return -1;
  266. return map[i-1];
  267. }
  268. static ssize_t port_show(struct device *dev, struct device_attribute *attr,
  269. char *buf)
  270. {
  271. struct mv88e1111_priv *priv = dev_get_drvdata(dev);
  272. int port = -1;
  273. u16 reg;
  274. if (sscanf(attr->attr.name, "port%d", &port) != 1)
  275. return 0;
  276. if (port < 0 || port > 6)
  277. return 0;
  278. reg = read_switch_port_phy(priv->phydev, port, MV_PHY_CONTROL);
  279. return sprintf(buf, "%s\n", (reg & (1 << 11)) ? "disabled" : "enabled");
  280. }
  281. #if defined(PORT_POWER_CONTROL)
  282. static ssize_t port_store(struct device *dev, struct device_attribute *attr,
  283. const char *buf, size_t count)
  284. {
  285. struct mv88e1111_priv *priv = dev_get_drvdata(dev);
  286. int port = -1;
  287. int val;
  288. port = gw16083_get_port(attr->attr.name);
  289. if (port < 0)
  290. return 0;
  291. if (sscanf(buf, "%d", &val) != 1)
  292. return 0;
  293. enable_switch_port(priv->phydev, port, val ? 1 : 0);
  294. return count;
  295. }
  296. static DEVICE_ATTR(ethernet1, S_IWUSR | S_IRUGO, port_show, port_store);
  297. static DEVICE_ATTR(ethernet2, S_IWUSR | S_IRUGO, port_show, port_store);
  298. static DEVICE_ATTR(ethernet3, S_IWUSR | S_IRUGO, port_show, port_store);
  299. static DEVICE_ATTR(ethernet4, S_IWUSR | S_IRUGO, port_show, port_store);
  300. static DEVICE_ATTR(ethernet5, S_IWUSR | S_IRUGO, port_show, port_store);
  301. static DEVICE_ATTR(ethernet6, S_IWUSR | S_IRUGO, port_show, port_store);
  302. #else
  303. static DEVICE_ATTR(ethernet1, S_IRUGO, port_show, NULL);
  304. static DEVICE_ATTR(ethernet2, S_IRUGO, port_show, NULL);
  305. static DEVICE_ATTR(ethernet3, S_IRUGO, port_show, NULL);
  306. static DEVICE_ATTR(ethernet4, S_IRUGO, port_show, NULL);
  307. static DEVICE_ATTR(ethernet5, S_IRUGO, port_show, NULL);
  308. static DEVICE_ATTR(ethernet6, S_IRUGO, port_show, NULL);
  309. #endif
  310. static ssize_t portsfp_show(struct device *dev, struct device_attribute *attr,
  311. char *buf)
  312. {
  313. struct mv88e1111_priv *priv = dev_get_drvdata(dev);
  314. struct mv88e1111_port_state *state;
  315. state = get_port_state(priv, gw16083_get_port(attr->attr.name));
  316. if (!state)
  317. return 0;
  318. if (!state->sfp_present)
  319. return 0;
  320. return sprintf(buf, "%s\n", state->sfp_id);
  321. }
  322. static ssize_t portmode_show(struct device *dev, struct device_attribute *attr,
  323. char *buf)
  324. {
  325. struct mv88e1111_priv *priv = dev_get_drvdata(dev);
  326. struct mv88e1111_port_state *state;
  327. state = get_port_state(priv, gw16083_get_port(attr->attr.name));
  328. if (!state)
  329. return 0;
  330. return sprintf(buf, "%s\n", state->serdes ? "SFP" : "RJ45");
  331. }
  332. static DEVICE_ATTR(ethernet5_sfp, S_IRUGO, portsfp_show, NULL);
  333. static DEVICE_ATTR(ethernet6_sfp, S_IRUGO, portsfp_show, NULL);
  334. #ifdef PORT_MODE_CONTROL
  335. static ssize_t portmode_store(struct device *dev, struct device_attribute *attr,
  336. const char *buf, size_t count)
  337. {
  338. struct mv88e1111_priv *priv = dev_get_drvdata(dev);
  339. struct mv88e1111_port_state *state;
  340. u16 reg;
  341. int port;
  342. port = gw16083_get_port(attr->attr.name);
  343. state = get_port_state(priv, port);
  344. if (!state)
  345. return 0;
  346. reg = read_switch_port_phy(priv->phydev, port, MII_M1111_PHY_EXT_SR);
  347. if (strcasecmp(buf, "auto") == 0) {
  348. reg &= ~(1<<15); /* enable auto-selection */
  349. dev_info(&priv->client->dev, "Port%d: enable auto-selection\n",
  350. port);
  351. } else if (strcasecmp(buf, "RJ45") == 0) {
  352. reg |= (1<<15); /* disable auto-selection */
  353. reg |= 0xb; /* RGMII to Copper */
  354. config_mv88e1111_port_sfp(priv->phydev, port, 0);
  355. dev_info(&priv->client->dev, "Port%d: select RJ45\n", port);
  356. } else if (strcasecmp(buf, "SFP") == 0) {
  357. reg |= (1<<15); /* disable auto-selection */
  358. reg |= 0x3; /* RGMII to Fiber */
  359. config_mv88e1111_port_sfp(priv->phydev, port, 1);
  360. dev_info(&priv->client->dev, "Port%d: select SFP\n", port);
  361. }
  362. write_switch_port_phy(priv->phydev, port, MII_M1111_PHY_EXT_SR, reg);
  363. return count;
  364. }
  365. static DEVICE_ATTR(ethernet5_mode, S_IWUSR | S_IRUGO, portmode_show,
  366. portmode_store);
  367. static DEVICE_ATTR(ethernet6_mode, S_IWUSR | S_IRUGO, portmode_show,
  368. portmode_store);
  369. #else
  370. static DEVICE_ATTR(ethernet5_mode, S_IRUGO, portmode_show, NULL);
  371. static DEVICE_ATTR(ethernet6_mode, S_IRUGO, portmode_show, NULL);
  372. #endif
  373. /*
  374. * PHY driver
  375. */
  376. static int
  377. mv88e6176_config_init(struct phy_device *pdev)
  378. {
  379. dev_dbg(&pdev->dev, "%s\n", __func__);
  380. pdev->state = PHY_RUNNING;
  381. return 0;
  382. }
  383. /* check MV88E1111 PHY status and MV88E6176 GPIO */
  384. static int
  385. mv88e6176_read_status(struct phy_device *pdev)
  386. {
  387. struct mv88e1111_priv *priv = dev_get_drvdata(&pdev->dev);
  388. struct mv88e1111_port_state *state;
  389. bool serdes, sfp_present, sfp_signal;
  390. int port;
  391. int ret = 0;
  392. u16 gpio;
  393. dev_dbg(&pdev->dev, "%s", __func__);
  394. gpio = read_switch_scratch(pdev, MV_GPIO_DATA);
  395. for (port = 5; port < 7; port++) {
  396. serdes = (read_switch_port_phy(pdev, port, MII_M1111_PHY_EXT_SR)
  397. & (1<<13)) ? 1 : 0;
  398. dev_dbg(&pdev->dev, "%s: Port%d GPIO:0x%02x SerDes:%d\n",
  399. __func__, port, gpio, serdes);
  400. switch(port) {
  401. case 5:
  402. state = &priv->port5;
  403. sfp_present = !((gpio >> 5) & 1);
  404. sfp_signal = !((gpio >> 6) & 1);
  405. break;
  406. case 6:
  407. state = &priv->port6;
  408. sfp_present = !((gpio >> 3) & 1);
  409. sfp_signal = !((gpio >> 4) & 1);
  410. break;
  411. }
  412. /*
  413. * on sfp_detect read/verify SFP MSA and set sfp_compat
  414. * on sfp_signal issue link down?
  415. * on serdes auto-select
  416. */
  417. if (state->sfp_present != sfp_present) {
  418. state->sfp_present = sfp_present;
  419. dev_info(&pdev->dev, "Port%d: SFP %s\n",
  420. port, sfp_present ? "inserted" : "removed");
  421. if (state->sfp_present) {
  422. if (gw16083_read_port_sfp(priv->client, state))
  423. state->sfp_compat = false;
  424. else
  425. state->sfp_compat = true;
  426. } else {
  427. state->sfp_compat = false;
  428. state->sfp_enabled = false;
  429. }
  430. }
  431. if (state->sfp_signal != sfp_signal) {
  432. state->sfp_signal = sfp_signal;
  433. dev_info(&pdev->dev, "Port%d: SFP signal %s\n",
  434. port, sfp_signal ? "detected" : "lost");
  435. }
  436. if (state->serdes != serdes) {
  437. state->serdes = serdes;
  438. dev_info(&pdev->dev, "Port%d: %s auto-selected\n",
  439. port, serdes ? "SERDES" : "copper");
  440. /*
  441. * if auto-selection has switched to copper
  442. * disable serdes
  443. */
  444. if (!serdes) {
  445. config_mv88e1111_port_sfp(pdev, port, 0);
  446. state->sfp_enabled = false;
  447. }
  448. }
  449. /*
  450. * if serdes and compatible SFP module and not yet enabled
  451. * then enable for serdes
  452. */
  453. if (serdes && state->sfp_compat && state->sfp_signal &&
  454. !state->sfp_enabled)
  455. {
  456. if (!config_mv88e1111_port_sfp(pdev, port, 1))
  457. state->sfp_enabled = true;
  458. }
  459. }
  460. return ret;
  461. }
  462. static int
  463. mv88e6176_config_aneg(struct phy_device *pdev)
  464. {
  465. dev_dbg(&pdev->dev, "%s", __func__);
  466. return 0;
  467. }
  468. static void
  469. mv88e6176_remove(struct phy_device *pdev)
  470. {
  471. dev_dbg(&pdev->dev, "%s", __func__);
  472. device_remove_file(&pdev->dev, &dev_attr_ethernet1);
  473. device_remove_file(&pdev->dev, &dev_attr_ethernet2);
  474. device_remove_file(&pdev->dev, &dev_attr_ethernet3);
  475. device_remove_file(&pdev->dev, &dev_attr_ethernet4);
  476. device_remove_file(&pdev->dev, &dev_attr_ethernet5);
  477. device_remove_file(&pdev->dev, &dev_attr_ethernet6);
  478. device_remove_file(&pdev->dev, &dev_attr_ethernet5_sfp);
  479. device_remove_file(&pdev->dev, &dev_attr_ethernet6_sfp);
  480. device_remove_file(&pdev->dev, &dev_attr_ethernet5_mode);
  481. device_remove_file(&pdev->dev, &dev_attr_ethernet6_mode);
  482. sysfs_remove_link(kernel_kobj, "gw16083");
  483. }
  484. static int
  485. mv88e6176_probe(struct phy_device *pdev)
  486. {
  487. int port;
  488. int ret = 0;
  489. u32 id, reg;
  490. struct mv88e1111_priv *priv;
  491. dev_dbg(&pdev->dev, "%s: addr=0x%02x bus=%s:%s gw16083_client=%p\n",
  492. __func__, pdev->addr, pdev->bus->name, pdev->bus->id,
  493. gw16083_client);
  494. /* In single-chip addressing mode the MV88E6176 shows up on 0x10-0x16 */
  495. if (pdev->addr != MV_BASE)
  496. return 0;
  497. /* i2c driver needs to be loaded first */
  498. if (!gw16083_client)
  499. return 0;
  500. /* gw16083 has MV88E1676 hanging off of i210 mdio bus */
  501. if (strcmp(pdev->bus->name, "igb_enet_mii_bus") != 0)
  502. return 0;
  503. //dev_info(&pdev->dev, "Detected");
  504. dev_info(&gw16083_client->dev, "%s: MV88E6176 7-port switch detected",
  505. pdev->bus->id);
  506. /*
  507. * port5/6 config: MV88E1111 PHY
  508. * Register 20: PHY Control Register
  509. * R20_7: add delay to RX_CLK for RXD
  510. * R20_1: add delay to TX_CLK for TXD
  511. * Register 24: LED Control Register
  512. * 0x4111:
  513. * Pulse stretch 170 to 340 ms
  514. * Register 0: Control Register
  515. * R0_15: phy reset
  516. */
  517. for (port = 5; port < 7; port++) {
  518. #ifndef RGMII_DELAY_ON_PHY
  519. write_switch_port(pdev, port, MV_PORT_PHYS_CONTROL, 0xC003);
  520. #endif
  521. id = read_switch_port_phy(pdev, port,
  522. MII_M1111_PHY_IDENT0) << 16;
  523. id |= read_switch_port_phy(pdev, port, MII_M1111_PHY_IDENT1);
  524. if ((id & MII_M1111_PHY_ID_MASK) != MII_M1111_PHY_ID) {
  525. dev_err(&gw16083_client->dev,
  526. "Port%d: No MV88E1111 PHY detected", port);
  527. return 0;
  528. //continue;
  529. }
  530. #ifdef RGMII_DELAY_ON_PHY
  531. /* phy rx/tx delay */
  532. reg = read_switch_port_phy(pdev, port, MII_M1111_PHY_EXT_CR);
  533. reg |= (1<<1) | (1<<7);
  534. write_switch_port_phy(pdev, port, MII_M1111_PHY_EXT_CR, reg);
  535. #endif
  536. /* led config */
  537. write_switch_port_phy(pdev, port, MII_M1111_PHY_LED_CONTROL,
  538. MII_M1111_PHY_LED_PULSE_STR);
  539. /* reset phy */
  540. reg = read_switch_port_phy(pdev, port, MII_M1111_PHY_CONTROL);
  541. reg |= MII_M1111_PHY_CONTROL_RESET;
  542. write_switch_port_phy(pdev, port, MII_M1111_PHY_CONTROL, reg);
  543. dev_info(&gw16083_client->dev,
  544. "Port%d MV88E111 PHY configured\n", port);
  545. }
  546. /*
  547. * GPIO Configuration:
  548. * GPIO1: FIB5_TXEN# (output)
  549. * GPIO2: FIB6_TXEN# (output)
  550. * GPIO3: FIB6_PRES# (input)
  551. * GPIO4: FIB6_LOS (input)
  552. * GPIO5: FIB5_PRES# (input)
  553. * GPIO6: FIB5_LOS (input)
  554. */
  555. write_switch_scratch(pdev, MV_GPIO_DATA, 0x06); /* GPIO[2:1] out hi */
  556. write_switch_scratch(pdev, MV_GPIO_DIR, 0x78); /* GPIO[6:3] inp */
  557. pdev->irq = PHY_POLL;
  558. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  559. if (!priv)
  560. return -ENOMEM;
  561. memset(priv, 0, sizeof(*priv));
  562. priv->phydev = pdev;
  563. priv->client = gw16083_client;
  564. priv->port5.port = 5;
  565. priv->port6.port = 6;
  566. dev_set_drvdata(&pdev->dev, priv);
  567. ret |= device_create_file(&pdev->dev, &dev_attr_ethernet1);
  568. ret |= device_create_file(&pdev->dev, &dev_attr_ethernet2);
  569. ret |= device_create_file(&pdev->dev, &dev_attr_ethernet3);
  570. ret |= device_create_file(&pdev->dev, &dev_attr_ethernet4);
  571. ret |= device_create_file(&pdev->dev, &dev_attr_ethernet5);
  572. ret |= device_create_file(&pdev->dev, &dev_attr_ethernet6);
  573. ret |= device_create_file(&pdev->dev, &dev_attr_ethernet5_sfp);
  574. ret |= device_create_file(&pdev->dev, &dev_attr_ethernet6_sfp);
  575. ret |= device_create_file(&pdev->dev, &dev_attr_ethernet5_mode);
  576. ret |= device_create_file(&pdev->dev, &dev_attr_ethernet6_mode);
  577. if (unlikely(ret))
  578. dev_err(&pdev->dev, "Failed creating attrs\n");
  579. /* Add a nice symlink to the real device */
  580. ret = sysfs_create_link(kernel_kobj, &pdev->dev.kobj, "gw16083");
  581. dev_dbg(&pdev->dev, "initial state: GPIO=0x%02x "
  582. "Port5_serdes=%d Port6_serdes=%d\n",
  583. read_switch_scratch(pdev, MV_GPIO_DATA),
  584. (read_switch_port_phy(pdev, 5, MII_M1111_PHY_EXT_SR)
  585. & (1<<13) ? 1:0),
  586. (read_switch_port_phy(pdev, 6, MII_M1111_PHY_EXT_SR)
  587. & (1<<13) ? 1:0));
  588. return ret;
  589. }
  590. static struct phy_driver mv88e6176_phy_driver = {
  591. .name = "MV88E6176",
  592. .phy_id = MV_IDENT_VALUE,
  593. .phy_id_mask = MV_IDENT_MASK,
  594. .features = PHY_BASIC_FEATURES,
  595. .probe = &mv88e6176_probe,
  596. .remove = &mv88e6176_remove,
  597. .config_init = &mv88e6176_config_init,
  598. .config_aneg = &mv88e6176_config_aneg,
  599. .read_status = &mv88e6176_read_status,
  600. .driver = { .owner = THIS_MODULE },
  601. };
  602. /*
  603. * I2C driver
  604. */
  605. /* See SFF-8472 */
  606. struct sfp_msa {
  607. /* Basic ID fields */
  608. u8 identifier;
  609. u8 ext_identifier;
  610. u8 connector;
  611. u8 transceiver[8];
  612. u8 encoding;
  613. u8 br_nominal;
  614. u8 rate_identifier;
  615. u8 length_smf_km;
  616. u8 length_smf;
  617. u8 length_om2;
  618. u8 length_om1;
  619. u8 length_om4;
  620. u8 length_om3;
  621. u8 vendor_name[16];
  622. u8 transceiver2;
  623. u8 vendor_oui[3];
  624. u8 vendor_pn[16];
  625. u8 vendor_rev[4];
  626. u8 wavelength[2];
  627. u8 resv1;
  628. u8 cc_base;
  629. /* extended id fields */
  630. u8 options[2];
  631. u8 br_max;
  632. u8 br_min;
  633. u8 vendor_sn[16];
  634. u8 date_code[8];
  635. u8 diags_type;
  636. u8 enhanced_options;
  637. u8 sff8472_compliance;
  638. u8 cc_ext;
  639. /* Vendor specific ID fields */
  640. u8 vendor_data[32];
  641. u8 sff8079[128];
  642. };
  643. enum identifier {
  644. UNKNOWN,
  645. GBIC,
  646. SFF,
  647. SFP,
  648. XBI,
  649. XENPACK,
  650. XFP,
  651. XFF,
  652. XFP_E,
  653. XPAK,
  654. X2,
  655. DWDM_SFP,
  656. QSFP,
  657. MAX_ID,
  658. };
  659. const char* id_names[] = {
  660. "UNKONWN",
  661. "GBIC",
  662. "SFF",
  663. "SFP",
  664. NULL,
  665. };
  666. /* Flags for SFP modules compatible with ETH up to 1Gb */
  667. struct sfp_flags {
  668. u8 e1000_base_sx:1;
  669. u8 e1000_base_lx:1;
  670. u8 e1000_base_cx:1;
  671. u8 e1000_base_t:1;
  672. u8 e100_base_lx:1;
  673. u8 e100_base_fx:1;
  674. u8 e10_base_bx10:1;
  675. u8 e10_base_px:1;
  676. };
  677. #define STRING_APPEND(str, src) \
  678. strncat(str, src, sizeof(src)); \
  679. for (i = 1; i < sizeof(str); i++) \
  680. if (str[i-1] == ' ' && str[i] == ' ') \
  681. str[i] = 0;
  682. static int gw16083_read_port_sfp(struct i2c_client *client,
  683. struct mv88e1111_port_state *state)
  684. {
  685. int ret = 0;
  686. u8 data[256];
  687. struct sfp_flags *eth_flags;
  688. u8 crc;
  689. int i;
  690. u8 *str;
  691. struct sfp_msa *sfp_msa = (struct sfp_msa *)data;
  692. int port = state->port;
  693. union i2c_smbus_data d;
  694. dev_dbg(&client->dev, "%s Port%d\n", __func__, port);
  695. if (!i2c_check_functionality(client->adapter,
  696. I2C_FUNC_SMBUS_READ_I2C_BLOCK))
  697. return -ENODEV;
  698. d.byte = (port == 5) ? 1 : 2;
  699. if (i2c_smbus_xfer(client->adapter, GW16083_I2C_ADDR_PCA9543,
  700. client->flags, I2C_SMBUS_WRITE, 0,
  701. I2C_SMBUS_BYTE_DATA, &d) < 0)
  702. {
  703. dev_err(&client->dev,
  704. "Port%d: failed writing PCA9543 register\n", port);
  705. return ret;
  706. }
  707. /* read all 256 bytes of SFP EEPROM */
  708. for (i = 0; i < sizeof(data); i += I2C_SMBUS_BLOCK_MAX) {
  709. d.block[0] = I2C_SMBUS_BLOCK_MAX;
  710. if (i2c_smbus_xfer(client->adapter, GW16083_I2C_ADDR_SFP1,
  711. client->flags, I2C_SMBUS_READ, i,
  712. I2C_SMBUS_I2C_BLOCK_DATA, &d) < 0)
  713. {
  714. dev_err(&client->dev,
  715. "Port%d: failed reading SFP data\n", port);
  716. return ret;
  717. }
  718. memcpy(data + i, d.block + 1, I2C_SMBUS_BLOCK_MAX);
  719. }
  720. /* Validate checksums */
  721. for (crc = 0, i = 0; i < 63; i++)
  722. crc += data[i];
  723. if (crc != sfp_msa->cc_base) {
  724. dev_err(&client->dev, "Port%d: "
  725. "Checksum failure for Base ID fields: 0x%02x\n", port,
  726. crc);
  727. #ifdef FAIL_ON_CHECKSUM_ERR
  728. return -EINVAL;
  729. #endif
  730. }
  731. for (crc = 0, i = 64; i < 95; i++)
  732. crc += data[i];
  733. if (crc != sfp_msa->cc_ext) {
  734. dev_err(&client->dev, "Port%d: "
  735. "Checksum failure for Extended ID fields: 0x%02x\n",
  736. port, crc);
  737. #ifdef FAIL_ON_CHECKSUM_ERR
  738. return -EINVAL;
  739. #endif
  740. }
  741. state->sfp_id[0] = 0;
  742. for (i = 0; id_names[i]; i++) {
  743. if (sfp_msa->identifier == i) {
  744. sprintf(state->sfp_id, "%s: ", id_names[i]);
  745. break;
  746. }
  747. }
  748. STRING_APPEND(state->sfp_id, sfp_msa->vendor_oui);
  749. STRING_APPEND(state->sfp_id, sfp_msa->vendor_name);
  750. STRING_APPEND(state->sfp_id, sfp_msa->vendor_pn);
  751. STRING_APPEND(state->sfp_id, sfp_msa->vendor_rev);
  752. STRING_APPEND(state->sfp_id, sfp_msa->vendor_sn);
  753. dev_info(&client->dev, "Port%d: %s\n", port, state->sfp_id);
  754. if ((sfp_msa->identifier != GBIC) &&
  755. (sfp_msa->identifier != SFF) &&
  756. (sfp_msa->identifier != SFP))
  757. {
  758. dev_err(&client->dev, "Port%d: Unknown module identifier: %d\n",
  759. port, sfp_msa->identifier);
  760. return -EINVAL;
  761. }
  762. str = "";
  763. eth_flags = (struct sfp_flags *)(sfp_msa->transceiver + 3);
  764. if (eth_flags->e1000_base_sx) {
  765. str = "1000Base-SX (Fiber)";
  766. } else if (eth_flags->e1000_base_lx) {
  767. str = "1000Base-LX (Fiber)";
  768. } else if (eth_flags->e1000_base_t) {
  769. str = "1000Base-T (Copper)";
  770. } else if (eth_flags->e100_base_fx) {
  771. str = "100Base-FX (Fiber) - not supported";
  772. ret = -EINVAL;
  773. } else {
  774. str = "Unknown/Unsupported media type";
  775. ret = -EINVAL;
  776. }
  777. if (ret)
  778. dev_err(&client->dev, "Port%d: %s (0x%02x)\n", port, str,
  779. sfp_msa->transceiver[3]);
  780. else
  781. dev_info(&client->dev, "Port%d: %s (0x%02x)\n", port, str,
  782. sfp_msa->transceiver[3]);
  783. return ret;
  784. }
  785. static int gw16083_probe(struct i2c_client *client,
  786. const struct i2c_device_id *id)
  787. {
  788. int ret;
  789. dev_info(&client->dev, "GW16083 Ethernet Expansion Mezzanine\n");
  790. if (gw16083_client) {
  791. dev_err(&client->dev, "client already registered\n");
  792. return -EINVAL;
  793. }
  794. gw16083_client = client;
  795. ret = phy_driver_register(&mv88e6176_phy_driver);
  796. if (ret)
  797. dev_err(&client->dev,
  798. "failed to register mv88e6176 phy driver: %d\n", ret);
  799. return ret;
  800. }
  801. static int gw16083_remove(struct i2c_client *client)
  802. {
  803. dev_dbg(&client->dev, "%s\n", __func__);
  804. phy_driver_unregister(&mv88e6176_phy_driver);
  805. gw16083_client = NULL;
  806. return 0;
  807. }
  808. static const struct of_device_id gw16083_dt_ids[] = {
  809. { .compatible = "gateworks,gw16083", },
  810. { }
  811. };
  812. MODULE_DEVICE_TABLE(of, gw16083_dt_ids);
  813. static const struct i2c_device_id gw16083_id[] = {
  814. { "gw16083", 0 },
  815. { }
  816. };
  817. MODULE_DEVICE_TABLE(i2c, gw16083_id);
  818. static struct i2c_driver gw16083_driver = {
  819. .driver = {
  820. .name = "gw16083",
  821. .of_match_table = gw16083_dt_ids,
  822. },
  823. .probe = gw16083_probe,
  824. .remove = gw16083_remove,
  825. .id_table = gw16083_id,
  826. };
  827. static int __init mv88e6176_init(void)
  828. {
  829. return i2c_add_driver(&gw16083_driver);
  830. }
  831. static void __exit mv88e6176_exit(void)
  832. {
  833. i2c_del_driver(&gw16083_driver);
  834. }
  835. module_init(mv88e6176_init);
  836. module_exit(mv88e6176_exit);