qcom-ipq4018-a42.dts 4.2 KB

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  1. /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
  2. * Copyright (c) 2017, Sven Eckelmann <[email protected]>
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. *
  16. */
  17. #include "qcom-ipq4019.dtsi"
  18. #include <dt-bindings/gpio/gpio.h>
  19. #include <dt-bindings/input/input.h>
  20. #include <dt-bindings/soc/qcom,tcsr.h>
  21. / {
  22. model = "OpenMesh A42";
  23. compatible = "openmesh,a42", "qcom,ipq4019";
  24. soc {
  25. mdio@90000 {
  26. status = "okay";
  27. };
  28. ess-psgmii@98000 {
  29. status = "okay";
  30. };
  31. tcsr@194b000 {
  32. /* select hostmode */
  33. compatible = "qcom,tcsr";
  34. reg = <0x194b000 0x100>;
  35. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  36. status = "okay";
  37. };
  38. tcsr@1949000 {
  39. compatible = "qcom,tcsr";
  40. reg = <0x1949000 0x100>;
  41. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  42. };
  43. ess_tcsr@1953000 {
  44. compatible = "qcom,tcsr";
  45. reg = <0x1953000 0x1000>;
  46. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  47. };
  48. tcsr@1957000 {
  49. compatible = "qcom,tcsr";
  50. reg = <0x1957000 0x100>;
  51. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  52. };
  53. usb2: usb2@60f8800 {
  54. status = "okay";
  55. };
  56. serial@78af000 {
  57. pinctrl-0 = <&serial_pins>;
  58. pinctrl-names = "default";
  59. status = "okay";
  60. };
  61. crypto@8e3a000 {
  62. status = "okay";
  63. };
  64. watchdog@b017000 {
  65. status = "okay";
  66. };
  67. ess-switch@c000000 {
  68. status = "okay";
  69. };
  70. edma@c080000 {
  71. status = "okay";
  72. };
  73. };
  74. gpio-keys {
  75. compatible = "gpio-keys";
  76. reset {
  77. label = "reset";
  78. gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
  79. linux,code = <KEY_RESTART>;
  80. };
  81. };
  82. aliases {
  83. led-boot = &power;
  84. led-failsafe = &power;
  85. led-running = &power;
  86. led-upgrade = &power;
  87. };
  88. gpio-leds {
  89. compatible = "gpio-leds";
  90. red {
  91. label = "a42:red:status";
  92. gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
  93. linux,default-trigger = "default-off";
  94. };
  95. power: green {
  96. label = "a42:green:status";
  97. gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
  98. };
  99. blue {
  100. label = "a42:blue:status";
  101. gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  102. linux,default-trigger = "default-off";
  103. };
  104. };
  105. watchdog {
  106. compatible = "linux,wdt-gpio";
  107. gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  108. hw_algo = "toggle";
  109. /* hw_margin_ms is actually 300s but driver limits it to 60s */
  110. hw_margin_ms = <60000>;
  111. always-running;
  112. };
  113. };
  114. &tlmm {
  115. serial_pins: serial_pinmux {
  116. mux {
  117. pins = "gpio60", "gpio61";
  118. function = "blsp_uart0";
  119. bias-disable;
  120. };
  121. };
  122. spi_0_pins: spi_0_pinmux {
  123. pin {
  124. function = "blsp_spi0";
  125. pins = "gpio55", "gpio56", "gpio57";
  126. drive-strength = <12>;
  127. bias-disable;
  128. };
  129. pin_cs {
  130. function = "gpio";
  131. pins = "gpio54";
  132. drive-strength = <2>;
  133. bias-disable;
  134. output-high;
  135. };
  136. };
  137. };
  138. &blsp_dma {
  139. status = "okay";
  140. };
  141. &spi_0 {
  142. pinctrl-0 = <&spi_0_pins>;
  143. pinctrl-names = "default";
  144. status = "okay";
  145. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
  146. m25p80@0 {
  147. #address-cells = <1>;
  148. #size-cells = <1>;
  149. compatible = "jedec,spi-nor";
  150. reg = <0>;
  151. spi-max-frequency = <24000000>;
  152. /* partitions are passed via bootloader */
  153. };
  154. };
  155. &cryptobam {
  156. status = "okay";
  157. };
  158. &gmac0 {
  159. qcom,phy_mdio_addr = <4>;
  160. qcom,poll_required = <1>;
  161. qcom,forced_speed = <1000>;
  162. qcom,forced_duplex = <1>;
  163. vlan_tag = <2 0x20>;
  164. };
  165. &gmac1 {
  166. qcom,phy_mdio_addr = <3>;
  167. qcom,poll_required = <1>;
  168. qcom,forced_speed = <1000>;
  169. qcom,forced_duplex = <1>;
  170. vlan_tag = <1 0x10>;
  171. };
  172. &usb2_hs_phy {
  173. status = "okay";
  174. };
  175. &wifi0 {
  176. status = "okay";
  177. qcom,ath10k-calibration-variant = "OM-A42";
  178. };
  179. &wifi1 {
  180. status = "okay";
  181. qcom,ath10k-calibration-variant = "OM-A42";
  182. };