qcom-ipq4028-wpj428.dts 5.0 KB

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  1. /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
  2. * Copyright (c) 2017, Christian Mehlis <[email protected]>
  3. * Copyright (c) 2017-2018, Sven Eckelmann <[email protected]>
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. *
  17. */
  18. #include "qcom-ipq4019.dtsi"
  19. #include <dt-bindings/gpio/gpio.h>
  20. #include <dt-bindings/input/input.h>
  21. #include <dt-bindings/soc/qcom,tcsr.h>
  22. / {
  23. model = "Compex WPJ428";
  24. compatible = "compex,wpj428", "qcom,ipq4019";
  25. soc {
  26. mdio@90000 {
  27. status = "okay";
  28. };
  29. ess-psgmii@98000 {
  30. status = "okay";
  31. };
  32. tcsr@194b000 {
  33. /* select hostmode */
  34. compatible = "qcom,tcsr";
  35. reg = <0x194b000 0x100>;
  36. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  37. status = "okay";
  38. };
  39. tcsr@1949000 {
  40. compatible = "qcom,tcsr";
  41. reg = <0x1949000 0x100>;
  42. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  43. };
  44. ess_tcsr@1953000 {
  45. compatible = "qcom,tcsr";
  46. reg = <0x1953000 0x1000>;
  47. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  48. };
  49. tcsr@1957000 {
  50. compatible = "qcom,tcsr";
  51. reg = <0x1957000 0x100>;
  52. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  53. };
  54. usb2: usb2@60f8800 {
  55. status = "okay";
  56. };
  57. serial@78af000 {
  58. pinctrl-0 = <&serial_pins>;
  59. pinctrl-names = "default";
  60. status = "okay";
  61. };
  62. usb3: usb3@8af8800 {
  63. status = "okay";
  64. };
  65. crypto@8e3a000 {
  66. status = "okay";
  67. };
  68. watchdog@b017000 {
  69. status = "okay";
  70. };
  71. ess-switch@c000000 {
  72. switch_lan_bmp = <0x10>;
  73. switch_wan_bmp = <0x20>;
  74. status = "okay";
  75. };
  76. edma@c080000 {
  77. status = "okay";
  78. };
  79. };
  80. gpio-keys {
  81. compatible = "gpio-keys";
  82. reset {
  83. label = "reset";
  84. gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  85. linux,code = <KEY_RESTART>;
  86. };
  87. };
  88. aliases {
  89. led-boot = &status;
  90. led-failsafe = &status;
  91. led-upgrade = &status;
  92. };
  93. gpio-leds {
  94. compatible = "gpio-leds";
  95. status: rss4 {
  96. label = "wpj428:green:rss4";
  97. gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
  98. default-state = "off";
  99. };
  100. rss3 {
  101. label = "wpj428:green:rss3";
  102. gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
  103. default-state = "off";
  104. };
  105. };
  106. beeper: beeper {
  107. compatible = "gpio-beeper";
  108. gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
  109. };
  110. };
  111. &tlmm {
  112. serial_pins: serial_pinmux {
  113. mux {
  114. pins = "gpio60", "gpio61";
  115. function = "blsp_uart0";
  116. bias-disable;
  117. };
  118. };
  119. spi_0_pins: spi_0_pinmux {
  120. pin {
  121. function = "blsp_spi0";
  122. pins = "gpio55", "gpio56", "gpio57";
  123. drive-strength = <12>;
  124. bias-disable;
  125. };
  126. pin_cs {
  127. function = "gpio";
  128. pins = "gpio54";
  129. drive-strength = <2>;
  130. bias-disable;
  131. output-high;
  132. };
  133. };
  134. };
  135. &blsp_dma {
  136. status = "okay";
  137. };
  138. &spi_0 {
  139. pinctrl-0 = <&spi_0_pins>;
  140. pinctrl-names = "default";
  141. status = "okay";
  142. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
  143. m25p80@0 {
  144. #address-cells = <1>;
  145. #size-cells = <1>;
  146. compatible = "jedec,spi-nor";
  147. reg = <0>;
  148. spi-max-frequency = <24000000>;
  149. partitions {
  150. compatible = "fixed-partitions";
  151. #address-cells = <1>;
  152. #size-cells = <1>;
  153. partition0@0 {
  154. label = "0:SBL1";
  155. reg = <0x00000000 0x00040000>;
  156. read-only;
  157. };
  158. partition1@40000 {
  159. label = "0:MIBIB";
  160. reg = <0x00040000 0x00020000>;
  161. read-only;
  162. };
  163. partition2@60000 {
  164. label = "0:QSEE";
  165. reg = <0x00060000 0x00060000>;
  166. read-only;
  167. };
  168. partition3@c0000 {
  169. label = "0:CDT";
  170. reg = <0x000c0000 0x00010000>;
  171. read-only;
  172. };
  173. partition4@d0000 {
  174. label = "0:DDRPARAMS";
  175. reg = <0x000d0000 0x00010000>;
  176. read-only;
  177. };
  178. partition5@e0000 {
  179. label = "0:APPSBLENV"; /* uboot env*/
  180. reg = <0x000e0000 0x00010000>;
  181. read-only;
  182. };
  183. partition5@f0000 {
  184. label = "0:APPSBL"; /* uboot */
  185. reg = <0x000f0000 0x00080000>;
  186. read-only;
  187. };
  188. partition5@170000 {
  189. label = "0:ART";
  190. reg = <0x00170000 0x00010000>;
  191. read-only;
  192. };
  193. partition6@180000 {
  194. label = "firmware";
  195. reg = <0x00180000 0x01e80000>;
  196. };
  197. };
  198. };
  199. };
  200. &cryptobam {
  201. status = "okay";
  202. };
  203. &gmac0 {
  204. qcom,phy_mdio_addr = <4>;
  205. qcom,poll_required = <1>;
  206. qcom,forced_speed = <1000>;
  207. qcom,forced_duplex = <1>;
  208. vlan_tag = <2 0x20>;
  209. };
  210. &gmac1 {
  211. qcom,phy_mdio_addr = <3>;
  212. qcom,poll_required = <1>;
  213. qcom,forced_speed = <1000>;
  214. qcom,forced_duplex = <1>;
  215. vlan_tag = <1 0x10>;
  216. };
  217. &usb3_ss_phy {
  218. status = "okay";
  219. };
  220. &usb3_hs_phy {
  221. status = "okay";
  222. };
  223. &usb2_hs_phy {
  224. status = "okay";
  225. };
  226. &wifi0 {
  227. status = "okay";
  228. };
  229. &wifi1 {
  230. status = "okay";
  231. };