0050-net-mediatek-add-trgmii-clock.patch 765 B

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  1. From 67c4af99af02d86b627a8cde2e99cc4c9699d2ce Mon Sep 17 00:00:00 2001
  2. From: John Crispin <[email protected]>
  3. Date: Thu, 10 Aug 2017 15:59:08 +0200
  4. Subject: [PATCH 50/57] net: mediatek: add trgmii clock
  5. Signed-off-by: John Crispin <[email protected]>
  6. ---
  7. drivers/net/ethernet/mediatek/mtk_eth_soc.c | 2 ++
  8. 1 file changed, 2 insertions(+)
  9. --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  10. +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  11. @@ -1873,6 +1873,8 @@ static int mtk_hw_init(struct mtk_eth *e
  12. pm_runtime_enable(eth->dev);
  13. pm_runtime_get_sync(eth->dev);
  14. + clk_set_rate(eth->clks[MTK_CLK_TRGPLL], 250000000);
  15. +
  16. clk_prepare_enable(eth->clks[MTK_CLK_ETHIF]);
  17. clk_prepare_enable(eth->clks[MTK_CLK_ESW]);
  18. clk_prepare_enable(eth->clks[MTK_CLK_GP1]);