qcom-ipq4019-a42.dts 4.7 KB

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  1. /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
  2. * Copyright (c) 2017, Sven Eckelmann <[email protected]>
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. *
  16. */
  17. #include "qcom-ipq4019.dtsi"
  18. #include "qcom-ipq4019-bus.dtsi"
  19. #include <dt-bindings/gpio/gpio.h>
  20. #include <dt-bindings/input/input.h>
  21. #include <dt-bindings/soc/qcom,tcsr.h>
  22. / {
  23. model = "OpenMesh A42";
  24. compatible = "openmesh,a42", "qcom,ipq4019";
  25. reserved-memory {
  26. #address-cells = <0x1>;
  27. #size-cells = <0x1>;
  28. ranges;
  29. rsvd1@87000000 {
  30. reg = <0x87000000 0x500000>;
  31. no-map;
  32. };
  33. wifi_dump@87500000 {
  34. reg = <0x87500000 0x600000>;
  35. no-map;
  36. };
  37. rsvd2@87B00000 {
  38. reg = <0x87b00000 0x500000>;
  39. no-map;
  40. };
  41. };
  42. soc {
  43. tcsr@194b000 {
  44. /* select hostmode */
  45. compatible = "qcom,tcsr";
  46. reg = <0x194b000 0x100>;
  47. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  48. status = "ok";
  49. };
  50. ess_tcsr@1953000 {
  51. compatible = "qcom,tcsr";
  52. reg = <0x1953000 0x1000>;
  53. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  54. };
  55. tcsr@1949000 {
  56. compatible = "qcom,tcsr";
  57. reg = <0x1949000 0x100>;
  58. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  59. };
  60. tcsr@1957000 {
  61. compatible = "qcom,tcsr";
  62. reg = <0x1957000 0x100>;
  63. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  64. };
  65. pinctrl@1000000 {
  66. serial_pins: serial_pinmux {
  67. mux {
  68. pins = "gpio60", "gpio61";
  69. function = "blsp_uart0";
  70. bias-disable;
  71. };
  72. };
  73. spi_0_pins: spi_0_pinmux {
  74. pinmux {
  75. function = "blsp_spi0";
  76. pins = "gpio55", "gpio56", "gpio57";
  77. };
  78. pinmux_cs {
  79. function = "gpio";
  80. pins = "gpio54";
  81. };
  82. pinconf {
  83. pins = "gpio55", "gpio56", "gpio57";
  84. drive-strength = <12>;
  85. bias-disable;
  86. };
  87. pinconf_cs {
  88. pins = "gpio54";
  89. drive-strength = <2>;
  90. bias-disable;
  91. output-high;
  92. };
  93. };
  94. };
  95. blsp_dma: dma@7884000 {
  96. status = "ok";
  97. };
  98. spi_0: spi@78b5000 {
  99. pinctrl-0 = <&spi_0_pins>;
  100. pinctrl-names = "default";
  101. status = "ok";
  102. cs-gpios = <&tlmm 54 0>;
  103. m25p80@0 {
  104. #address-cells = <1>;
  105. #size-cells = <1>;
  106. compatible = "jedec,spi-nor";
  107. reg = <0>;
  108. spi-max-frequency = <24000000>;
  109. /* partitions are passed via bootloader */
  110. };
  111. };
  112. serial@78af000 {
  113. pinctrl-0 = <&serial_pins>;
  114. pinctrl-names = "default";
  115. status = "ok";
  116. };
  117. cryptobam: dma@8e04000 {
  118. status = "ok";
  119. };
  120. crypto@8e3a000 {
  121. status = "ok";
  122. };
  123. watchdog@b017000 {
  124. status = "ok";
  125. };
  126. usb2_hs_phy: hsphy@a8000 {
  127. status = "ok";
  128. };
  129. usb2: usb2@60f8800 {
  130. status = "ok";
  131. };
  132. mdio@90000 {
  133. status = "okay";
  134. };
  135. ess-switch@c000000 {
  136. status = "okay";
  137. };
  138. ess-psgmii@98000 {
  139. status = "okay";
  140. };
  141. edma@c080000 {
  142. status = "okay";
  143. };
  144. wifi@a000000 {
  145. status = "okay";
  146. qcom,ath10k-calibration-variant = "OM-A42";
  147. };
  148. wifi@a800000 {
  149. status = "okay";
  150. qcom,ath10k-calibration-variant = "OM-A42";
  151. };
  152. };
  153. gpio-keys {
  154. compatible = "gpio-keys";
  155. reset {
  156. label = "reset";
  157. gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
  158. linux,code = <KEY_RESTART>;
  159. };
  160. };
  161. aliases {
  162. led-boot = &power;
  163. led-failsafe = &power;
  164. led-running = &power;
  165. led-upgrade = &power;
  166. };
  167. gpio-leds {
  168. compatible = "gpio-leds";
  169. red {
  170. label = "a42:red:status";
  171. gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
  172. linux,default-trigger = "default-off";
  173. };
  174. power: green {
  175. label = "a42:green:status";
  176. gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
  177. };
  178. blue {
  179. label = "a42:blue:status";
  180. gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  181. linux,default-trigger = "default-off";
  182. };
  183. };
  184. watchdog {
  185. compatible = "linux,wdt-gpio";
  186. gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  187. hw_algo = "toggle";
  188. /* hw_margin_ms is actually 300s but driver limits it to 60s */
  189. hw_margin_ms = <60000>;
  190. always-running;
  191. };
  192. };
  193. &gmac0 {
  194. qcom,phy_mdio_addr = <4>;
  195. qcom,poll_required = <1>;
  196. qcom,forced_speed = <1000>;
  197. qcom,forced_duplex = <1>;
  198. vlan_tag = <2 0x20>;
  199. };
  200. &gmac1 {
  201. qcom,phy_mdio_addr = <3>;
  202. qcom,poll_required = <1>;
  203. qcom,forced_speed = <1000>;
  204. qcom,forced_duplex = <1>;
  205. vlan_tag = <1 0x10>;
  206. };