0019-qcom-ipq4019-use-correct-clock-for-i2c-bus-0.patch 891 B

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  1. From 7292bf171cdf2fb48607058f12ddd0d812a87428 Mon Sep 17 00:00:00 2001
  2. From: Matthew McClintock <[email protected]>
  3. Date: Fri, 29 Apr 2016 12:48:02 -0500
  4. Subject: [PATCH 19/69] qcom: ipq4019: use correct clock for i2c bus 0
  5. For the record the mapping is as follows:
  6. QUP0 = SPI QUP1
  7. QUP1 = SPI QUP2
  8. QUP2 = I2C QUP1
  9. QUP3 = I2C QUP2
  10. Signed-off-by: Matthew McClintock <[email protected]>
  11. ---
  12. arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
  13. 1 file changed, 1 insertion(+), 1 deletion(-)
  14. --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
  15. +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
  16. @@ -175,7 +175,7 @@
  17. reg = <0x78b7000 0x6000>;
  18. interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
  19. clocks = <&gcc GCC_BLSP1_AHB_CLK>,
  20. - <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
  21. + <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
  22. clock-names = "iface", "core";
  23. #address-cells = <1>;
  24. #size-cells = <0>;