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- From 85a9cab9b9bb471eae016cdbfabd928585c23cce Mon Sep 17 00:00:00 2001
- From: Robert Marko <[email protected]>
- Date: Mon, 4 Jul 2022 13:33:18 +0200
- Subject: [PATCH] arm64: dts: qcom: ipq8074: move ARMv8 timer out of SoC node
- The ARM timer is usually considered not part of SoC node, just like
- other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning:
- arch/arm64/boot/dts/qcom/ipq8072-ax9000.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'}
- From schema: dtschema/schemas/simple-bus.yaml
- Signed-off-by: Robert Marko <[email protected]>
- Acked-by: Krzysztof Kozlowski <[email protected]>
- [bjorn: Moved node after "soc" for alphabetical ordering]
- Signed-off-by: Bjorn Andersson <[email protected]>
- Link: https://lore.kernel.org/r/[email protected]
- ---
- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
- --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
- +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
- @@ -654,14 +654,6 @@
- };
- };
-
- - timer {
- - compatible = "arm,armv8-timer";
- - interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- - <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- - <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- - <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- - };
- -
- watchdog: watchdog@b017000 {
- compatible = "qcom,kpss-wdt";
- reg = <0xb017000 0x1000>;
- @@ -853,4 +845,12 @@
- status = "disabled";
- };
- };
- +
- + timer {
- + compatible = "arm,armv8-timer";
- + interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- + <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- + <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- + <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- + };
- };
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