0076-v5.16-PCI-qcom-Replace-ops-with-struct-pcie_cfg-in-pcie-ma.patch 4.0 KB

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  1. From 180ce25d5c3ccff206f084b7ab350778641d1b1c Mon Sep 17 00:00:00 2001
  2. From: Prasad Malisetty <[email protected]>
  3. Date: Thu, 7 Oct 2021 23:18:42 +0530
  4. Subject: [PATCH] PCI: qcom: Replace ops with struct pcie_cfg in pcie match
  5. data
  6. Add struct qcom_pcie_cfg as match data for all platforms. Assign
  7. appropriate platform ops into struct qcom_pcie_cfg and read using
  8. of_device_get_match_data() in qcom_pcie_probe().
  9. Link: https://lore.kernel.org/r/[email protected]
  10. Signed-off-by: Prasad Malisetty <[email protected]>
  11. Signed-off-by: Lorenzo Pieralisi <[email protected]>
  12. Signed-off-by: Bjorn Helgaas <[email protected]>
  13. Reviewed-by: Stephen Boyd <[email protected]>
  14. ---
  15. drivers/pci/controller/dwc/pcie-qcom.c | 66 +++++++++++++++++++++-----
  16. 1 file changed, 55 insertions(+), 11 deletions(-)
  17. --- a/drivers/pci/controller/dwc/pcie-qcom.c
  18. +++ b/drivers/pci/controller/dwc/pcie-qcom.c
  19. @@ -202,6 +202,10 @@ struct qcom_pcie_ops {
  20. int (*config_sid)(struct qcom_pcie *pcie);
  21. };
  22. +struct qcom_pcie_cfg {
  23. + const struct qcom_pcie_ops *ops;
  24. +};
  25. +
  26. struct qcom_pcie {
  27. struct dw_pcie *pci;
  28. void __iomem *parf; /* DT parf */
  29. @@ -1467,6 +1471,38 @@ static const struct qcom_pcie_ops ops_1_
  30. .config_sid = qcom_pcie_config_sid_sm8250,
  31. };
  32. +static const struct qcom_pcie_cfg apq8084_cfg = {
  33. + .ops = &ops_1_0_0,
  34. +};
  35. +
  36. +static const struct qcom_pcie_cfg ipq8064_cfg = {
  37. + .ops = &ops_2_1_0,
  38. +};
  39. +
  40. +static const struct qcom_pcie_cfg msm8996_cfg = {
  41. + .ops = &ops_2_3_2,
  42. +};
  43. +
  44. +static const struct qcom_pcie_cfg ipq8074_cfg = {
  45. + .ops = &ops_2_3_3,
  46. +};
  47. +
  48. +static const struct qcom_pcie_cfg ipq4019_cfg = {
  49. + .ops = &ops_2_4_0,
  50. +};
  51. +
  52. +static const struct qcom_pcie_cfg sdm845_cfg = {
  53. + .ops = &ops_2_7_0,
  54. +};
  55. +
  56. +static const struct qcom_pcie_cfg sm8250_cfg = {
  57. + .ops = &ops_1_9_0,
  58. +};
  59. +
  60. +static const struct qcom_pcie_cfg sc7280_cfg = {
  61. + .ops = &ops_1_9_0,
  62. +};
  63. +
  64. static const struct dw_pcie_ops dw_pcie_ops = {
  65. .link_up = qcom_pcie_link_up,
  66. .start_link = qcom_pcie_start_link,
  67. @@ -1478,6 +1514,7 @@ static int qcom_pcie_probe(struct platfo
  68. struct pcie_port *pp;
  69. struct dw_pcie *pci;
  70. struct qcom_pcie *pcie;
  71. + const struct qcom_pcie_cfg *pcie_cfg;
  72. int ret;
  73. pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
  74. @@ -1499,7 +1536,13 @@ static int qcom_pcie_probe(struct platfo
  75. pcie->pci = pci;
  76. - pcie->ops = of_device_get_match_data(dev);
  77. + pcie_cfg = of_device_get_match_data(dev);
  78. + if (!pcie_cfg || !pcie_cfg->ops) {
  79. + dev_err(dev, "Invalid platform data\n");
  80. + return -EINVAL;
  81. + }
  82. +
  83. + pcie->ops = pcie_cfg->ops;
  84. pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_HIGH);
  85. if (IS_ERR(pcie->reset)) {
  86. @@ -1555,16 +1598,17 @@ err_pm_runtime_put:
  87. }
  88. static const struct of_device_id qcom_pcie_match[] = {
  89. - { .compatible = "qcom,pcie-apq8084", .data = &ops_1_0_0 },
  90. - { .compatible = "qcom,pcie-ipq8064", .data = &ops_2_1_0 },
  91. - { .compatible = "qcom,pcie-ipq8064-v2", .data = &ops_2_1_0 },
  92. - { .compatible = "qcom,pcie-apq8064", .data = &ops_2_1_0 },
  93. - { .compatible = "qcom,pcie-msm8996", .data = &ops_2_3_2 },
  94. - { .compatible = "qcom,pcie-ipq8074", .data = &ops_2_3_3 },
  95. - { .compatible = "qcom,pcie-ipq4019", .data = &ops_2_4_0 },
  96. - { .compatible = "qcom,pcie-qcs404", .data = &ops_2_4_0 },
  97. - { .compatible = "qcom,pcie-sdm845", .data = &ops_2_7_0 },
  98. - { .compatible = "qcom,pcie-sm8250", .data = &ops_1_9_0 },
  99. + { .compatible = "qcom,pcie-apq8084", .data = &apq8084_cfg },
  100. + { .compatible = "qcom,pcie-ipq8064", .data = &ipq8064_cfg },
  101. + { .compatible = "qcom,pcie-ipq8064-v2", .data = &ipq8064_cfg },
  102. + { .compatible = "qcom,pcie-apq8064", .data = &ipq8064_cfg },
  103. + { .compatible = "qcom,pcie-msm8996", .data = &msm8996_cfg },
  104. + { .compatible = "qcom,pcie-ipq8074", .data = &ipq8074_cfg },
  105. + { .compatible = "qcom,pcie-ipq4019", .data = &ipq4019_cfg },
  106. + { .compatible = "qcom,pcie-qcs404", .data = &ipq4019_cfg },
  107. + { .compatible = "qcom,pcie-sdm845", .data = &sdm845_cfg },
  108. + { .compatible = "qcom,pcie-sm8250", .data = &sm8250_cfg },
  109. + { .compatible = "qcom,pcie-sc7280", .data = &sc7280_cfg },
  110. { }
  111. };