ramips.c 14 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License as published by
  4. * the Free Software Foundation; version 2 of the License
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  14. *
  15. * Copyright (C) 2009 John Crispin <[email protected]>
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/types.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/init.h>
  22. #include <linux/skbuff.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/ethtool.h>
  25. #include <linux/platform_device.h>
  26. #include <ramips_eth_platform.h>
  27. #include "ramips_eth.h"
  28. #define TX_TIMEOUT (20 * HZ / 100)
  29. #define MAX_RX_LENGTH 1600
  30. #ifdef CONFIG_RALINK_RT305X
  31. #include "ramips_esw.c"
  32. #endif
  33. #define phys_to_bus(a) (a & 0x1FFFFFFF)
  34. static struct net_device * ramips_dev;
  35. static void __iomem *ramips_fe_base = 0;
  36. static inline void
  37. ramips_fe_wr(u32 val, unsigned reg)
  38. {
  39. __raw_writel(val, ramips_fe_base + reg);
  40. }
  41. static inline u32
  42. ramips_fe_rr(unsigned reg)
  43. {
  44. return __raw_readl(ramips_fe_base + reg);
  45. }
  46. static inline void
  47. ramips_fe_int_disable(u32 mask)
  48. {
  49. ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) & ~mask,
  50. RAMIPS_FE_INT_ENABLE);
  51. /* flush write */
  52. ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
  53. }
  54. static inline void
  55. ramips_fe_int_enable(u32 mask)
  56. {
  57. ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) | mask,
  58. RAMIPS_FE_INT_ENABLE);
  59. /* flush write */
  60. ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
  61. }
  62. static inline void
  63. ramips_hw_set_macaddr(unsigned char *mac)
  64. {
  65. ramips_fe_wr((mac[0] << 8) | mac[1], RAMIPS_GDMA1_MAC_ADRH);
  66. ramips_fe_wr((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
  67. RAMIPS_GDMA1_MAC_ADRL);
  68. }
  69. #ifdef CONFIG_RALINK_RT288X
  70. static void
  71. ramips_setup_mdio_cfg(struct raeth_priv *re)
  72. {
  73. unsigned int mdio_cfg;
  74. mdio_cfg = RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
  75. RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
  76. RAMIPS_MDIO_CFG_GP1_FRC_EN;
  77. if (re->duplex == DUPLEX_FULL)
  78. mdio_cfg |= RAMIPS_MDIO_CFG_GP1_DUPLEX;
  79. if (re->tx_fc)
  80. mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_TX;
  81. if (re->rx_fc)
  82. mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_RX;
  83. switch (re->speed) {
  84. case SPEED_10:
  85. mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_10;
  86. break;
  87. case SPEED_100:
  88. mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_100;
  89. break;
  90. case SPEED_1000:
  91. mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_1000;
  92. break;
  93. default:
  94. BUG();
  95. }
  96. ramips_fe_wr(mdio_cfg, RAMIPS_MDIO_CFG);
  97. }
  98. #else
  99. static inline void ramips_setup_mdio_cfg(struct raeth_priv *re)
  100. {
  101. }
  102. #endif /* CONFIG_RALINK_RT288X */
  103. static void
  104. ramips_cleanup_dma(struct raeth_priv *re)
  105. {
  106. int i;
  107. for (i = 0; i < NUM_RX_DESC; i++)
  108. if (re->rx_skb[i])
  109. dev_kfree_skb_any(re->rx_skb[i]);
  110. if (re->rx)
  111. dma_free_coherent(NULL,
  112. NUM_RX_DESC * sizeof(struct ramips_rx_dma),
  113. re->rx, re->phy_rx);
  114. if (re->tx)
  115. dma_free_coherent(NULL,
  116. NUM_TX_DESC * sizeof(struct ramips_tx_dma),
  117. re->tx, re->phy_tx);
  118. }
  119. static int
  120. ramips_alloc_dma(struct raeth_priv *re)
  121. {
  122. int err = -ENOMEM;
  123. int i;
  124. re->skb_free_idx = 0;
  125. /* setup tx ring */
  126. re->tx = dma_alloc_coherent(NULL,
  127. NUM_TX_DESC * sizeof(struct ramips_tx_dma),
  128. &re->phy_tx, GFP_ATOMIC);
  129. if (!re->tx)
  130. goto err_cleanup;
  131. memset(re->tx, 0, NUM_TX_DESC * sizeof(struct ramips_tx_dma));
  132. for (i = 0; i < NUM_TX_DESC; i++) {
  133. re->tx[i].txd2 = TX_DMA_LSO | TX_DMA_DONE;
  134. re->tx[i].txd4 = TX_DMA_QN(3) | TX_DMA_PN(1);
  135. }
  136. /* setup rx ring */
  137. re->rx = dma_alloc_coherent(NULL,
  138. NUM_RX_DESC * sizeof(struct ramips_rx_dma),
  139. &re->phy_rx, GFP_ATOMIC);
  140. if (!re->rx)
  141. goto err_cleanup;
  142. memset(re->rx, 0, sizeof(struct ramips_rx_dma) * NUM_RX_DESC);
  143. for (i = 0; i < NUM_RX_DESC; i++) {
  144. struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_LENGTH +
  145. NET_IP_ALIGN);
  146. if (!new_skb)
  147. goto err_cleanup;
  148. skb_reserve(new_skb, NET_IP_ALIGN);
  149. re->rx[i].rxd1 = dma_map_single(NULL,
  150. new_skb->data,
  151. MAX_RX_LENGTH,
  152. DMA_FROM_DEVICE);
  153. re->rx[i].rxd2 |= RX_DMA_LSO;
  154. re->rx_skb[i] = new_skb;
  155. }
  156. return 0;
  157. err_cleanup:
  158. ramips_cleanup_dma(re);
  159. return err;
  160. }
  161. static void
  162. ramips_setup_dma(struct raeth_priv *re)
  163. {
  164. ramips_fe_wr(phys_to_bus(re->phy_tx), RAMIPS_TX_BASE_PTR0);
  165. ramips_fe_wr(NUM_TX_DESC, RAMIPS_TX_MAX_CNT0);
  166. ramips_fe_wr(0, RAMIPS_TX_CTX_IDX0);
  167. ramips_fe_wr(RAMIPS_PST_DTX_IDX0, RAMIPS_PDMA_RST_CFG);
  168. ramips_fe_wr(phys_to_bus(re->phy_rx), RAMIPS_RX_BASE_PTR0);
  169. ramips_fe_wr(NUM_RX_DESC, RAMIPS_RX_MAX_CNT0);
  170. ramips_fe_wr((NUM_RX_DESC - 1), RAMIPS_RX_CALC_IDX0);
  171. ramips_fe_wr(RAMIPS_PST_DRX_IDX0, RAMIPS_PDMA_RST_CFG);
  172. }
  173. static int
  174. ramips_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  175. {
  176. struct raeth_priv *priv = netdev_priv(dev);
  177. unsigned long tx;
  178. unsigned int tx_next;
  179. unsigned int mapped_addr;
  180. unsigned long flags;
  181. if (priv->plat->min_pkt_len) {
  182. if (skb->len < priv->plat->min_pkt_len) {
  183. if (skb_padto(skb, priv->plat->min_pkt_len)) {
  184. printk(KERN_ERR
  185. "ramips_eth: skb_padto failed\n");
  186. kfree_skb(skb);
  187. return 0;
  188. }
  189. skb_put(skb, priv->plat->min_pkt_len - skb->len);
  190. }
  191. }
  192. dev->trans_start = jiffies;
  193. mapped_addr = (unsigned int) dma_map_single(NULL, skb->data, skb->len,
  194. DMA_TO_DEVICE);
  195. dma_sync_single_for_device(NULL, mapped_addr, skb->len, DMA_TO_DEVICE);
  196. spin_lock_irqsave(&priv->page_lock, flags);
  197. tx = ramips_fe_rr(RAMIPS_TX_CTX_IDX0);
  198. tx_next = (tx + 1) % NUM_TX_DESC;
  199. if ((priv->tx_skb[tx]) || (priv->tx_skb[tx_next]) ||
  200. !(priv->tx[tx].txd2 & TX_DMA_DONE) ||
  201. !(priv->tx[tx_next].txd2 & TX_DMA_DONE))
  202. goto out;
  203. priv->tx[tx].txd1 = mapped_addr;
  204. priv->tx[tx].txd2 &= ~(TX_DMA_PLEN0_MASK | TX_DMA_DONE);
  205. priv->tx[tx].txd2 |= TX_DMA_PLEN0(skb->len);
  206. dev->stats.tx_packets++;
  207. dev->stats.tx_bytes += skb->len;
  208. priv->tx_skb[tx] = skb;
  209. wmb();
  210. ramips_fe_wr(tx_next, RAMIPS_TX_CTX_IDX0);
  211. spin_unlock_irqrestore(&priv->page_lock, flags);
  212. return NETDEV_TX_OK;
  213. out:
  214. spin_unlock_irqrestore(&priv->page_lock, flags);
  215. dev->stats.tx_dropped++;
  216. kfree_skb(skb);
  217. return NETDEV_TX_OK;
  218. }
  219. static void
  220. ramips_eth_rx_hw(unsigned long ptr)
  221. {
  222. struct net_device *dev = (struct net_device *) ptr;
  223. struct raeth_priv *priv = netdev_priv(dev);
  224. int rx;
  225. int max_rx = 16;
  226. while (max_rx) {
  227. struct sk_buff *rx_skb, *new_skb;
  228. rx = (ramips_fe_rr(RAMIPS_RX_CALC_IDX0) + 1) % NUM_RX_DESC;
  229. if (!(priv->rx[rx].rxd2 & RX_DMA_DONE))
  230. break;
  231. max_rx--;
  232. new_skb = netdev_alloc_skb(dev, MAX_RX_LENGTH + NET_IP_ALIGN);
  233. /* Reuse the buffer on allocation failures */
  234. if (new_skb) {
  235. rx_skb = priv->rx_skb[rx];
  236. skb_put(rx_skb, RX_DMA_PLEN0(priv->rx[rx].rxd2));
  237. rx_skb->dev = dev;
  238. rx_skb->protocol = eth_type_trans(rx_skb, dev);
  239. rx_skb->ip_summed = CHECKSUM_NONE;
  240. dev->stats.rx_packets++;
  241. dev->stats.rx_bytes += rx_skb->len;
  242. netif_rx(rx_skb);
  243. priv->rx_skb[rx] = new_skb;
  244. skb_reserve(new_skb, NET_IP_ALIGN);
  245. priv->rx[rx].rxd1 = dma_map_single(NULL,
  246. new_skb->data,
  247. MAX_RX_LENGTH,
  248. DMA_FROM_DEVICE);
  249. }
  250. priv->rx[rx].rxd2 &= ~RX_DMA_DONE;
  251. wmb();
  252. ramips_fe_wr(rx, RAMIPS_RX_CALC_IDX0);
  253. }
  254. if (max_rx == 0)
  255. tasklet_schedule(&priv->rx_tasklet);
  256. else
  257. ramips_fe_int_enable(RAMIPS_RX_DLY_INT);
  258. }
  259. static void
  260. ramips_eth_tx_housekeeping(unsigned long ptr)
  261. {
  262. struct net_device *dev = (struct net_device*)ptr;
  263. struct raeth_priv *priv = netdev_priv(dev);
  264. while ((priv->tx[priv->skb_free_idx].txd2 & TX_DMA_DONE) &&
  265. (priv->tx_skb[priv->skb_free_idx])) {
  266. dev_kfree_skb_irq(priv->tx_skb[priv->skb_free_idx]);
  267. priv->tx_skb[priv->skb_free_idx] = 0;
  268. priv->skb_free_idx++;
  269. if (priv->skb_free_idx >= NUM_TX_DESC)
  270. priv->skb_free_idx = 0;
  271. }
  272. ramips_fe_int_enable(RAMIPS_TX_DLY_INT);
  273. }
  274. static void
  275. ramips_eth_timeout(struct net_device *dev)
  276. {
  277. struct raeth_priv *priv = netdev_priv(dev);
  278. tasklet_schedule(&priv->tx_housekeeping_tasklet);
  279. }
  280. static irqreturn_t
  281. ramips_eth_irq(int irq, void *dev)
  282. {
  283. struct raeth_priv *priv = netdev_priv(dev);
  284. unsigned long fe_int = ramips_fe_rr(RAMIPS_FE_INT_STATUS);
  285. ramips_fe_wr(0xFFFFFFFF, RAMIPS_FE_INT_STATUS);
  286. if (fe_int & RAMIPS_RX_DLY_INT) {
  287. ramips_fe_int_disable(RAMIPS_RX_DLY_INT);
  288. tasklet_schedule(&priv->rx_tasklet);
  289. }
  290. if (fe_int & RAMIPS_TX_DLY_INT)
  291. ramips_eth_tx_housekeeping((unsigned long)dev);
  292. return IRQ_HANDLED;
  293. }
  294. static int
  295. ramips_eth_open(struct net_device *dev)
  296. {
  297. struct raeth_priv *priv = netdev_priv(dev);
  298. int err;
  299. err = request_irq(dev->irq, ramips_eth_irq, IRQF_DISABLED,
  300. dev->name, dev);
  301. if (err)
  302. return err;
  303. err = ramips_alloc_dma(priv);
  304. if (err)
  305. goto err_free_irq;
  306. ramips_hw_set_macaddr(dev->dev_addr);
  307. ramips_setup_dma(priv);
  308. ramips_fe_wr((ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) & 0xff) |
  309. (RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN |
  310. RAMIPS_TX_DMA_EN | RAMIPS_PDMA_SIZE_4DWORDS),
  311. RAMIPS_PDMA_GLO_CFG);
  312. ramips_fe_wr((ramips_fe_rr(RAMIPS_FE_GLO_CFG) &
  313. ~(RAMIPS_US_CYC_CNT_MASK << RAMIPS_US_CYC_CNT_SHIFT)) |
  314. ((priv->plat->sys_freq / RAMIPS_US_CYC_CNT_DIVISOR) << RAMIPS_US_CYC_CNT_SHIFT),
  315. RAMIPS_FE_GLO_CFG);
  316. tasklet_init(&priv->tx_housekeeping_tasklet, ramips_eth_tx_housekeeping,
  317. (unsigned long)dev);
  318. tasklet_init(&priv->rx_tasklet, ramips_eth_rx_hw, (unsigned long)dev);
  319. ramips_setup_mdio_cfg(priv);
  320. ramips_fe_wr(RAMIPS_DELAY_INIT, RAMIPS_DLY_INT_CFG);
  321. ramips_fe_wr(RAMIPS_TX_DLY_INT | RAMIPS_RX_DLY_INT, RAMIPS_FE_INT_ENABLE);
  322. ramips_fe_wr(ramips_fe_rr(RAMIPS_GDMA1_FWD_CFG) &
  323. ~(RAMIPS_GDM1_ICS_EN | RAMIPS_GDM1_TCS_EN | RAMIPS_GDM1_UCS_EN | 0xffff),
  324. RAMIPS_GDMA1_FWD_CFG);
  325. ramips_fe_wr(ramips_fe_rr(RAMIPS_CDMA_CSG_CFG) &
  326. ~(RAMIPS_ICS_GEN_EN | RAMIPS_TCS_GEN_EN | RAMIPS_UCS_GEN_EN),
  327. RAMIPS_CDMA_CSG_CFG);
  328. ramips_fe_wr(RAMIPS_PSE_FQFC_CFG_INIT, RAMIPS_PSE_FQ_CFG);
  329. ramips_fe_wr(1, RAMIPS_FE_RST_GL);
  330. ramips_fe_wr(0, RAMIPS_FE_RST_GL);
  331. netif_start_queue(dev);
  332. return 0;
  333. err_free_irq:
  334. free_irq(dev->irq, dev);
  335. return err;
  336. }
  337. static int
  338. ramips_eth_stop(struct net_device *dev)
  339. {
  340. struct raeth_priv *priv = netdev_priv(dev);
  341. ramips_fe_wr(ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) &
  342. ~(RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN | RAMIPS_TX_DMA_EN),
  343. RAMIPS_PDMA_GLO_CFG);
  344. /* disable all interrupts in the hw */
  345. ramips_fe_wr(0, RAMIPS_FE_INT_ENABLE);
  346. free_irq(dev->irq, dev);
  347. netif_stop_queue(dev);
  348. tasklet_kill(&priv->tx_housekeeping_tasklet);
  349. tasklet_kill(&priv->rx_tasklet);
  350. ramips_cleanup_dma(priv);
  351. printk(KERN_DEBUG "ramips_eth: stopped\n");
  352. return 0;
  353. }
  354. static int __init
  355. ramips_eth_probe(struct net_device *dev)
  356. {
  357. struct raeth_priv *priv = netdev_priv(dev);
  358. BUG_ON(!priv->plat->reset_fe);
  359. priv->plat->reset_fe();
  360. net_srandom(jiffies);
  361. memcpy(dev->dev_addr, priv->plat->mac, ETH_ALEN);
  362. ether_setup(dev);
  363. dev->mtu = 1500;
  364. dev->watchdog_timeo = TX_TIMEOUT;
  365. spin_lock_init(&priv->page_lock);
  366. return 0;
  367. }
  368. static const struct net_device_ops ramips_eth_netdev_ops = {
  369. .ndo_init = ramips_eth_probe,
  370. .ndo_open = ramips_eth_open,
  371. .ndo_stop = ramips_eth_stop,
  372. .ndo_start_xmit = ramips_eth_hard_start_xmit,
  373. .ndo_tx_timeout = ramips_eth_timeout,
  374. .ndo_change_mtu = eth_change_mtu,
  375. .ndo_set_mac_address = eth_mac_addr,
  376. .ndo_validate_addr = eth_validate_addr,
  377. };
  378. static int
  379. ramips_eth_plat_probe(struct platform_device *plat)
  380. {
  381. struct raeth_priv *priv;
  382. struct ramips_eth_platform_data *data = plat->dev.platform_data;
  383. struct resource *res;
  384. int err;
  385. if (!data) {
  386. dev_err(&plat->dev, "no platform data specified\n");
  387. return -EINVAL;
  388. }
  389. res = platform_get_resource(plat, IORESOURCE_MEM, 0);
  390. if (!res) {
  391. dev_err(&plat->dev, "no memory resource found\n");
  392. return -ENXIO;
  393. }
  394. ramips_fe_base = ioremap_nocache(res->start, res->end - res->start + 1);
  395. if (!ramips_fe_base)
  396. return -ENOMEM;
  397. ramips_dev = alloc_etherdev(sizeof(struct raeth_priv));
  398. if (!ramips_dev) {
  399. dev_err(&plat->dev, "alloc_etherdev failed\n");
  400. err = -ENOMEM;
  401. goto err_unmap;
  402. }
  403. strcpy(ramips_dev->name, "eth%d");
  404. ramips_dev->irq = platform_get_irq(plat, 0);
  405. if (ramips_dev->irq < 0) {
  406. dev_err(&plat->dev, "no IRQ resource found\n");
  407. err = -ENXIO;
  408. goto err_free_dev;
  409. }
  410. ramips_dev->addr_len = ETH_ALEN;
  411. ramips_dev->base_addr = (unsigned long)ramips_fe_base;
  412. ramips_dev->netdev_ops = &ramips_eth_netdev_ops;
  413. priv = netdev_priv(ramips_dev);
  414. priv->speed = data->speed;
  415. priv->duplex = data->duplex;
  416. priv->rx_fc = data->rx_fc;
  417. priv->tx_fc = data->tx_fc;
  418. priv->plat = data;
  419. err = register_netdev(ramips_dev);
  420. if (err) {
  421. dev_err(&plat->dev, "error bringing up device\n");
  422. goto err_free_dev;
  423. }
  424. #ifdef CONFIG_RALINK_RT305X
  425. rt305x_esw_init();
  426. #endif
  427. printk(KERN_DEBUG "ramips_eth: loaded\n");
  428. return 0;
  429. err_free_dev:
  430. kfree(ramips_dev);
  431. err_unmap:
  432. iounmap(ramips_fe_base);
  433. return err;
  434. }
  435. static int
  436. ramips_eth_plat_remove(struct platform_device *plat)
  437. {
  438. unregister_netdev(ramips_dev);
  439. free_netdev(ramips_dev);
  440. printk(KERN_DEBUG "ramips_eth: unloaded\n");
  441. return 0;
  442. }
  443. static struct platform_driver ramips_eth_driver = {
  444. .probe = ramips_eth_plat_probe,
  445. .remove = ramips_eth_plat_remove,
  446. .driver = {
  447. .name = "ramips_eth",
  448. .owner = THIS_MODULE,
  449. },
  450. };
  451. static int __init
  452. ramips_eth_init(void)
  453. {
  454. int ret = platform_driver_register(&ramips_eth_driver);
  455. if (ret)
  456. printk(KERN_ERR
  457. "ramips_eth: Error registering platfom driver!\n");
  458. return ret;
  459. }
  460. static void __exit
  461. ramips_eth_cleanup(void)
  462. {
  463. platform_driver_unregister(&ramips_eth_driver);
  464. }
  465. module_init(ramips_eth_init);
  466. module_exit(ramips_eth_cleanup);
  467. MODULE_LICENSE("GPL");
  468. MODULE_AUTHOR("John Crispin <[email protected]>");
  469. MODULE_DESCRIPTION("ethernet driver for ramips boards");