qcom-ipq8065-r7800.dts 7.6 KB

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  1. #include "qcom-ipq8065.dtsi"
  2. #include <dt-bindings/input/input.h>
  3. / {
  4. model = "Netgear Nighthawk X4S R7800";
  5. compatible = "netgear,r7800", "qcom,ipq8065", "qcom,ipq8064";
  6. memory@0 {
  7. reg = <0x42000000 0x1e000000>;
  8. device_type = "memory";
  9. };
  10. reserved-memory {
  11. rsvd@5fe00000 {
  12. reg = <0x5fe00000 0x200000>;
  13. reusable;
  14. };
  15. };
  16. aliases {
  17. mdio-gpio0 = &mdio0;
  18. led-boot = &power_white;
  19. led-failsafe = &power_amber;
  20. led-running = &power_white;
  21. led-upgrade = &power_amber;
  22. label-mac-device = &gmac2;
  23. };
  24. keys {
  25. compatible = "gpio-keys";
  26. pinctrl-0 = <&button_pins>;
  27. pinctrl-names = "default";
  28. wifi {
  29. label = "wifi";
  30. gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
  31. linux,code = <KEY_RFKILL>;
  32. debounce-interval = <60>;
  33. wakeup-source;
  34. };
  35. reset {
  36. label = "reset";
  37. gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  38. linux,code = <KEY_RESTART>;
  39. debounce-interval = <60>;
  40. wakeup-source;
  41. };
  42. wps {
  43. label = "wps";
  44. gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
  45. linux,code = <KEY_WPS_BUTTON>;
  46. debounce-interval = <60>;
  47. wakeup-source;
  48. };
  49. };
  50. leds {
  51. compatible = "gpio-leds";
  52. pinctrl-0 = <&led_pins>;
  53. pinctrl-names = "default";
  54. power_white: power_white {
  55. label = "white:power";
  56. gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
  57. default-state = "keep";
  58. };
  59. power_amber: power_amber {
  60. label = "amber:power";
  61. gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  62. };
  63. wan_white {
  64. label = "white:wan";
  65. gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
  66. };
  67. wan_amber {
  68. label = "amber:wan";
  69. gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
  70. };
  71. usb1 {
  72. label = "white:usb1";
  73. gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  74. };
  75. usb2 {
  76. label = "white:usb2";
  77. gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  78. };
  79. esata {
  80. label = "white:esata";
  81. gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
  82. };
  83. wifi {
  84. label = "white:wifi";
  85. gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
  86. };
  87. wps {
  88. label = "white:wps";
  89. gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
  90. };
  91. };
  92. };
  93. &qcom_pinmux {
  94. button_pins: button_pins {
  95. mux {
  96. pins = "gpio6", "gpio54", "gpio65";
  97. function = "gpio";
  98. drive-strength = <2>;
  99. bias-pull-up;
  100. };
  101. };
  102. led_pins: led_pins {
  103. mux {
  104. pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
  105. "gpio24","gpio26", "gpio53", "gpio64";
  106. function = "gpio";
  107. drive-strength = <2>;
  108. bias-pull-down;
  109. };
  110. };
  111. mdio0_pins: mdio0_pins {
  112. clk {
  113. pins = "gpio1";
  114. input-disable;
  115. };
  116. };
  117. rgmii2_pins: rgmii2_pins {
  118. tx {
  119. pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
  120. input-disable;
  121. };
  122. };
  123. spi_pins: spi_pins {
  124. mux {
  125. pins = "gpio18", "gpio19", "gpio21";
  126. function = "gsbi5";
  127. bias-pull-down;
  128. };
  129. data {
  130. pins = "gpio18", "gpio19";
  131. drive-strength = <10>;
  132. };
  133. cs {
  134. pins = "gpio20";
  135. drive-strength = <10>;
  136. bias-pull-up;
  137. };
  138. clk {
  139. pins = "gpio21";
  140. drive-strength = <12>;
  141. };
  142. };
  143. spi6_pins: spi6_pins {
  144. mux {
  145. pins = "gpio55", "gpio56", "gpio58";
  146. function = "gsbi6";
  147. bias-pull-down;
  148. };
  149. mosi {
  150. pins = "gpio55";
  151. drive-strength = <12>;
  152. };
  153. miso {
  154. pins = "gpio56";
  155. drive-strength = <14>;
  156. };
  157. cs {
  158. pins = "gpio57";
  159. drive-strength = <12>;
  160. bias-pull-up;
  161. };
  162. clk {
  163. pins = "gpio58";
  164. drive-strength = <12>;
  165. };
  166. reset {
  167. pins = "gpio33";
  168. drive-strength = <10>;
  169. bias-pull-down;
  170. output-high;
  171. };
  172. };
  173. usb0_pwr_en_pins: usb0_pwr_en_pins {
  174. mux {
  175. pins = "gpio15";
  176. function = "gpio";
  177. drive-strength = <12>;
  178. bias-pull-down;
  179. output-high;
  180. };
  181. };
  182. usb1_pwr_en_pins: usb1_pwr_en_pins {
  183. mux {
  184. pins = "gpio16", "gpio68";
  185. function = "gpio";
  186. drive-strength = <12>;
  187. bias-pull-down;
  188. output-high;
  189. };
  190. };
  191. };
  192. &nand_controller {
  193. status = "okay";
  194. pinctrl-0 = <&nand_pins>;
  195. pinctrl-names = "default";
  196. nand@0 {
  197. reg = <0>;
  198. compatible = "qcom,nandcs";
  199. nand-ecc-strength = <4>;
  200. nand-bus-width = <8>;
  201. nand-ecc-step-size = <512>;
  202. partitions {
  203. compatible = "fixed-partitions";
  204. #address-cells = <1>;
  205. #size-cells = <1>;
  206. qcadata@0 {
  207. label = "qcadata";
  208. reg = <0x0000000 0x0c80000>;
  209. read-only;
  210. };
  211. APPSBL@c80000 {
  212. label = "APPSBL";
  213. reg = <0x0c80000 0x0500000>;
  214. read-only;
  215. };
  216. APPSBLENV@1180000 {
  217. label = "APPSBLENV";
  218. reg = <0x1180000 0x0080000>;
  219. read-only;
  220. };
  221. art: art@1200000 {
  222. label = "art";
  223. reg = <0x1200000 0x0140000>;
  224. read-only;
  225. };
  226. artbak: art@1340000 {
  227. label = "artbak";
  228. reg = <0x1340000 0x0140000>;
  229. read-only;
  230. };
  231. kernel@1480000 {
  232. label = "kernel";
  233. reg = <0x1480000 0x0400000>;
  234. };
  235. ubi@1880000 {
  236. label = "ubi";
  237. reg = <0x1880000 0x6080000>;
  238. };
  239. reserve@7900000 {
  240. label = "reserve";
  241. reg = <0x7900000 0x0700000>;
  242. read-only;
  243. };
  244. };
  245. };
  246. };
  247. &mdio0 {
  248. status = "okay";
  249. pinctrl-0 = <&mdio0_pins>;
  250. pinctrl-names = "default";
  251. phy0: ethernet-phy@0 {
  252. reg = <0>;
  253. qca,ar8327-initvals = <
  254. 0x00004 0x7600000 /* PAD0_MODE */
  255. 0x00008 0x1000000 /* PAD5_MODE */
  256. 0x0000c 0x80 /* PAD6_MODE */
  257. 0x000e4 0xaa545 /* MAC_POWER_SEL */
  258. 0x000e0 0xc74164de /* SGMII_CTRL */
  259. 0x0007c 0x4e /* PORT0_STATUS */
  260. 0x00094 0x4e /* PORT6_STATUS */
  261. 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
  262. 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
  263. 0x00978 0x19008643 /* QM_PORT1_CTRL0 */
  264. 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
  265. 0x00980 0x19008643 /* QM_PORT2_CTRL0 */
  266. 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
  267. 0x00988 0x19008643 /* QM_PORT3_CTRL0 */
  268. 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
  269. 0x00990 0x19008643 /* QM_PORT4_CTRL0 */
  270. 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
  271. 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
  272. 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
  273. 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
  274. 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
  275. >;
  276. qca,ar8327-vlans = <
  277. 0x1 0x5e /* VLAN1 Ports 1/2/3/4/6 */
  278. 0x2 0x21 /* VLAN2 Ports 0/5 */
  279. >;
  280. };
  281. phy4: ethernet-phy@4 {
  282. reg = <4>;
  283. qca,ar8327-initvals = <
  284. 0x000e4 0x6a545 /* MAC_POWER_SEL */
  285. 0x0000c 0x80 /* PAD6_MODE */
  286. >;
  287. };
  288. };
  289. &gmac1 {
  290. status = "okay";
  291. phy-mode = "rgmii";
  292. qcom,id = <1>;
  293. qcom,phy_mdio_addr = <4>;
  294. qcom,poll_required = <0>;
  295. qcom,rgmii_delay = <1>;
  296. qcom,phy_mii_type = <0>;
  297. qcom,emulation = <0>;
  298. qcom,irq = <255>;
  299. mdiobus = <&mdio0>;
  300. pinctrl-0 = <&rgmii2_pins>;
  301. pinctrl-names = "default";
  302. mtd-mac-address = <&art 6>;
  303. fixed-link {
  304. speed = <1000>;
  305. full-duplex;
  306. };
  307. };
  308. &gmac2 {
  309. status = "okay";
  310. phy-mode = "sgmii";
  311. qcom,id = <2>;
  312. qcom,phy_mdio_addr = <0>; /* none */
  313. qcom,poll_required = <0>; /* no polling */
  314. qcom,rgmii_delay = <0>;
  315. qcom,phy_mii_type = <1>;
  316. qcom,emulation = <0>;
  317. qcom,irq = <258>;
  318. mdiobus = <&mdio0>;
  319. mtd-mac-address = <&art 0>;
  320. fixed-link {
  321. speed = <1000>;
  322. full-duplex;
  323. };
  324. };
  325. &adm_dma {
  326. status = "okay";
  327. };
  328. &sata_phy {
  329. status = "okay";
  330. };
  331. &sata {
  332. status = "okay";
  333. };
  334. &usb3_0 {
  335. status = "okay";
  336. pinctrl-0 = <&usb0_pwr_en_pins>;
  337. pinctrl-names = "default";
  338. };
  339. &usb3_1 {
  340. status = "okay";
  341. pinctrl-0 = <&usb1_pwr_en_pins>;
  342. pinctrl-names = "default";
  343. };
  344. &pcie0 {
  345. status = "okay";
  346. bridge@0,0 {
  347. reg = <0x00000000 0 0 0 0>;
  348. #address-cells = <3>;
  349. #size-cells = <2>;
  350. ranges;
  351. wifi@1,0 {
  352. compatible = "pci168c,0046";
  353. reg = <0x00010000 0 0 0 0>;
  354. mtd-mac-address = <&art 6>;
  355. mtd-mac-address-increment = <(1)>;
  356. };
  357. };
  358. };
  359. &pcie1 {
  360. status = "okay";
  361. max-link-speed = <1>;
  362. bridge@0,0 {
  363. reg = <0x00000000 0 0 0 0>;
  364. #address-cells = <3>;
  365. #size-cells = <2>;
  366. ranges;
  367. wifi@1,0 {
  368. compatible = "pci168c,0046";
  369. reg = <0x00010000 0 0 0 0>;
  370. mtd-mac-address = <&art 6>;
  371. mtd-mac-address-increment = <(2)>;
  372. };
  373. };
  374. };