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- From db4cb2248e9d98cc513300964c3ecdc80b8bc364 Mon Sep 17 00:00:00 2001
- From: Dave Stevenson <[email protected]>
- Date: Fri, 3 Jun 2022 16:57:04 +0100
- Subject: [PATCH] drm: vc4: Add 3:3:2 and 4:4:4:4 RGB/RGBX/RGBA formats
- The hardware supports the 332 8bpp and 4:4:4:4 16bpp formats,
- but the table of supported formats didn't include them.
- Add them in.
- In theory they are supported for T-format as well as linear,
- but without a way to test them just add them as linear for now.
- Suggested-by: vrazzer <[email protected]>
- Signed-off-by: Dave Stevenson <[email protected]>
- ---
- drivers/gpu/drm/vc4/vc4_plane.c | 70 +++++++++++++++++++++++++++++++++
- 1 file changed, 70 insertions(+)
- --- a/drivers/gpu/drm/vc4/vc4_plane.c
- +++ b/drivers/gpu/drm/vc4/vc4_plane.c
- @@ -175,6 +175,66 @@ static const struct hvs_format {
- .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR,
- .hvs5_only = true,
- },
- + {
- + .drm = DRM_FORMAT_RGB332,
- + .hvs = HVS_PIXEL_FORMAT_RGB332,
- + .pixel_order = HVS_PIXEL_ORDER_ARGB,
- + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB,
- + },
- + {
- + .drm = DRM_FORMAT_BGR233,
- + .hvs = HVS_PIXEL_FORMAT_RGB332,
- + .pixel_order = HVS_PIXEL_ORDER_ABGR,
- + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR,
- + },
- + {
- + .drm = DRM_FORMAT_XRGB4444,
- + .hvs = HVS_PIXEL_FORMAT_RGBA4444,
- + .pixel_order = HVS_PIXEL_ORDER_ABGR,
- + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB,
- + },
- + {
- + .drm = DRM_FORMAT_ARGB4444,
- + .hvs = HVS_PIXEL_FORMAT_RGBA4444,
- + .pixel_order = HVS_PIXEL_ORDER_ABGR,
- + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB,
- + },
- + {
- + .drm = DRM_FORMAT_XBGR4444,
- + .hvs = HVS_PIXEL_FORMAT_RGBA4444,
- + .pixel_order = HVS_PIXEL_ORDER_ARGB,
- + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR,
- + },
- + {
- + .drm = DRM_FORMAT_ABGR4444,
- + .hvs = HVS_PIXEL_FORMAT_RGBA4444,
- + .pixel_order = HVS_PIXEL_ORDER_ARGB,
- + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR,
- + },
- + {
- + .drm = DRM_FORMAT_BGRX4444,
- + .hvs = HVS_PIXEL_FORMAT_RGBA4444,
- + .pixel_order = HVS_PIXEL_ORDER_RGBA,
- + .pixel_order_hvs5 = HVS_PIXEL_ORDER_BGRA,
- + },
- + {
- + .drm = DRM_FORMAT_BGRA4444,
- + .hvs = HVS_PIXEL_FORMAT_RGBA4444,
- + .pixel_order = HVS_PIXEL_ORDER_RGBA,
- + .pixel_order_hvs5 = HVS_PIXEL_ORDER_BGRA,
- + },
- + {
- + .drm = DRM_FORMAT_RGBX4444,
- + .hvs = HVS_PIXEL_FORMAT_RGBA4444,
- + .pixel_order = HVS_PIXEL_ORDER_BGRA,
- + .pixel_order_hvs5 = HVS_PIXEL_ORDER_RGBA,
- + },
- + {
- + .drm = DRM_FORMAT_RGBA4444,
- + .hvs = HVS_PIXEL_FORMAT_RGBA4444,
- + .pixel_order = HVS_PIXEL_ORDER_BGRA,
- + .pixel_order_hvs5 = HVS_PIXEL_ORDER_RGBA,
- + },
- };
-
- static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
- @@ -1572,6 +1632,16 @@ static bool vc4_format_mod_supported(str
- case DRM_FORMAT_BGRX1010102:
- case DRM_FORMAT_RGBA1010102:
- case DRM_FORMAT_BGRA1010102:
- + case DRM_FORMAT_XRGB4444:
- + case DRM_FORMAT_ARGB4444:
- + case DRM_FORMAT_XBGR4444:
- + case DRM_FORMAT_ABGR4444:
- + case DRM_FORMAT_RGBX4444:
- + case DRM_FORMAT_RGBA4444:
- + case DRM_FORMAT_BGRX4444:
- + case DRM_FORMAT_BGRA4444:
- + case DRM_FORMAT_RGB332:
- + case DRM_FORMAT_BGR233:
- case DRM_FORMAT_YUV422:
- case DRM_FORMAT_YVU422:
- case DRM_FORMAT_YUV420:
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