006-v6.6-arm64-dts-allwinner-h616-Add-OrangePi-Zero-3-board.patch 4.1 KB

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  1. From f1b3ddb3ecc2eec1f912383e01156c226daacfab Mon Sep 17 00:00:00 2001
  2. From: Andre Przywara <[email protected]>
  3. Date: Fri, 4 Aug 2023 18:08:56 +0100
  4. Subject: [PATCH] arm64: dts: allwinner: h616: Add OrangePi Zero 3 board
  5. support
  6. The OrangePi Zero 3 is a development board based on the Allwinner H618 SoC,
  7. which seems to be just an H616 with more L2 cache. The board itself is a
  8. slightly updated version of the Orange Pi Zero 2. It features:
  9. - Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
  10. - 1/1.5/2/4 GiB LPDDR4 DRAM SKUs (only up to 1GB on the Zero2)
  11. - AXP313a PMIC (more capable AXP305 on the Zero2)
  12. - Raspberry-Pi-1 compatible GPIO header
  13. - extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports
  14. - 1 USB 2.0 host port
  15. - 1 USB 2.0 type C port (power supply + OTG)
  16. - MicroSD slot
  17. - on-board 16MiB bootable SPI NOR flash (only 2MB on the Zero2)
  18. - 1Gbps Ethernet port (via Motorcomm YT8531 PHY) (RTL8211 on the Zero2)
  19. - micro-HDMI port
  20. - (yet) unsupported Allwinner WiFi/BT chip
  21. Add the devicetree file describing the currently supported features,
  22. namely LEDs, SD card, PMIC, SPI flash, USB. Ethernet seems unstable at
  23. the moment, though the basic functionality works.
  24. Signed-off-by: Andre Przywara <[email protected]>
  25. Reviewed-by: Jernej Skrabec <[email protected]>
  26. Link: https://lore.kernel.org/r/[email protected]
  27. Signed-off-by: Jernej Skrabec <[email protected]>
  28. ---
  29. arch/arm64/boot/dts/allwinner/Makefile | 1 +
  30. .../allwinner/sun50i-h618-orangepi-zero3.dts | 94 +++++++++++++++++++
  31. 2 files changed, 95 insertions(+)
  32. create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
  33. --- a/arch/arm64/boot/dts/allwinner/Makefile
  34. +++ b/arch/arm64/boot/dts/allwinner/Makefile
  35. @@ -40,3 +40,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-ta
  36. dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
  37. dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
  38. dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
  39. +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb
  40. --- /dev/null
  41. +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
  42. @@ -0,0 +1,94 @@
  43. +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
  44. +/*
  45. + * Copyright (C) 2023 Arm Ltd.
  46. + */
  47. +
  48. +/dts-v1/;
  49. +
  50. +#include "sun50i-h616-orangepi-zero.dtsi"
  51. +
  52. +/ {
  53. + model = "OrangePi Zero3";
  54. + compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
  55. +};
  56. +
  57. +&emac0 {
  58. + phy-supply = <&reg_dldo1>;
  59. +};
  60. +
  61. +&ext_rgmii_phy {
  62. + motorcomm,clk-out-frequency-hz = <125000000>;
  63. +};
  64. +
  65. +&mmc0 {
  66. + /*
  67. + * The schematic shows the card detect pin wired up to PF6, via an
  68. + * inverter, but it just doesn't work.
  69. + */
  70. + broken-cd;
  71. + vmmc-supply = <&reg_dldo1>;
  72. +};
  73. +
  74. +&r_i2c {
  75. + status = "okay";
  76. +
  77. + axp313: pmic@36 {
  78. + compatible = "x-powers,axp313a";
  79. + reg = <0x36>;
  80. + #interrupt-cells = <1>;
  81. + interrupt-controller;
  82. + interrupt-parent = <&pio>;
  83. + interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */
  84. +
  85. + vin1-supply = <&reg_vcc5v>;
  86. + vin2-supply = <&reg_vcc5v>;
  87. + vin3-supply = <&reg_vcc5v>;
  88. +
  89. + regulators {
  90. + /* Supplies VCC-PLL, so needs to be always on. */
  91. + reg_aldo1: aldo1 {
  92. + regulator-always-on;
  93. + regulator-min-microvolt = <1800000>;
  94. + regulator-max-microvolt = <1800000>;
  95. + regulator-name = "vcc1v8";
  96. + };
  97. +
  98. + /* Supplies VCC-IO, so needs to be always on. */
  99. + reg_dldo1: dldo1 {
  100. + regulator-always-on;
  101. + regulator-min-microvolt = <3300000>;
  102. + regulator-max-microvolt = <3300000>;
  103. + regulator-name = "vcc3v3";
  104. + };
  105. +
  106. + reg_dcdc1: dcdc1 {
  107. + regulator-always-on;
  108. + regulator-min-microvolt = <810000>;
  109. + regulator-max-microvolt = <990000>;
  110. + regulator-name = "vdd-gpu-sys";
  111. + };
  112. +
  113. + reg_dcdc2: dcdc2 {
  114. + regulator-always-on;
  115. + regulator-min-microvolt = <810000>;
  116. + regulator-max-microvolt = <1100000>;
  117. + regulator-name = "vdd-cpu";
  118. + };
  119. +
  120. + reg_dcdc3: dcdc3 {
  121. + regulator-always-on;
  122. + regulator-min-microvolt = <1100000>;
  123. + regulator-max-microvolt = <1100000>;
  124. + regulator-name = "vdd-dram";
  125. + };
  126. + };
  127. + };
  128. +};
  129. +
  130. +&pio {
  131. + vcc-pc-supply = <&reg_dldo1>;
  132. + vcc-pf-supply = <&reg_dldo1>;
  133. + vcc-pg-supply = <&reg_aldo1>;
  134. + vcc-ph-supply = <&reg_dldo1>;
  135. + vcc-pi-supply = <&reg_dldo1>;
  136. +};