gpio-rtl8231.c 7.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. #include <linux/gpio/driver.h>
  3. #include <linux/module.h>
  4. #include <linux/platform_device.h>
  5. #include <linux/delay.h>
  6. #include <asm/mach-rtl838x/mach-rtl83xx.h>
  7. /* RTL8231 registers for LED control */
  8. #define RTL8231_LED_FUNC0 0x0000
  9. #define RTL8231_GPIO_PIN_SEL(gpio) ((0x0002) + ((gpio) >> 4))
  10. #define RTL8231_GPIO_DIR(gpio) ((0x0005) + ((gpio) >> 4))
  11. #define RTL8231_GPIO_DATA(gpio) ((0x001C) + ((gpio) >> 4))
  12. struct rtl8231_gpios {
  13. struct gpio_chip gc;
  14. struct device *dev;
  15. u32 id;
  16. int smi_bus_id;
  17. u16 reg_shadow[0x20];
  18. u32 reg_cached;
  19. int ext_gpio_indrt_access;
  20. };
  21. extern struct mutex smi_lock;
  22. extern struct rtl83xx_soc_info soc_info;
  23. static u32 rtl8231_read(struct rtl8231_gpios *gpios, u32 reg)
  24. {
  25. u32 t = 0;
  26. u8 bus_id = gpios->smi_bus_id;
  27. reg &= 0x1f;
  28. bus_id &= 0x1f;
  29. /* Calculate read register address */
  30. t = (bus_id << 2) | (reg << 7);
  31. /* Set execution bit: cleared when operation completed */
  32. t |= 1;
  33. sw_w32(t, gpios->ext_gpio_indrt_access);
  34. do { /* TODO: Return 0x80000000 if timeout */
  35. t = sw_r32(gpios->ext_gpio_indrt_access);
  36. } while (t & 1);
  37. pr_debug("%s: %x, %x, %x\n", __func__, bus_id, reg, (t & 0xffff0000) >> 16);
  38. return (t & 0xffff0000) >> 16;
  39. }
  40. static int rtl8231_write(struct rtl8231_gpios *gpios, u32 reg, u32 data)
  41. {
  42. u32 t = 0;
  43. u8 bus_id = gpios->smi_bus_id;
  44. pr_debug("%s: %x, %x, %x\n", __func__, bus_id, reg, data);
  45. reg &= 0x1f;
  46. bus_id &= 0x1f;
  47. t = (bus_id << 2) | (reg << 7) | (data << 16);
  48. /* Set write bit */
  49. t |= 2;
  50. /* Set execution bit: cleared when operation completed */
  51. t |= 1;
  52. sw_w32(t, gpios->ext_gpio_indrt_access);
  53. do { /* TODO: Return -1 if timeout */
  54. t = sw_r32(gpios->ext_gpio_indrt_access);
  55. } while (t & 1);
  56. return 0;
  57. }
  58. static u32 rtl8231_read_cached(struct rtl8231_gpios *gpios, u32 reg)
  59. {
  60. if (reg > 0x1f)
  61. return 0;
  62. if (gpios->reg_cached & (1 << reg))
  63. return gpios->reg_shadow[reg];
  64. return rtl8231_read(gpios, reg);
  65. }
  66. /* Set Direction of the RTL8231 pin:
  67. * dir 1: input
  68. * dir 0: output
  69. */
  70. static int rtl8231_pin_dir(struct rtl8231_gpios *gpios, u32 gpio, u32 dir)
  71. {
  72. u32 v;
  73. int pin_sel_addr = RTL8231_GPIO_PIN_SEL(gpio);
  74. int pin_dir_addr = RTL8231_GPIO_DIR(gpio);
  75. int pin = gpio % 16;
  76. int dpin = pin;
  77. if (gpio > 31) {
  78. pr_info("WARNING: HIGH pin\n");
  79. dpin = pin << 5;
  80. pin_dir_addr = pin_sel_addr;
  81. }
  82. v = rtl8231_read_cached(gpios, pin_dir_addr);
  83. if (v & 0x80000000) {
  84. pr_err("Error reading RTL8231\n");
  85. return -1;
  86. }
  87. v = (v & ~(1 << dpin)) | (dir << dpin);
  88. rtl8231_write(gpios, pin_dir_addr, v);
  89. gpios->reg_shadow[pin_dir_addr] = v;
  90. gpios->reg_cached |= 1 << pin_dir_addr;
  91. return 0;
  92. }
  93. static int rtl8231_pin_dir_get(struct rtl8231_gpios *gpios, u32 gpio, u32 *dir)
  94. {
  95. /* dir 1: input
  96. * dir 0: output
  97. */
  98. u32 v;
  99. int pin_dir_addr = RTL8231_GPIO_DIR(gpio);
  100. int pin = gpio % 16;
  101. if (gpio > 31) {
  102. pin_dir_addr = RTL8231_GPIO_PIN_SEL(gpio);
  103. pin = pin << 5;
  104. }
  105. v = rtl8231_read(gpios, pin_dir_addr);
  106. if (v & (1 << pin))
  107. *dir = 1;
  108. else
  109. *dir = 0;
  110. return 0;
  111. }
  112. static int rtl8231_pin_set(struct rtl8231_gpios *gpios, u32 gpio, u32 data)
  113. {
  114. u32 v = rtl8231_read(gpios, RTL8231_GPIO_DATA(gpio));
  115. pr_debug("%s: %d to %d\n", __func__, gpio, data);
  116. if (v & 0x80000000) {
  117. pr_err("Error reading RTL8231\n");
  118. return -1;
  119. }
  120. v = (v & ~(1 << (gpio % 16))) | (data << (gpio % 16));
  121. rtl8231_write(gpios, RTL8231_GPIO_DATA(gpio), v);
  122. gpios->reg_shadow[RTL8231_GPIO_DATA(gpio)] = v;
  123. gpios->reg_cached |= 1 << RTL8231_GPIO_DATA(gpio);
  124. return 0;
  125. }
  126. static int rtl8231_pin_get(struct rtl8231_gpios *gpios, u32 gpio, u16 *state)
  127. {
  128. u32 v = rtl8231_read(gpios, RTL8231_GPIO_DATA(gpio));
  129. if (v & 0x80000000) {
  130. pr_err("Error reading RTL8231\n");
  131. return -1;
  132. }
  133. *state = v & 0xffff;
  134. return 0;
  135. }
  136. static int rtl8231_direction_input(struct gpio_chip *gc, unsigned int offset)
  137. {
  138. int err;
  139. struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
  140. pr_debug("%s: %d\n", __func__, offset);
  141. mutex_lock(&smi_lock);
  142. err = rtl8231_pin_dir(gpios, offset, 1);
  143. mutex_unlock(&smi_lock);
  144. return err;
  145. }
  146. static int rtl8231_direction_output(struct gpio_chip *gc, unsigned int offset, int value)
  147. {
  148. int err;
  149. struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
  150. pr_debug("%s: %d\n", __func__, offset);
  151. mutex_lock(&smi_lock);
  152. err = rtl8231_pin_dir(gpios, offset, 0);
  153. mutex_unlock(&smi_lock);
  154. if (!err)
  155. err = rtl8231_pin_set(gpios, offset, value);
  156. return err;
  157. }
  158. static int rtl8231_get_direction(struct gpio_chip *gc, unsigned int offset)
  159. {
  160. u32 v = 0;
  161. struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
  162. pr_debug("%s: %d\n", __func__, offset);
  163. mutex_lock(&smi_lock);
  164. rtl8231_pin_dir_get(gpios, offset, &v);
  165. mutex_unlock(&smi_lock);
  166. return v;
  167. }
  168. static int rtl8231_gpio_get(struct gpio_chip *gc, unsigned int offset)
  169. {
  170. u16 state = 0;
  171. struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
  172. mutex_lock(&smi_lock);
  173. rtl8231_pin_get(gpios, offset, &state);
  174. mutex_unlock(&smi_lock);
  175. if (state & (1 << (offset % 16)))
  176. return 1;
  177. return 0;
  178. }
  179. void rtl8231_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
  180. {
  181. struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
  182. rtl8231_pin_set(gpios, offset, value);
  183. }
  184. int rtl8231_init(struct rtl8231_gpios *gpios)
  185. {
  186. pr_info("%s called, MDIO bus ID: %d\n", __func__, gpios->smi_bus_id);
  187. if (soc_info.family == RTL8390_FAMILY_ID) {
  188. sw_w32_mask(0x7 << 18, 0x4 << 18, RTL839X_LED_GLB_CTRL);
  189. return 0;
  190. }
  191. /* Enable RTL8231 indirect access mode */
  192. sw_w32_mask(0, 1, RTL838X_EXTRA_GPIO_CTRL);
  193. sw_w32_mask(3, 1, RTL838X_DMY_REG5);
  194. /* Enable RTL8231 via GPIO_A1 line
  195. rtl838x_w32_mask(0, 1 << RTL838X_GPIO_A1, RTL838X_GPIO_PABC_DIR);
  196. rtl838x_w32_mask(0, 1 << RTL838X_GPIO_A1, RTL838X_GPIO_PABC_DATA); */
  197. mdelay(50); /* wait 50ms for reset */
  198. /*Select GPIO functionality for pins 0-15, 16-31 and 32-37 */
  199. rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(0), 0xffff);
  200. rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(16), 0xffff);
  201. gpios->reg_cached = 0;
  202. return 0;
  203. }
  204. static const struct of_device_id rtl8231_gpio_of_match[] = {
  205. { .compatible = "realtek,rtl8231-gpio" },
  206. {},
  207. };
  208. MODULE_DEVICE_TABLE(of, rtl8231_gpio_of_match);
  209. static int rtl8231_gpio_probe(struct platform_device *pdev)
  210. {
  211. struct device *dev = &pdev->dev;
  212. struct device_node *np = dev->of_node;
  213. struct rtl8231_gpios *gpios;
  214. int err;
  215. u8 indirect_bus_id;
  216. pr_info("Probing RTL8231 GPIOs\n");
  217. if (!np) {
  218. dev_err(&pdev->dev, "No DT found\n");
  219. return -EINVAL;
  220. }
  221. gpios = devm_kzalloc(dev, sizeof(*gpios), GFP_KERNEL);
  222. if (!gpios)
  223. return -ENOMEM;
  224. gpios->id = soc_info.id;
  225. if (soc_info.family == RTL8380_FAMILY_ID) {
  226. gpios->ext_gpio_indrt_access = RTL838X_EXT_GPIO_INDRT_ACCESS;
  227. }
  228. if (soc_info.family == RTL8390_FAMILY_ID) {
  229. gpios->ext_gpio_indrt_access = RTL839X_EXT_GPIO_INDRT_ACCESS;
  230. }
  231. if (!of_property_read_u8(np, "indirect-access-bus-id", &indirect_bus_id)) {
  232. gpios->smi_bus_id = indirect_bus_id;
  233. rtl8231_init(gpios);
  234. }
  235. gpios->dev = dev;
  236. gpios->gc.base = 160;
  237. gpios->gc.ngpio = 36;
  238. gpios->gc.label = "rtl8231";
  239. gpios->gc.parent = dev;
  240. gpios->gc.owner = THIS_MODULE;
  241. gpios->gc.can_sleep = true;
  242. gpios->gc.direction_input = rtl8231_direction_input;
  243. gpios->gc.direction_output = rtl8231_direction_output;
  244. gpios->gc.set = rtl8231_gpio_set;
  245. gpios->gc.get = rtl8231_gpio_get;
  246. gpios->gc.get_direction = rtl8231_get_direction;
  247. err = devm_gpiochip_add_data(dev, &gpios->gc, gpios);
  248. return err;
  249. }
  250. static struct platform_driver rtl8231_gpio_driver = {
  251. .driver = {
  252. .name = "rtl8231-gpio",
  253. .of_match_table = rtl8231_gpio_of_match,
  254. },
  255. .probe = rtl8231_gpio_probe,
  256. };
  257. module_platform_driver(rtl8231_gpio_driver);
  258. MODULE_DESCRIPTION("Realtek RTL8231 GPIO expansion chip support");
  259. MODULE_LICENSE("GPL v2");