950-0865-usb-dwc3-Set-DMA-and-coherent-masks-early.patch 12 KB

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  1. From 4ffa5f2c5fc7854683964bb2f2bf23907c18213f Mon Sep 17 00:00:00 2001
  2. From: Jonathan Bell <[email protected]>
  3. Date: Mon, 13 Sep 2021 11:14:32 +0100
  4. Subject: [PATCH] usb: dwc3: Set DMA and coherent masks early
  5. dwc3 allocates scratch and event buffers in the top-level driver. Hack the
  6. probe function to set the DMA mask before trying to allocate these.
  7. I think the event buffers are only used in device mode, but the scratch
  8. buffers may be used if core hibernation is enabled.
  9. usb: dwc3: add support for new DT quirks
  10. Apply the optional axi-pipe-limit and dis-in-autoretry-quirk properties
  11. during driver probe.
  12. Signed-off-by: Jonathan Bell <[email protected]>
  13. phy: phy-brcm-usb: Add 2712 support
  14. usb: dwc3: if the host controller instance number is present in DT, use it
  15. If two instances of a dwc3 host controller are specified in devicetree,
  16. then the probe order may be arbitrary which results in the device names
  17. swapping on a per-boot basis.
  18. If a "usb" alias with the instance number is specified, then use
  19. that to construct the device name instead of autogenerating one.
  20. Signed-off-by: Jonathan Bell <[email protected]>
  21. rp1 dwc3 changes
  22. drivers: usb: dwc3: allow setting GTXTHRCFG on dwc_usb3.0 hardware
  23. Equivalent register fields exist in the SuperSpeed Host version of the
  24. hardware, so allow the use of TX thresholds if specified in devicetree.
  25. Signed-off-by: Jonathan Bell <[email protected]>
  26. drivers: usb: dwc3: remove downstream quirk dis-in-autoretry
  27. Upstream have unilaterally disabled the feature.
  28. Partially reverts 6e9142a26ee0fdc3a5adc49ed6cedc0b16ec2ed1 (downstream)
  29. Signed-off-by: Jonathan Bell <[email protected]>
  30. ---
  31. drivers/phy/broadcom/Kconfig | 2 +-
  32. .../phy/broadcom/phy-brcm-usb-init-synopsys.c | 59 +++++++++++++++++++
  33. drivers/phy/broadcom/phy-brcm-usb-init.h | 2 +
  34. drivers/phy/broadcom/phy-brcm-usb.c | 18 +++++-
  35. drivers/usb/dwc3/core.c | 52 ++++++++++++++++
  36. drivers/usb/dwc3/core.h | 10 ++++
  37. drivers/usb/dwc3/host.c | 17 ++++--
  38. 7 files changed, 153 insertions(+), 7 deletions(-)
  39. --- a/drivers/phy/broadcom/Kconfig
  40. +++ b/drivers/phy/broadcom/Kconfig
  41. @@ -93,7 +93,7 @@ config PHY_BRCM_SATA
  42. config PHY_BRCM_USB
  43. tristate "Broadcom STB USB PHY driver"
  44. - depends on ARCH_BCMBCA || ARCH_BRCMSTB || COMPILE_TEST
  45. + depends on ARCH_BCMBCA || ARCH_BRCMSTB || ARCH_BCM2835 || COMPILE_TEST
  46. depends on OF
  47. select GENERIC_PHY
  48. select SOC_BRCMSTB if ARCH_BRCMSTB
  49. --- a/drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
  50. +++ b/drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c
  51. @@ -318,6 +318,36 @@ static void usb_init_common_7216(struct
  52. usb_init_common(params);
  53. }
  54. +static void usb_init_common_2712(struct brcm_usb_init_params *params)
  55. +{
  56. + void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
  57. + void __iomem *bdc_ec = params->regs[BRCM_REGS_BDC_EC];
  58. + u32 reg;
  59. +
  60. + if (params->syscon_piarbctl)
  61. + syscon_piarbctl_init(params->syscon_piarbctl);
  62. +
  63. + USB_CTRL_UNSET(ctrl, USB_PM, USB_PWRDN);
  64. +
  65. + usb_wake_enable_7211b0(params, false);
  66. +
  67. + usb_init_common(params);
  68. +
  69. + /*
  70. + * The BDC controller will get occasional failures with
  71. + * the default "Read Transaction Size" of 6 (1024 bytes).
  72. + * Set it to 4 (256 bytes).
  73. + */
  74. + if ((params->mode != USB_CTLR_MODE_HOST) && bdc_ec) {
  75. + reg = brcm_usb_readl(bdc_ec + BDC_EC_AXIRDA);
  76. + reg &= ~BDC_EC_AXIRDA_RTS_MASK;
  77. + reg |= (0x4 << BDC_EC_AXIRDA_RTS_SHIFT);
  78. + brcm_usb_writel(reg, bdc_ec + BDC_EC_AXIRDA);
  79. + }
  80. +
  81. + usb2_eye_fix_7211b0(params);
  82. +}
  83. +
  84. static void usb_init_xhci(struct brcm_usb_init_params *params)
  85. {
  86. pr_debug("%s\n", __func__);
  87. @@ -363,6 +393,18 @@ static void usb_uninit_common_7211b0(str
  88. }
  89. +static void usb_uninit_common_2712(struct brcm_usb_init_params *params)
  90. +{
  91. + void __iomem *ctrl = params->regs[BRCM_REGS_CTRL];
  92. +
  93. + if (params->wake_enabled) {
  94. + USB_CTRL_SET(ctrl, TEST_PORT_CTL, TPOUT_SEL_PME_GEN);
  95. + usb_wake_enable_7211b0(params, true);
  96. + } else {
  97. + USB_CTRL_SET(ctrl, USB_PM, USB_PWRDN);
  98. + }
  99. +}
  100. +
  101. static void usb_uninit_xhci(struct brcm_usb_init_params *params)
  102. {
  103. @@ -417,6 +459,16 @@ static const struct brcm_usb_init_ops bc
  104. .set_dual_select = usb_set_dual_select,
  105. };
  106. +static const struct brcm_usb_init_ops bcm2712_ops = {
  107. + .init_ipp = usb_init_ipp,
  108. + .init_common = usb_init_common_2712,
  109. + .init_xhci = usb_init_xhci,
  110. + .uninit_common = usb_uninit_common_2712,
  111. + .uninit_xhci = usb_uninit_xhci,
  112. + .get_dual_select = usb_get_dual_select,
  113. + .set_dual_select = usb_set_dual_select,
  114. +};
  115. +
  116. void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params)
  117. {
  118. @@ -434,3 +486,10 @@ void brcm_usb_dvr_init_7211b0(struct brc
  119. params->family_name = "7211";
  120. params->ops = &bcm7211b0_ops;
  121. }
  122. +
  123. +void brcm_usb_dvr_init_2712(struct brcm_usb_init_params *params)
  124. +{
  125. + params->family_name = "2712";
  126. + params->ops = &bcm2712_ops;
  127. + params->suspend_with_clocks = true;
  128. +}
  129. --- a/drivers/phy/broadcom/phy-brcm-usb-init.h
  130. +++ b/drivers/phy/broadcom/phy-brcm-usb-init.h
  131. @@ -61,12 +61,14 @@ struct brcm_usb_init_params {
  132. const struct brcm_usb_init_ops *ops;
  133. struct regmap *syscon_piarbctl;
  134. bool wake_enabled;
  135. + bool suspend_with_clocks;
  136. };
  137. void brcm_usb_dvr_init_4908(struct brcm_usb_init_params *params);
  138. void brcm_usb_dvr_init_7445(struct brcm_usb_init_params *params);
  139. void brcm_usb_dvr_init_7216(struct brcm_usb_init_params *params);
  140. void brcm_usb_dvr_init_7211b0(struct brcm_usb_init_params *params);
  141. +void brcm_usb_dvr_init_2712(struct brcm_usb_init_params *params);
  142. static inline u32 brcm_usb_readl(void __iomem *addr)
  143. {
  144. --- a/drivers/phy/broadcom/phy-brcm-usb.c
  145. +++ b/drivers/phy/broadcom/phy-brcm-usb.c
  146. @@ -76,7 +76,7 @@ struct brcm_usb_phy_data {
  147. };
  148. static s8 *node_reg_names[BRCM_REGS_MAX] = {
  149. - "crtl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio", "bdc_ec"
  150. + "ctrl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio", "bdc_ec"
  151. };
  152. static int brcm_pm_notifier(struct notifier_block *notifier,
  153. @@ -315,6 +315,18 @@ static const struct match_chip_info chip
  154. .optional_reg = BRCM_REGS_BDC_EC,
  155. };
  156. +static const struct match_chip_info chip_info_2712 = {
  157. + .init_func = &brcm_usb_dvr_init_2712,
  158. + .required_regs = {
  159. + BRCM_REGS_CTRL,
  160. + BRCM_REGS_XHCI_EC,
  161. + BRCM_REGS_XHCI_GBL,
  162. + BRCM_REGS_USB_MDIO,
  163. + -1,
  164. + },
  165. + .optional_reg = BRCM_REGS_BDC_EC,
  166. +};
  167. +
  168. static const struct match_chip_info chip_info_7445 = {
  169. .init_func = &brcm_usb_dvr_init_7445,
  170. .required_regs = {
  171. @@ -338,6 +350,10 @@ static const struct of_device_id brcm_us
  172. .data = &chip_info_7211b0,
  173. },
  174. {
  175. + .compatible = "brcm,bcm2712-usb-phy",
  176. + .data = &chip_info_2712,
  177. + },
  178. + {
  179. .compatible = "brcm,brcmstb-usb-phy",
  180. .data = &chip_info_7445,
  181. },
  182. --- a/drivers/usb/dwc3/core.c
  183. +++ b/drivers/usb/dwc3/core.c
  184. @@ -1179,6 +1179,24 @@ static void dwc3_config_threshold(struct
  185. }
  186. }
  187. +static void dwc3_set_axi_pipe_limit(struct dwc3 *dwc)
  188. +{
  189. + struct device *dev = dwc->dev;
  190. + u32 cfg;
  191. +
  192. + if (!dwc->axi_pipe_limit)
  193. + return;
  194. + if (dwc->axi_pipe_limit > 16) {
  195. + dev_err(dev, "Invalid axi_pipe_limit property\n");
  196. + return;
  197. + }
  198. + cfg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG1);
  199. + cfg &= ~DWC3_GSBUSCFG1_PIPETRANSLIMIT(15);
  200. + cfg |= DWC3_GSBUSCFG1_PIPETRANSLIMIT(dwc->axi_pipe_limit - 1);
  201. +
  202. + dwc3_writel(dwc->regs, DWC3_GSBUSCFG1, cfg);
  203. +}
  204. +
  205. /**
  206. * dwc3_core_init - Low-level initialization of DWC3 Core
  207. * @dwc: Pointer to our controller context structure
  208. @@ -1271,6 +1289,8 @@ static int dwc3_core_init(struct dwc3 *d
  209. dwc3_set_incr_burst_type(dwc);
  210. + dwc3_set_axi_pipe_limit(dwc);
  211. +
  212. usb_phy_set_suspend(dwc->usb2_phy, 0);
  213. usb_phy_set_suspend(dwc->usb3_phy, 0);
  214. ret = phy_power_on(dwc->usb2_generic_phy);
  215. @@ -1504,6 +1524,7 @@ static void dwc3_get_properties(struct d
  216. u8 tx_thr_num_pkt_prd = 0;
  217. u8 tx_max_burst_prd = 0;
  218. u8 tx_fifo_resize_max_num;
  219. + u8 axi_pipe_limit;
  220. const char *usb_psy_name;
  221. int ret;
  222. @@ -1526,6 +1547,9 @@ static void dwc3_get_properties(struct d
  223. */
  224. tx_fifo_resize_max_num = 6;
  225. + /* Default to 0 (don't override hardware defaults) */
  226. + axi_pipe_limit = 0;
  227. +
  228. dwc->maximum_speed = usb_get_maximum_speed(dev);
  229. dwc->max_ssp_rate = usb_get_maximum_ssp_rate(dev);
  230. dwc->dr_mode = usb_get_dr_mode(dev);
  231. @@ -1641,6 +1665,9 @@ static void dwc3_get_properties(struct d
  232. dwc->dis_split_quirk = device_property_read_bool(dev,
  233. "snps,dis-split-quirk");
  234. + device_property_read_u8(dev, "snps,axi-pipe-limit",
  235. + &axi_pipe_limit);
  236. +
  237. dwc->lpm_nyet_threshold = lpm_nyet_threshold;
  238. dwc->tx_de_emphasis = tx_de_emphasis;
  239. @@ -1658,6 +1685,8 @@ static void dwc3_get_properties(struct d
  240. dwc->tx_thr_num_pkt_prd = tx_thr_num_pkt_prd;
  241. dwc->tx_max_burst_prd = tx_max_burst_prd;
  242. + dwc->axi_pipe_limit = axi_pipe_limit;
  243. +
  244. dwc->imod_interval = 0;
  245. dwc->tx_fifo_resize_max_num = tx_fifo_resize_max_num;
  246. @@ -1866,6 +1895,12 @@ static int dwc3_probe(struct platform_de
  247. dwc3_get_properties(dwc);
  248. + if (!dwc->sysdev_is_parent) {
  249. + ret = dma_set_mask_and_coherent(dwc->sysdev, DMA_BIT_MASK(64));
  250. + if (ret)
  251. + return ret;
  252. + }
  253. +
  254. dwc->reset = devm_reset_control_array_get_optional_shared(dev);
  255. if (IS_ERR(dwc->reset)) {
  256. ret = PTR_ERR(dwc->reset);
  257. --- a/drivers/usb/dwc3/core.h
  258. +++ b/drivers/usb/dwc3/core.h
  259. @@ -183,6 +183,9 @@
  260. #define DWC3_GSBUSCFG0_INCRBRSTENA (1 << 0) /* undefined length enable */
  261. #define DWC3_GSBUSCFG0_INCRBRST_MASK 0xff
  262. +/* Global SoC Bus Configuration Register 1 */
  263. +#define DWC3_GSBUSCFG1_PIPETRANSLIMIT(n) (((n) & 0xf) << 8)
  264. +
  265. /* Global Debug LSP MUX Select */
  266. #define DWC3_GDBGLSPMUX_ENDBC BIT(15) /* Host only */
  267. #define DWC3_GDBGLSPMUX_HOSTSELECT(n) ((n) & 0x3fff)
  268. @@ -1056,6 +1059,7 @@ struct dwc3_scratchpad_array {
  269. * @tx_max_burst_prd: max periodic ESS transmit burst size
  270. * @tx_fifo_resize_max_num: max number of fifos allocated during txfifo resize
  271. * @clear_stall_protocol: endpoint number that requires a delayed status phase
  272. + * @axi_max_pipe: set to override the maximum number of pipelined AXI transfers
  273. * @hsphy_interface: "utmi" or "ulpi"
  274. * @connected: true when we're connected to a host, false otherwise
  275. * @softconnect: true when gadget connect is called, false when disconnect runs
  276. @@ -1287,6 +1291,7 @@ struct dwc3 {
  277. u8 tx_max_burst_prd;
  278. u8 tx_fifo_resize_max_num;
  279. u8 clear_stall_protocol;
  280. + u8 axi_pipe_limit;
  281. const char *hsphy_interface;
  282. --- a/drivers/usb/dwc3/host.c
  283. +++ b/drivers/usb/dwc3/host.c
  284. @@ -30,10 +30,10 @@ static void dwc3_host_fill_xhci_irq_res(
  285. static int dwc3_host_get_irq(struct dwc3 *dwc)
  286. {
  287. - struct platform_device *dwc3_pdev = to_platform_device(dwc->dev);
  288. + struct platform_device *pdev = to_platform_device(dwc->dev);
  289. int irq;
  290. - irq = platform_get_irq_byname_optional(dwc3_pdev, "host");
  291. + irq = platform_get_irq_byname_optional(pdev, "host");
  292. if (irq > 0) {
  293. dwc3_host_fill_xhci_irq_res(dwc, irq, "host");
  294. goto out;
  295. @@ -42,7 +42,7 @@ static int dwc3_host_get_irq(struct dwc3
  296. if (irq == -EPROBE_DEFER)
  297. goto out;
  298. - irq = platform_get_irq_byname_optional(dwc3_pdev, "dwc_usb3");
  299. + irq = platform_get_irq_byname_optional(pdev, "dwc_usb3");
  300. if (irq > 0) {
  301. dwc3_host_fill_xhci_irq_res(dwc, irq, "dwc_usb3");
  302. goto out;
  303. @@ -51,7 +51,7 @@ static int dwc3_host_get_irq(struct dwc3
  304. if (irq == -EPROBE_DEFER)
  305. goto out;
  306. - irq = platform_get_irq(dwc3_pdev, 0);
  307. + irq = platform_get_irq(pdev, 0);
  308. if (irq > 0) {
  309. dwc3_host_fill_xhci_irq_res(dwc, irq, NULL);
  310. goto out;
  311. @@ -66,16 +66,23 @@ out:
  312. int dwc3_host_init(struct dwc3 *dwc)
  313. {
  314. + struct platform_device *pdev = to_platform_device(dwc->dev);
  315. struct property_entry props[4];
  316. struct platform_device *xhci;
  317. int ret, irq;
  318. int prop_idx = 0;
  319. + int id;
  320. irq = dwc3_host_get_irq(dwc);
  321. if (irq < 0)
  322. return irq;
  323. - xhci = platform_device_alloc("xhci-hcd", PLATFORM_DEVID_AUTO);
  324. + id = of_alias_get_id(pdev->dev.of_node, "usb");
  325. + if (id >= 0)
  326. + xhci = platform_device_alloc("xhci-hcd", id);
  327. + else
  328. + xhci = platform_device_alloc("xhci-hcd", PLATFORM_DEVID_AUTO);
  329. +
  330. if (!xhci) {
  331. dev_err(dwc->dev, "couldn't allocate xHCI device\n");
  332. return -ENOMEM;