950-0895-ASOC-dwc-Fix-16-bit-audio-handling.patch 2.6 KB

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  1. From 9c6694c24f26ea435165431d41c72451fadbd753 Mon Sep 17 00:00:00 2001
  2. From: Phil Elwell <[email protected]>
  3. Date: Fri, 21 Jul 2023 12:07:16 +0100
  4. Subject: [PATCH] ASOC: dwc: Fix 16-bit audio handling
  5. IMO the Synopsys datasheet could be clearer in this area, but it seems
  6. that the DMA data ports (DMATX and DMARX) expect left and right samples
  7. in alternate writes; if a stereo pair is pushed in a single 32-bit
  8. write, the upper half is ignored, leading to double speed audio with a
  9. confused stereo image. Make sure the necessary changes happen by
  10. updating the DMA configuration data in the hw_params method.
  11. The set_bclk_ratio change was made at a time when it looked like it
  12. could be causing an error, but I think the division of responsibilities
  13. is clearer this way (and the kernel log clearer without the info-level
  14. message).
  15. Signed-off-by: Phil Elwell <[email protected]>
  16. ---
  17. sound/soc/dwc/dwc-i2s.c | 22 +++++++++++++++-------
  18. 1 file changed, 15 insertions(+), 7 deletions(-)
  19. --- a/sound/soc/dwc/dwc-i2s.c
  20. +++ b/sound/soc/dwc/dwc-i2s.c
  21. @@ -223,23 +223,34 @@ static int dw_i2s_hw_params(struct snd_p
  22. {
  23. struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
  24. struct i2s_clk_config_data *config = &dev->config;
  25. + union dw_i2s_snd_dma_data *dma_data = NULL;
  26. int ret;
  27. + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  28. + dma_data = &dev->play_dma_data;
  29. + else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  30. + dma_data = &dev->capture_dma_data;
  31. + else
  32. + return -1;
  33. +
  34. switch (params_format(params)) {
  35. case SNDRV_PCM_FORMAT_S16_LE:
  36. config->data_width = 16;
  37. + dma_data->dt.addr_width = 2;
  38. dev->ccr = 0x00;
  39. dev->xfer_resolution = 0x02;
  40. break;
  41. case SNDRV_PCM_FORMAT_S24_LE:
  42. config->data_width = 24;
  43. + dma_data->dt.addr_width = 4;
  44. dev->ccr = 0x08;
  45. dev->xfer_resolution = 0x04;
  46. break;
  47. case SNDRV_PCM_FORMAT_S32_LE:
  48. config->data_width = 32;
  49. + dma_data->dt.addr_width = 4;
  50. dev->ccr = 0x10;
  51. dev->xfer_resolution = 0x05;
  52. break;
  53. @@ -418,24 +429,21 @@ static int dw_i2s_set_bclk_ratio(struct
  54. struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
  55. struct i2s_clk_config_data *config = &dev->config;
  56. - dev_err(dev->dev, "%s(%d)\n", __func__, ratio);
  57. + dev_dbg(dev->dev, "%s(%d)\n", __func__, ratio);
  58. + if (ratio < config->data_width * 2)
  59. + return -EINVAL;
  60. +
  61. switch (ratio) {
  62. case 32:
  63. - config->data_width = 16;
  64. dev->ccr = 0x00;
  65. - dev->xfer_resolution = 0x02;
  66. break;
  67. case 48:
  68. - config->data_width = 24;
  69. dev->ccr = 0x08;
  70. - dev->xfer_resolution = 0x04;
  71. break;
  72. case 64:
  73. - config->data_width = 32;
  74. dev->ccr = 0x10;
  75. - dev->xfer_resolution = 0x05;
  76. break;
  77. default:
  78. return -EINVAL;