030-v5.15-0006-ARM-dts-NSP-Add-common-bindings-for-MX64-MX65.patch 2.9 KB

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  1. From f111016a8293b968f05450fec83020c94d0f88c2 Mon Sep 17 00:00:00 2001
  2. From: Matthew Hagan <[email protected]>
  3. Date: Fri, 6 Aug 2021 21:44:32 +0100
  4. Subject: [PATCH] ARM: dts: NSP: Add common bindings for MX64/MX65
  5. These bindings are required for all Meraki MX64/MX65 devices. These
  6. common bindings include memory (2GB), PWM LEDs, AMAC, I2C (AT24), NAND
  7. partitions, EHCI, OHCI and pinctrl.
  8. Signed-off-by: Matthew Hagan <[email protected]>
  9. Signed-off-by: Florian Fainelli <[email protected]>
  10. ---
  11. .../dts/bcm958625-meraki-mx6x-common.dtsi | 129 ++++++++++++++++++
  12. 1 file changed, 129 insertions(+)
  13. create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx6x-common.dtsi
  14. --- /dev/null
  15. +++ b/arch/arm/boot/dts/bcm958625-meraki-mx6x-common.dtsi
  16. @@ -0,0 +1,129 @@
  17. +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  18. +/*
  19. + * Common Bindings for Cisco Meraki MX64 (Kingpin) and MX65 (Alamo) devices.
  20. + *
  21. + * Copyright (C) 2020-2021 Matthew Hagan <[email protected]>
  22. + */
  23. +
  24. +#include "bcm-nsp.dtsi"
  25. +#include <dt-bindings/gpio/gpio.h>
  26. +#include <dt-bindings/input/input.h>
  27. +#include <dt-bindings/leds/common.h>
  28. +
  29. +/ {
  30. + pwm-leds {
  31. + compatible = "pwm-leds";
  32. +
  33. + led-1 {
  34. + function = LED_FUNCTION_INDICATOR;
  35. + color = <LED_COLOR_ID_RED>;
  36. + pwms = <&pwm 1 50000>;
  37. + max-brightness = <255>;
  38. + };
  39. +
  40. + led-2 {
  41. + function = LED_FUNCTION_INDICATOR;
  42. + color = <LED_COLOR_ID_GREEN>;
  43. + pwms = <&pwm 2 50000>;
  44. + max-brightness = <255>;
  45. + };
  46. +
  47. + led-3 {
  48. + function = LED_FUNCTION_INDICATOR;
  49. + color = <LED_COLOR_ID_BLUE>;
  50. + pwms = <&pwm 3 50000>;
  51. + max-brightness = <255>;
  52. + };
  53. + };
  54. +};
  55. +
  56. +&amac2 {
  57. + status = "okay";
  58. +};
  59. +
  60. +&ehci0 {
  61. + status = "okay";
  62. +};
  63. +
  64. +&i2c0 {
  65. + status = "okay";
  66. +
  67. + at24@50 {
  68. + compatible = "atmel,24c64";
  69. + reg = <0x50>;
  70. + pagesize = <32>;
  71. + read-only;
  72. + };
  73. +};
  74. +
  75. +&nand_controller {
  76. + nand@0 {
  77. + compatible = "brcm,nandcs";
  78. + reg = <0>;
  79. + nand-on-flash-bbt;
  80. +
  81. + #address-cells = <1>;
  82. + #size-cells = <1>;
  83. +
  84. + nand-ecc-strength = <24>;
  85. + nand-ecc-step-size = <1024>;
  86. +
  87. + brcm,nand-oob-sector-size = <27>;
  88. +
  89. + partition@0 {
  90. + label = "u-boot";
  91. + reg = <0x0 0x80000>;
  92. + read-only;
  93. + };
  94. +
  95. + partition@80000 {
  96. + label = "shmoo";
  97. + reg = <0x80000 0x80000>;
  98. + read-only;
  99. + };
  100. +
  101. + partition@100000 {
  102. + label = "bootkernel1";
  103. + reg = <0x100000 0x300000>;
  104. + };
  105. +
  106. + partition@400000 {
  107. + label = "nvram";
  108. + reg = <0x400000 0x100000>;
  109. + };
  110. +
  111. + partition@500000 {
  112. + label = "bootkernel2";
  113. + reg = <0x500000 0x300000>;
  114. + };
  115. +
  116. + partition@800000 {
  117. + label = "ubi";
  118. + reg = <0x800000 0x3f700000>;
  119. + };
  120. + };
  121. +};
  122. +
  123. +&ohci0 {
  124. + status = "okay";
  125. +};
  126. +
  127. +&pinctrl {
  128. + pinctrl-names = "default";
  129. + pinctrl-0 = <&pwm_leds>;
  130. +
  131. + pwm_leds: pwm_leds {
  132. + function = "pwm";
  133. + groups = "pwm1_grp", "pwm2_grp", "pwm3_grp";
  134. + };
  135. +};
  136. +
  137. +&pwm {
  138. + status = "okay";
  139. + #pwm-cells = <2>;
  140. +};
  141. +
  142. +&uart0 {
  143. + clock-frequency = <62500000>;
  144. + status = "okay";
  145. +};