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035-v6.2-0001-ARM-dts-bcm53016-Add-devicetree-for-D-Link-DWL-8610A.patch 4.1 KB

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  1. From 9f66e1dd82e3186aee95282657512ca2aef1afe0 Mon Sep 17 00:00:00 2001
  2. From: Linus Walleij <[email protected]>
  3. Date: Wed, 19 Oct 2022 21:34:49 +0200
  4. Subject: [PATCH] ARM: dts: bcm53016: Add devicetree for D-Link DWL-8610AP
  5. This adds a device tree for the BCM53016-based D-Link DWL-8610AP
  6. access point wireless router.
  7. The TRX-format partitions had to be named "firmware" due to
  8. an OpenWrt patch that only accepts parting such nodes if they
  9. are named "firmware".
  10. Signed-off-by: Linus Walleij <[email protected]>
  11. Link: https://lore.kernel.org/r/[email protected]
  12. Signed-off-by: Florian Fainelli <[email protected]>
  13. ---
  14. arch/arm/boot/dts/Makefile | 1 +
  15. .../boot/dts/bcm53016-dlink-dwl-8610ap.dts | 131 ++++++++++++++++++
  16. 2 files changed, 132 insertions(+)
  17. create mode 100644 arch/arm/boot/dts/bcm53016-dlink-dwl-8610ap.dts
  18. --- a/arch/arm/boot/dts/Makefile
  19. +++ b/arch/arm/boot/dts/Makefile
  20. @@ -131,6 +131,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
  21. bcm47094-netgear-r8500.dtb \
  22. bcm47094-phicomm-k3.dtb \
  23. bcm53015-meraki-mr26.dtb \
  24. + bcm53016-dlink-dwl-8610ap.dtb \
  25. bcm53016-meraki-mr32.dtb \
  26. bcm94708.dtb \
  27. bcm94709.dtb \
  28. --- /dev/null
  29. +++ b/arch/arm/boot/dts/bcm53016-dlink-dwl-8610ap.dts
  30. @@ -0,0 +1,131 @@
  31. +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  32. +/dts-v1/;
  33. +
  34. +#include "bcm4709.dtsi"
  35. +#include "bcm5301x-nand-cs0-bch8.dtsi"
  36. +#include <dt-bindings/leds/common.h>
  37. +#include <dt-bindings/input/input.h>
  38. +
  39. +/ {
  40. + model = "D-Link DWL-8610AP";
  41. + compatible = "dlink,dwl-8610ap", "brcm,bcm53016", "brcm,bcm4708";
  42. +
  43. + memory@0 {
  44. + device_type = "memory";
  45. + /* 512 MB RAM in 2 x Macronix D9PSH chips */
  46. + reg = <0x00000000 0x08000000>,
  47. + <0x88000000 0x08000000>;
  48. + };
  49. +
  50. + leds {
  51. + compatible = "gpio-leds";
  52. +
  53. + power {
  54. + function = LED_FUNCTION_POWER;
  55. + color = <LED_COLOR_ID_GREEN>;
  56. + gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
  57. + default-state = "on";
  58. + };
  59. +
  60. + diag {
  61. + /* Actually "diag" unclear what this means */
  62. + function = LED_FUNCTION_INDICATOR;
  63. + color = <LED_COLOR_ID_RED>;
  64. + gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
  65. + default-state = "on";
  66. + linux,default-trigger = "heartbeat";
  67. + };
  68. +
  69. + wlan-2g {
  70. + function = LED_FUNCTION_WLAN;
  71. + color = <LED_COLOR_ID_GREEN>;
  72. + gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>;
  73. + };
  74. +
  75. + wlan-5g {
  76. + function = LED_FUNCTION_WLAN;
  77. + color = <LED_COLOR_ID_GREEN>;
  78. + gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
  79. + };
  80. + };
  81. +
  82. + gpio_keys {
  83. + compatible = "gpio-keys";
  84. +
  85. + button-reset {
  86. + debounce-interval = <100>;
  87. + wakeup-source;
  88. + linux,code = <KEY_RESTART>;
  89. + label = "reset";
  90. + /* This GPIO is actually stored in NVRAM, but it's not gonna change */
  91. + gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
  92. + };
  93. + };
  94. +
  95. + /*
  96. + * Flash memory at 0x1e000000-0x1fffffff
  97. + * Macronix 32 64KB blocks; total size 2MB, same that can be
  98. + * found attached to the spi_nor SPI controller.
  99. + */
  100. + nvram@1e080000 {
  101. + compatible = "brcm,nvram";
  102. + reg = <0x1e080000 0x00020000>;
  103. +
  104. + et0macaddr: et0macaddr {
  105. + };
  106. +
  107. + et1macaddr: et1macaddr {
  108. + };
  109. + };
  110. +};
  111. +
  112. +&gmac0 {
  113. + nvmem-cells = <&et0macaddr>;
  114. + nvmem-cell-names = "mac-address";
  115. +};
  116. +
  117. +&gmac1 {
  118. + nvmem-cells = <&et1macaddr>;
  119. + nvmem-cell-names = "mac-address";
  120. +};
  121. +
  122. +&spi_nor {
  123. + /* Serial SPI NOR Flash MX 25L1606E */
  124. + status = "okay";
  125. +};
  126. +
  127. +&nandcs {
  128. + /*
  129. + * Spansion S34ML01G100TFI00 128 MB NAND Flash memory
  130. + *
  131. + * This ECC is a bit unorthodox but it is what the stock firmware
  132. + * is using, so to be able to mount the original partitions
  133. + * this is necessary.
  134. + */
  135. + nand-ecc-strength = <5>;
  136. + partitions {
  137. + compatible = "fixed-partitions";
  138. + #address-cells = <1>;
  139. + #size-cells = <1>;
  140. +
  141. + /* This is named nflash1.trx in CFE */
  142. + trx@0 {
  143. + label = "firmware";
  144. + reg = <0x00000000 0x02800000>;
  145. + compatible = "brcm,trx";
  146. + };
  147. +
  148. + /* This is named nflash1.trx2 in CFE */
  149. + trx2@2800000 {
  150. + label = "firmware2";
  151. + reg = <0x02800000 0x02800000>;
  152. + compatible = "brcm,trx";
  153. + };
  154. +
  155. + /* This is named nflash1.rwfs in CFE */
  156. + free@5000000 {
  157. + label = "free";
  158. + reg = <0x05000000 0x03000000>;
  159. + };
  160. + };
  161. +};