733-v6.2-08-net-mtk_eth_soc-move-interface-speed-selection.patch 1.6 KB

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  1. From f752c0df13dfeb721c11d3debb79f08cf437344f Mon Sep 17 00:00:00 2001
  2. From: "Russell King (Oracle)" <[email protected]>
  3. Date: Thu, 27 Oct 2022 14:11:13 +0100
  4. Subject: [PATCH 07/10] net: mtk_eth_soc: move interface speed selection
  5. Move the selection of the underlying interface speed to the pcs_config
  6. function, so we always program the interface speed.
  7. Signed-off-by: Russell King (Oracle) <[email protected]>
  8. Signed-off-by: Jakub Kicinski <[email protected]>
  9. ---
  10. drivers/net/ethernet/mediatek/mtk_sgmii.c | 18 ++++++++++--------
  11. 1 file changed, 10 insertions(+), 8 deletions(-)
  12. --- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
  13. +++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
  14. @@ -53,14 +53,6 @@ static void mtk_pcs_setup_mode_an(struct
  15. static void mtk_pcs_setup_mode_force(struct mtk_pcs *mpcs,
  16. phy_interface_t interface)
  17. {
  18. - unsigned int rgc3;
  19. -
  20. - if (interface == PHY_INTERFACE_MODE_2500BASEX)
  21. - rgc3 = RG_PHY_SPEED_3_125G;
  22. -
  23. - regmap_update_bits(mpcs->regmap, mpcs->ana_rgc3,
  24. - RG_PHY_SPEED_3_125G, rgc3);
  25. -
  26. /* Disable SGMII AN */
  27. regmap_update_bits(mpcs->regmap, SGMSYS_PCS_CONTROL_1,
  28. SGMII_AN_ENABLE, 0);
  29. @@ -77,6 +69,16 @@ static int mtk_pcs_config(struct phylink
  30. bool permit_pause_to_mac)
  31. {
  32. struct mtk_pcs *mpcs = pcs_to_mtk_pcs(pcs);
  33. + unsigned int rgc3;
  34. +
  35. + if (interface == PHY_INTERFACE_MODE_2500BASEX)
  36. + rgc3 = RG_PHY_SPEED_3_125G;
  37. + else
  38. + rgc3 = 0;
  39. +
  40. + /* Configure the underlying interface speed */
  41. + regmap_update_bits(mpcs->regmap, mpcs->ana_rgc3,
  42. + RG_PHY_SPEED_3_125G, rgc3);
  43. /* Setup SGMIISYS with the determined property */
  44. if (interface != PHY_INTERFACE_MODE_SGMII)