441-arm64-dts-add-PWM-node.patch 1.3 KB

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  1. From: Jernej Skrabec <[email protected]>
  2. Allwinner H6 PWM is similar to that in A20 except that it has additional
  3. bus clock and reset line.
  4. Note that first PWM channel is connected to output pin and second
  5. channel is used internally, as a clock source to AC200 co-packaged chip.
  6. This means that any combination of these two channels can be used and
  7. thus it doesn't make sense to add pinctrl nodes at this point.
  8. Signed-off-by: Jernej Skrabec <[email protected]>
  9. Signed-off-by: Clément Péron <[email protected]>
  10. ---
  11. arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 10 ++++++++++
  12. 1 file changed, 10 insertions(+)
  13. diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
  14. index 29824081b43b..6d4bde488f15 100644
  15. --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
  16. +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
  17. @@ -245,6 +245,16 @@
  18. status = "disabled";
  19. };
  20. + pwm: pwm@300a000 {
  21. + compatible = "allwinner,sun50i-h6-pwm";
  22. + reg = <0x0300a000 0x400>;
  23. + clocks = <&osc24M>, <&ccu CLK_BUS_PWM>;
  24. + clock-names = "mod", "bus";
  25. + resets = <&ccu RST_BUS_PWM>;
  26. + #pwm-cells = <3>;
  27. + status = "disabled";
  28. + };
  29. +
  30. pio: pinctrl@300b000 {
  31. compatible = "allwinner,sun50i-h6-pinctrl";
  32. reg = <0x0300b000 0x400>;