010-dt-bindings-dmaengine-dw-dmac-add-protection-control.patch 2.8 KB

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  1. From 538098281ce884a51d2aa4ab445056a41741c6ad Mon Sep 17 00:00:00 2001
  2. From: Christian Lamparter <[email protected]>
  3. Date: Sat, 17 Nov 2018 17:17:20 +0100
  4. Subject: [PATCH] dt-bindings: dmaengine: dw-dmac: add protection control
  5. property
  6. This patch for the DesignWare AHB Central
  7. Direct Memory Access Controller adds the dma
  8. protection control property:
  9. "snps,dma-protection-control"
  10. as well as the properties specific values defines into
  11. a new include file: include/dt-bindings/dma/dw-dmac.h
  12. Note: The protection control signals are one-to-one
  13. mapped to the AHB HPROT[1:3] signals for this controller.
  14. The HPROT0 (Data Access) is always hardwired to 1.
  15. Reviewed-by: Andy Shevchenko <[email protected]>
  16. Reviewed-by: Rob Herring <[email protected]>
  17. Signed-off-by: Christian Lamparter <[email protected]>
  18. Signed-off-by: Vinod Koul <[email protected]>
  19. ---
  20. Documentation/devicetree/bindings/dma/snps-dma.txt | 4 ++++
  21. MAINTAINERS | 4 +++-
  22. include/dt-bindings/dma/dw-dmac.h | 14 ++++++++++++++
  23. 3 files changed, 21 insertions(+), 1 deletion(-)
  24. create mode 100644 include/dt-bindings/dma/dw-dmac.h
  25. --- a/Documentation/devicetree/bindings/dma/snps-dma.txt
  26. +++ b/Documentation/devicetree/bindings/dma/snps-dma.txt
  27. @@ -27,6 +27,10 @@ Optional properties:
  28. general purpose DMA channel allocator. False if not passed.
  29. - multi-block: Multi block transfers supported by hardware. Array property with
  30. one cell per channel. 0: not supported, 1 (default): supported.
  31. +- snps,dma-protection-control: AHB HPROT[3:1] protection setting.
  32. + The default value is 0 (for non-cacheable, non-buffered,
  33. + unprivileged data access).
  34. + Refer to include/dt-bindings/dma/dw-dmac.h for possible values.
  35. Example:
  36. --- a/MAINTAINERS
  37. +++ b/MAINTAINERS
  38. @@ -14075,9 +14075,11 @@ SYNOPSYS DESIGNWARE DMAC DRIVER
  39. M: Viresh Kumar <[email protected]>
  40. R: Andy Shevchenko <[email protected]>
  41. S: Maintained
  42. +F: Documentation/devicetree/bindings/dma/snps-dma.txt
  43. +F: drivers/dma/dw/
  44. +F: include/dt-bindings/dma/dw-dmac.h
  45. F: include/linux/dma/dw.h
  46. F: include/linux/platform_data/dma-dw.h
  47. -F: drivers/dma/dw/
  48. SYNOPSYS DESIGNWARE ENTERPRISE ETHERNET DRIVER
  49. M: Jose Abreu <[email protected]>
  50. --- /dev/null
  51. +++ b/include/dt-bindings/dma/dw-dmac.h
  52. @@ -0,0 +1,14 @@
  53. +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
  54. +
  55. +#ifndef __DT_BINDINGS_DMA_DW_DMAC_H__
  56. +#define __DT_BINDINGS_DMA_DW_DMAC_H__
  57. +
  58. +/*
  59. + * Protection Control bits provide protection against illegal transactions.
  60. + * The protection bits[0:2] are one-to-one mapped to AHB HPROT[3:1] signals.
  61. + */
  62. +#define DW_DMAC_HPROT1_PRIVILEGED_MODE (1 << 0) /* Privileged Mode */
  63. +#define DW_DMAC_HPROT2_BUFFERABLE (1 << 1) /* DMA is bufferable */
  64. +#define DW_DMAC_HPROT3_CACHEABLE (1 << 2) /* DMA is cacheable */
  65. +
  66. +#endif /* __DT_BINDINGS_DMA_DW_DMAC_H__ */