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- --- /dev/null
- +++ b/arch/mips/include/asm/mach-ath79/mangle-port.h
- @@ -0,0 +1,37 @@
- +/*
- + * Copyright (C) 2012 Gabor Juhos <[email protected]>
- + *
- + * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h
- + * Copyright (C) 2003, 2004 Ralf Baechle
- + *
- + * This program is free software; you can redistribute it and/or modify it
- + * under the terms of the GNU General Public License version 2 as published
- + * by the Free Software Foundation.
- + */
- +
- +#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H
- +#define __ASM_MACH_ATH79_MANGLE_PORT_H
- +
- +#ifdef CONFIG_PCI_AR71XX
- +extern unsigned long (ath79_pci_swizzle_b)(unsigned long port);
- +extern unsigned long (ath79_pci_swizzle_w)(unsigned long port);
- +#else
- +#define ath79_pci_swizzle_b(port) (port)
- +#define ath79_pci_swizzle_w(port) (port)
- +#endif
- +
- +#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port)
- +#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port)
- +#define __swizzle_addr_l(port) (port)
- +#define __swizzle_addr_q(port) (port)
- +
- +# define ioswabb(a, x) (x)
- +# define __mem_ioswabb(a, x) (x)
- +# define ioswabw(a, x) (x)
- +# define __mem_ioswabw(a, x) cpu_to_le16(x)
- +# define ioswabl(a, x) (x)
- +# define __mem_ioswabl(a, x) cpu_to_le32(x)
- +# define ioswabq(a, x) (x)
- +# define __mem_ioswabq(a, x) cpu_to_le64(x)
- +
- +#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */
- --- a/arch/mips/pci/pci-ar71xx.c
- +++ b/arch/mips/pci/pci-ar71xx.c
- @@ -71,6 +71,45 @@ static const u32 ar71xx_pci_read_mask[8]
- 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0
- };
-
- +static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port);
- +static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port);
- +
- +static inline bool ar71xx_is_pci_addr(unsigned long port)
- +{
- + unsigned long phys = CPHYSADDR(port);
- +
- + return (phys >= AR71XX_PCI_MEM_BASE &&
- + phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE);
- +}
- +
- +static unsigned long ar71xx_pci_swizzle_b(unsigned long port)
- +{
- + return ar71xx_is_pci_addr(port) ? port ^ 3 : port;
- +}
- +
- +static unsigned long ar71xx_pci_swizzle_w(unsigned long port)
- +{
- + return ar71xx_is_pci_addr(port) ? port ^ 2 : port;
- +}
- +
- +unsigned long ath79_pci_swizzle_b(unsigned long port)
- +{
- + if (__ath79_pci_swizzle_b)
- + return __ath79_pci_swizzle_b(port);
- +
- + return port;
- +}
- +EXPORT_SYMBOL(ath79_pci_swizzle_b);
- +
- +unsigned long ath79_pci_swizzle_w(unsigned long port)
- +{
- + if (__ath79_pci_swizzle_w)
- + return __ath79_pci_swizzle_w(port);
- +
- + return port;
- +}
- +EXPORT_SYMBOL(ath79_pci_swizzle_w);
- +
- static inline u32 ar71xx_pci_get_ble(int where, int size, int local)
- {
- u32 t;
- @@ -279,6 +318,9 @@ static int ar71xx_pci_probe(struct platf
-
- register_pci_controller(&apc->pci_ctrl);
-
- + __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b;
- + __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w;
- +
- return 0;
- }
-
|
