114-clk-at91-sama7g5-remove-all-kernel-doc-kernel-doc-wa.patch 2.4 KB

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  1. From 9997227090cf529675aeb775585ec9f6c2f0f131 Mon Sep 17 00:00:00 2001
  2. From: Randy Dunlap <[email protected]>
  3. Date: Thu, 19 Aug 2021 15:32:37 -0700
  4. Subject: [PATCH 114/247] clk: at91: sama7g5: remove all kernel-doc &
  5. kernel-doc warnings
  6. Remove all "/**" kernel-doc markers from sama7g5.c since they are
  7. all internal to this driver source file only.
  8. This eliminates 14 warnings that were reported by the kernel test robot.
  9. Signed-off-by: Randy Dunlap <[email protected]>
  10. Reported-by: kernel test robot <[email protected]>
  11. Cc: Claudiu Beznea <[email protected]>
  12. Cc: Michael Turquette <[email protected]>
  13. Cc: Stephen Boyd <[email protected]>
  14. Cc: Eugen Hristev <[email protected]>
  15. Cc: [email protected]
  16. Cc: [email protected]
  17. Link: https://lore.kernel.org/r/[email protected]
  18. Reviewed-by: Claudiu Beznea <[email protected]>
  19. Signed-off-by: Stephen Boyd <[email protected]>
  20. ---
  21. drivers/clk/at91/sama7g5.c | 14 +++++++-------
  22. 1 file changed, 7 insertions(+), 7 deletions(-)
  23. --- a/drivers/clk/at91/sama7g5.c
  24. +++ b/drivers/clk/at91/sama7g5.c
  25. @@ -35,7 +35,7 @@ static DEFINE_SPINLOCK(pmc_pll_lock);
  26. static DEFINE_SPINLOCK(pmc_mck0_lock);
  27. static DEFINE_SPINLOCK(pmc_mckX_lock);
  28. -/**
  29. +/*
  30. * PLL clocks identifiers
  31. * @PLL_ID_CPU: CPU PLL identifier
  32. * @PLL_ID_SYS: System PLL identifier
  33. @@ -56,7 +56,7 @@ enum pll_ids {
  34. PLL_ID_MAX,
  35. };
  36. -/**
  37. +/*
  38. * PLL type identifiers
  39. * @PLL_TYPE_FRAC: fractional PLL identifier
  40. * @PLL_TYPE_DIV: divider PLL identifier
  41. @@ -118,7 +118,7 @@ static const struct clk_pll_characterist
  42. .output = pll_outputs,
  43. };
  44. -/**
  45. +/*
  46. * PLL clocks description
  47. * @n: clock name
  48. * @p: clock parent
  49. @@ -285,7 +285,7 @@ static const struct {
  50. },
  51. };
  52. -/**
  53. +/*
  54. * Master clock (MCK[1..4]) description
  55. * @n: clock name
  56. * @ep: extra parents names array
  57. @@ -337,7 +337,7 @@ static const struct {
  58. .c = 1, },
  59. };
  60. -/**
  61. +/*
  62. * System clock description
  63. * @n: clock name
  64. * @p: clock parent name
  65. @@ -361,7 +361,7 @@ static const struct {
  66. /* Mux table for programmable clocks. */
  67. static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 5, 6, 7, 8, 9, 10, };
  68. -/**
  69. +/*
  70. * Peripheral clock description
  71. * @n: clock name
  72. * @p: clock parent name
  73. @@ -449,7 +449,7 @@ static const struct {
  74. { .n = "uhphs_clk", .p = "mck1", .id = 106, },
  75. };
  76. -/**
  77. +/*
  78. * Generic clock description
  79. * @n: clock name
  80. * @pp: PLL parents