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- From 58a6cc3c7eecd16208cd16b92b4eaf8385e69696 Mon Sep 17 00:00:00 2001
- From: Eugen Hristev <[email protected]>
- Date: Tue, 13 Apr 2021 12:57:16 +0200
- Subject: [PATCH 174/247] media: atmel: atmel-isc: extend pipeline with extra
- modules
- Newer ISC pipelines have the additional modules of
- Defective Pixel Correction -> DPC itself,
- Defective Pixel Correction -> Green Disparity Correction (DPC_GDC)
- Defective Pixel Correction -> Black Level Correction (DPC_BLC)
- Vertical and Horizontal Scaler -> VHXS
- Some products have this full pipeline (sama7g5), other products do not (sama5d2)
- Add the modules to the isc base, and also extend the register range to include
- the modules.
- Signed-off-by: Eugen Hristev <[email protected]>
- Signed-off-by: Hans Verkuil <[email protected]>
- Signed-off-by: Mauro Carvalho Chehab <[email protected]>
- ---
- drivers/media/platform/atmel/atmel-isc-base.c | 11 ++++++--
- drivers/media/platform/atmel/atmel-isc.h | 28 +++++++++++--------
- 2 files changed, 25 insertions(+), 14 deletions(-)
- --- a/drivers/media/platform/atmel/atmel-isc-base.c
- +++ b/drivers/media/platform/atmel/atmel-isc-base.c
- @@ -2324,8 +2324,14 @@ int isc_pipeline_init(struct isc_device
- struct regmap_field *regs;
- unsigned int i;
-
- - /* WB-->CFA-->CC-->GAM-->CSC-->CBC-->SUB422-->SUB420 */
- + /*
- + * DPCEN-->GDCEN-->BLCEN-->WB-->CFA-->CC-->
- + * GAM-->VHXS-->CSC-->CBC-->SUB422-->SUB420
- + */
- const struct reg_field regfields[ISC_PIPE_LINE_NODE_NUM] = {
- + REG_FIELD(ISC_DPC_CTRL, 0, 0),
- + REG_FIELD(ISC_DPC_CTRL, 1, 1),
- + REG_FIELD(ISC_DPC_CTRL, 2, 2),
- REG_FIELD(ISC_WB_CTRL, 0, 0),
- REG_FIELD(ISC_CFA_CTRL, 0, 0),
- REG_FIELD(ISC_CC_CTRL, 0, 0),
- @@ -2333,6 +2339,7 @@ int isc_pipeline_init(struct isc_device
- REG_FIELD(ISC_GAM_CTRL, 1, 1),
- REG_FIELD(ISC_GAM_CTRL, 2, 2),
- REG_FIELD(ISC_GAM_CTRL, 3, 3),
- + REG_FIELD(ISC_VHXS_CTRL, 0, 0),
- REG_FIELD(ISC_CSC_CTRL + isc->offsets.csc, 0, 0),
- REG_FIELD(ISC_CBC_CTRL + isc->offsets.cbc, 0, 0),
- REG_FIELD(ISC_SUB422_CTRL + isc->offsets.sub422, 0, 0),
- @@ -2351,7 +2358,7 @@ int isc_pipeline_init(struct isc_device
- }
-
- /* regmap configuration */
- -#define ATMEL_ISC_REG_MAX 0xbfc
- +#define ATMEL_ISC_REG_MAX 0xd5c
- const struct regmap_config isc_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- --- a/drivers/media/platform/atmel/atmel-isc.h
- +++ b/drivers/media/platform/atmel/atmel-isc.h
- @@ -67,17 +67,21 @@ struct isc_format {
- };
-
- /* Pipeline bitmap */
- -#define WB_ENABLE BIT(0)
- -#define CFA_ENABLE BIT(1)
- -#define CC_ENABLE BIT(2)
- -#define GAM_ENABLE BIT(3)
- -#define GAM_BENABLE BIT(4)
- -#define GAM_GENABLE BIT(5)
- -#define GAM_RENABLE BIT(6)
- -#define CSC_ENABLE BIT(7)
- -#define CBC_ENABLE BIT(8)
- -#define SUB422_ENABLE BIT(9)
- -#define SUB420_ENABLE BIT(10)
- +#define DPC_DPCENABLE BIT(0)
- +#define DPC_GDCENABLE BIT(1)
- +#define DPC_BLCENABLE BIT(2)
- +#define WB_ENABLE BIT(3)
- +#define CFA_ENABLE BIT(4)
- +#define CC_ENABLE BIT(5)
- +#define GAM_ENABLE BIT(6)
- +#define GAM_BENABLE BIT(7)
- +#define GAM_GENABLE BIT(8)
- +#define GAM_RENABLE BIT(9)
- +#define VHXS_ENABLE BIT(10)
- +#define CSC_ENABLE BIT(11)
- +#define CBC_ENABLE BIT(12)
- +#define SUB422_ENABLE BIT(13)
- +#define SUB420_ENABLE BIT(14)
-
- #define GAM_ENABLES (GAM_RENABLE | GAM_GENABLE | GAM_BENABLE | GAM_ENABLE)
-
- @@ -141,7 +145,7 @@ struct isc_ctrls {
- u32 hist_minmax[HIST_BAYER][2];
- };
-
- -#define ISC_PIPE_LINE_NODE_NUM 11
- +#define ISC_PIPE_LINE_NODE_NUM 15
-
- /*
- * struct isc_reg_offsets - ISC device register offsets
|
