004-magicbox.patch 11 KB

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  1. --- /dev/null
  2. +++ b/arch/powerpc/boot/cuboot-magicbox.c
  3. @@ -0,0 +1,90 @@
  4. +/*
  5. + * Old U-boot compatibility for Magicbox boards
  6. + *
  7. + * Author: Imre Kaloz <[email protected]>
  8. + * Gabor Juhos <[email protected]>
  9. + *
  10. + * This program is free software; you can redistribute it and/or modify it
  11. + * under the terms of the GNU General Public License version 2 as published
  12. + * by the Free Software Foundation.
  13. + */
  14. +
  15. +#include "ops.h"
  16. +#include "io.h"
  17. +#include "dcr.h"
  18. +#include "stdio.h"
  19. +#include "4xx.h"
  20. +#include "44x.h"
  21. +#include "cuboot.h"
  22. +
  23. +#define TARGET_4xx
  24. +#define TARGET_405EP
  25. +#include "ppcboot.h"
  26. +
  27. +static bd_t bd;
  28. +
  29. +static void fixup_cf_card(void)
  30. +{
  31. +#define DCRN_CPC0_PCI_BASE 0xf9
  32. +#define CF_CS0_BASE 0xff100000
  33. +#define CF_CS1_BASE 0xff200000
  34. +
  35. + /* Turn on PerWE instead of PCIsomething */
  36. + mtdcr(DCRN_CPC0_PCI_BASE,
  37. + mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
  38. +
  39. + /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
  40. + mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
  41. + mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
  42. + mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
  43. + mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
  44. +
  45. + /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
  46. + mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
  47. + mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
  48. + mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
  49. + mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
  50. +
  51. +#undef DCRN_CPC0_PCI_BASE
  52. +#undef CF_CS0_BASE
  53. +#undef CF_CS1_BASE
  54. +}
  55. +
  56. +static void magicbox_fixups(void)
  57. +{
  58. + ibm405ep_fixup_clocks(bd.bi_procfreq / 8);
  59. + ibm4xx_sdram_fixup_memsize();
  60. +
  61. + /* Magicbox v1 has only one ethernet, one serial and no
  62. + * CF slot -- detect it using it's fake enet1addr
  63. + */
  64. + if ((bd.bi_enet1addr[0] == 0x00) &&
  65. + (bd.bi_enet1addr[1] == 0x00) &&
  66. + (bd.bi_enet1addr[2] == 0x02) &&
  67. + (bd.bi_enet1addr[3] == 0xfa) &&
  68. + (bd.bi_enet1addr[4] == 0xf0) &&
  69. + (bd.bi_enet1addr[5] == 0x80)) {
  70. + void *devp;
  71. +
  72. + devp = finddevice("/plb/opb/ethernet@ef600900");
  73. + del_node(devp);
  74. + devp = finddevice("/plb/opb/serial@ef600400");
  75. + del_node(devp);
  76. + devp = finddevice("/plb/ebc/cf_card@ff100000");
  77. + del_node(devp);
  78. + } else {
  79. + fixup_cf_card();
  80. + }
  81. +
  82. + dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
  83. +}
  84. +
  85. +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
  86. + unsigned long r6, unsigned long r7)
  87. +{
  88. + CUBOOT_INIT();
  89. + platform_ops.fixups = magicbox_fixups;
  90. + platform_ops.exit = ibm40x_dbcr_reset;
  91. + fdt_init(_dtb_start);
  92. + serial_console_init();
  93. +}
  94. --- /dev/null
  95. +++ b/arch/powerpc/boot/dts/magicbox.dts
  96. @@ -0,0 +1,281 @@
  97. +/*
  98. + * Device Tree Source for Magicbox boards
  99. + *
  100. + * Copyright 2008-2009 Imre Kaloz <[email protected]>
  101. + * Copyright 2009 Gabor Juhos <[email protected]>
  102. + *
  103. + * Based on walnut.dts
  104. + *
  105. + * This file is licensed under the terms of the GNU General Public
  106. + * License version 2. This program is licensed "as is" without
  107. + * any warranty of any kind, whether express or implied.
  108. + */
  109. +
  110. +/dts-v1/;
  111. +
  112. +/ {
  113. + #address-cells = <1>;
  114. + #size-cells = <1>;
  115. + model = "magicbox";
  116. + compatible = "magicbox";
  117. + dcr-parent = <&{/cpus/cpu@0}>;
  118. +
  119. + aliases {
  120. + ethernet0 = &EMAC0;
  121. + ethernet1 = &EMAC1;
  122. + serial0 = &UART0;
  123. + serial1 = &UART1;
  124. + };
  125. +
  126. + cpus {
  127. + #address-cells = <1>;
  128. + #size-cells = <0>;
  129. +
  130. + cpu@0 {
  131. + device_type = "cpu";
  132. + model = "PowerPC,405EP";
  133. + reg = <0x00000000>;
  134. + clock-frequency = <0>; /* Filled in by zImage */
  135. + timebase-frequency = <0>; /* Filled in by zImage */
  136. + i-cache-line-size = <0x20>;
  137. + d-cache-line-size = <0x20>;
  138. + i-cache-size = <0x4000>;
  139. + d-cache-size = <0x4000>;
  140. + dcr-controller;
  141. + dcr-access-method = "native";
  142. + };
  143. + };
  144. +
  145. + memory {
  146. + device_type = "memory";
  147. + reg = <0x00000000 0x00000000>; /* Filled in by zImage */
  148. + };
  149. +
  150. + UIC0: interrupt-controller {
  151. + compatible = "ibm,uic";
  152. + interrupt-controller;
  153. + cell-index = <0>;
  154. + dcr-reg = <0x0c0 0x009>;
  155. + #address-cells = <0>;
  156. + #size-cells = <0>;
  157. + #interrupt-cells = <2>;
  158. + };
  159. +
  160. + plb {
  161. + compatible = "ibm,plb3";
  162. + #address-cells = <1>;
  163. + #size-cells = <1>;
  164. + ranges;
  165. + clock-frequency = <0>; /* Filled in by zImage */
  166. +
  167. + SDRAM0: memory-controller {
  168. + compatible = "ibm,sdram-405ep";
  169. + dcr-reg = <0x010 0x002>;
  170. + };
  171. +
  172. + MAL: mcmal {
  173. + compatible = "ibm,mcmal-405ep", "ibm,mcmal";
  174. + dcr-reg = <0x180 0x062>;
  175. + num-tx-chans = <4>;
  176. + num-rx-chans = <2>;
  177. + interrupt-parent = <&UIC0>;
  178. + interrupts = <
  179. + 0xb 0x4 /* TXEOB */
  180. + 0xc 0x4 /* RXEOB */
  181. + 0xa 0x4 /* SERR */
  182. + 0xd 0x4 /* TXDE */
  183. + 0xe 0x4 /* RXDE */>;
  184. + };
  185. +
  186. + POB0: opb {
  187. + compatible = "ibm,opb-405ep", "ibm,opb";
  188. + #address-cells = <1>;
  189. + #size-cells = <1>;
  190. + ranges = <0xef600000 0xef600000 0x00a00000>;
  191. + dcr-reg = <0x0a0 0x005>;
  192. + clock-frequency = <0>; /* Filled in by zImage */
  193. +
  194. + UART0: serial@ef600300 {
  195. + device_type = "serial";
  196. + compatible = "ns16550";
  197. + reg = <0xef600300 0x00000008>;
  198. + virtual-reg = <0xef600300>;
  199. + clock-frequency = <0>; /* Filled in by zImage */
  200. + current-speed = <115200>;
  201. + interrupt-parent = <&UIC0>;
  202. + interrupts = <0x0 0x4>;
  203. + };
  204. +
  205. + UART1: serial@ef600400 {
  206. + device_type = "serial";
  207. + compatible = "ns16550";
  208. + reg = <0xef600400 0x00000008>;
  209. + virtual-reg = <0xef600400>;
  210. + clock-frequency = <0>; /* Filled in by zImage */
  211. + current-speed = <115200>;
  212. + interrupt-parent = <&UIC0>;
  213. + interrupts = <0x1 0x4>;
  214. + };
  215. +
  216. + IIC: i2c@ef600500 {
  217. + compatible = "ibm,iic-405ep", "ibm,iic";
  218. + #address-cells = <1>;
  219. + #size-cells = <0>;
  220. + reg = <0xef600500 0x00000011>;
  221. + interrupt-parent = <&UIC0>;
  222. + interrupts = <0x2 0x4>;
  223. +
  224. + dtt@48 {
  225. + compatible = "national,lm75";
  226. + reg = <0x48>;
  227. + };
  228. +
  229. + eeprom@50 {
  230. + compatible = "at24,24c16";
  231. + reg = <0x50>;
  232. + };
  233. + };
  234. +
  235. + GPIO0: gpio-controller@ef600700 {
  236. + compatible = "ibm,ppc4xx-gpio";
  237. + reg = <0xef600700 0x00000020>;
  238. + #gpio-cells = <2>;
  239. + gpio-controller;
  240. + };
  241. +
  242. + EMAC0: ethernet@ef600800 {
  243. + linux,network-index = <0x0>;
  244. + device_type = "network";
  245. + compatible = "ibm,emac-405ep", "ibm,emac";
  246. + interrupt-parent = <&UIC0>;
  247. + interrupts = <
  248. + 0xf 0x4 /* Ethernet */
  249. + 0x9 0x4 /* Ethernet Wake Up */>;
  250. + local-mac-address = [000000000000]; /* Filled in by zImage */
  251. + reg = <0xef600800 0x00000070>;
  252. + mal-device = <&MAL>;
  253. + mal-tx-channel = <0>;
  254. + mal-rx-channel = <0>;
  255. + cell-index = <0>;
  256. + max-frame-size = <0x5dc>;
  257. + rx-fifo-size = <0x1000>;
  258. + tx-fifo-size = <0x800>;
  259. + phy-mode = "mii";
  260. + phy-map = <0x00000000>;
  261. + };
  262. +
  263. + EMAC1: ethernet@ef600900 {
  264. + linux,network-index = <0x1>;
  265. + device_type = "network";
  266. + compatible = "ibm,emac-405ep", "ibm,emac";
  267. + interrupt-parent = <&UIC0>;
  268. + interrupts = <
  269. + 0x11 0x4 /* Ethernet */
  270. + 0x09 0x4 /* Ethernet Wake Up */>;
  271. + local-mac-address = [000000000000]; /* Filled in by zImage */
  272. + reg = <0xef600900 0x00000070>;
  273. + mal-device = <&MAL>;
  274. + mal-tx-channel = <2>;
  275. + mal-rx-channel = <1>;
  276. + cell-index = <1>;
  277. + max-frame-size = <0x5dc>;
  278. + rx-fifo-size = <0x1000>;
  279. + tx-fifo-size = <0x800>;
  280. + mdio-device = <&EMAC0>;
  281. + phy-mode = "mii";
  282. + phy-map = <0x00000001>;
  283. + };
  284. +
  285. + leds {
  286. + compatible = "gpio-leds";
  287. + user {
  288. + label = "magicbox:red:user";
  289. + gpios = <&GPIO0 2 1>;
  290. + };
  291. + };
  292. + };
  293. +
  294. + EBC0: ebc {
  295. + compatible = "ibm,ebc-405ep", "ibm,ebc";
  296. + dcr-reg = <0x012 0x002>;
  297. + #address-cells = <2>;
  298. + #size-cells = <1>;
  299. + /* The ranges property is supplied by the bootwrapper
  300. + * and is based on the firmware's configuration of the
  301. + * EBC bridge
  302. + */
  303. + clock-frequency = <0>; /* Filled in by zImage */
  304. +
  305. + cf_card@ff100000 {
  306. + compatible = "magicbox-cf", "pata-magicbox-cf";
  307. + reg = <0x00000000 0xff100000 0x00001000
  308. + 0x00000000 0xff200000 0x00001000>;
  309. + interrupt-parent = <&UIC0>;
  310. + interrupts = <0x19 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
  311. + };
  312. +
  313. + nor_flash@ffc00000 {
  314. + compatible = "cfi-flash";
  315. + bank-width = <2>;
  316. + reg = <0x00000000 0xffc00000 0x00400000>;
  317. + #address-cells = <1>;
  318. + #size-cells = <1>;
  319. + partition@0 {
  320. + label = "linux";
  321. + reg = <0x0 0x120000>;
  322. + };
  323. + partition@120000 {
  324. + label = "rootfs";
  325. + reg = <0x120000 0x2a0000>;
  326. + };
  327. + partition@3c0000 {
  328. + label = "u-boot";
  329. + reg = <0x3c0000 0x30000>;
  330. + read-only;
  331. + };
  332. + };
  333. + };
  334. +
  335. + PCI0: pci@ec000000 {
  336. + device_type = "pci";
  337. + #interrupt-cells = <1>;
  338. + #size-cells = <2>;
  339. + #address-cells = <3>;
  340. + compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
  341. + primary;
  342. + reg = <0xeec00000 0x00000008 /* Config space access */
  343. + 0xeed80000 0x00000004 /* IACK */
  344. + 0xeed80000 0x00000004 /* Special cycle */
  345. + 0xef480000 0x00000040>; /* Internal registers */
  346. +
  347. + /* Outbound ranges, one memory and one IO,
  348. + * later cannot be changed. Chip supports a second
  349. + * IO range but we don't use it for now
  350. + */
  351. + ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
  352. + 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
  353. +
  354. + /* Inbound 2GB range starting at 0 */
  355. + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
  356. +
  357. + interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
  358. + interrupt-map = <
  359. + /* IDSEL 1 */
  360. + 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
  361. +
  362. + /* IDSEL 2 */
  363. + 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
  364. +
  365. + /* IDSEL 3 */
  366. + 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
  367. +
  368. + /* IDSEL 4 */
  369. + 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
  370. + >;
  371. + };
  372. + };
  373. +
  374. + chosen {
  375. + linux,stdout-path = "/plb/opb/serial@ef600300";
  376. + };
  377. +};
  378. --- a/arch/powerpc/boot/Makefile
  379. +++ b/arch/powerpc/boot/Makefile
  380. @@ -43,6 +43,7 @@ $(obj)/cuboot-hotfoot.o: BOOTCFLAGS += -
  381. $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=440
  382. $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=440
  383. $(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
  384. +$(obj)/cuboot-magicbox.o: BOOTCFLAGS += -mcpu=405
  385. $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
  386. $(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
  387. @@ -76,7 +77,8 @@ src-plat := of.c cuboot-52xx.c cuboot-82
  388. cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
  389. cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
  390. virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
  391. - cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c
  392. + cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \
  393. + cuboot-magicbox.c
  394. src-boot := $(src-wlib) $(src-plat) empty.c
  395. src-boot := $(addprefix $(obj)/, $(src-boot))
  396. @@ -194,6 +196,7 @@ image-$(CONFIG_EP405) += dtbImage.ep40
  397. image-$(CONFIG_HOTFOOT) += cuImage.hotfoot
  398. image-$(CONFIG_WALNUT) += treeImage.walnut
  399. image-$(CONFIG_ACADIA) += cuImage.acadia
  400. +image-$(CONFIG_MAGICBOX) += cuImage.magicbox
  401. # Board ports in arch/powerpc/platform/44x/Kconfig
  402. image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
  403. --- a/arch/powerpc/platforms/40x/Kconfig
  404. +++ b/arch/powerpc/platforms/40x/Kconfig
  405. @@ -60,6 +60,16 @@ config KILAUEA
  406. help
  407. This option enables support for the AMCC PPC405EX evaluation board.
  408. +config MAGICBOX
  409. + bool "Magicbox"
  410. + depends on 40x
  411. + default n
  412. + select PPC40x_SIMPLE
  413. + select 405EP
  414. + select PCI
  415. + help
  416. + This option enables support for the Magicbox boards.
  417. +
  418. config MAKALU
  419. bool "Makalu"
  420. depends on 40x
  421. --- a/arch/powerpc/platforms/40x/ppc40x_simple.c
  422. +++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
  423. @@ -55,7 +55,8 @@ static char *board[] __initdata = {
  424. "amcc,haleakala",
  425. "amcc,kilauea",
  426. "amcc,makalu",
  427. - "est,hotfoot"
  428. + "est,hotfoot",
  429. + "magicbox"
  430. };
  431. static int __init ppc40x_probe(void)